Patents by Inventor Han Wen

Han Wen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11521937
    Abstract: The present disclosure relates to thin-form-factor semiconductor packages with integrated electromagnetic interference (“EMI”) shields and methods for forming the same. The packages described herein may be utilized to form high-density semiconductor devices. In certain embodiments, a silicon substrate is laser ablated to include one or more cavities and a plurality of vias surrounding the cavities. One or more semiconductor dies may be placed within the cavities and thereafter embedded in the substrate upon formation of an insulating layer thereon. A plurality of conductive interconnections are formed within the vias and may have contact points redistributed to desired surfaces of the die-embedded substrate assembly. Thereafter, an EMI shield is plated onto a surface of the die-embedded substrate assembly and connected to ground by at least one of the one or more conductive interconnections. The die-embedded substrate assembly may then be singulated and/or integrated with another semiconductor device.
    Type: Grant
    Filed: November 16, 2020
    Date of Patent: December 6, 2022
    Assignee: Applied Materials, Inc.
    Inventors: Steven Verhaverbeke, Han-Wen Chen, Giback Park, Chintan Buch
  • Patent number: 11521935
    Abstract: The present disclosure relates to methods and apparatus for forming a thin-form-factor semiconductor package. In one embodiment, a glass or silicon substrate is structured by micro-blasting or laser ablation to form structures for formation of interconnections therethrough. The substrate is thereafter utilized as a frame for forming a semiconductor package with embedded dies therein.
    Type: Grant
    Filed: April 12, 2021
    Date of Patent: December 6, 2022
    Assignee: Applied Materials, Inc.
    Inventors: Han-Wen Chen, Steven Verhaverbeke, Giback Park, Giorgio Cellere, Diego Tonini, Vincent Dicaprio, Kyuil Cho
  • Publication number: 20220375787
    Abstract: The present disclosure relates to micro-via structures for interconnects in advanced wafer level semiconductor packaging. The methods described herein enable the formation of high-quality, low-aspect-ratio micro-via structures with improved uniformity, thus facilitating thin and small-form-factor semiconductor devices having high I/O density with improved bandwidth and power.
    Type: Application
    Filed: May 18, 2021
    Publication date: November 24, 2022
    Inventors: Wei-Sheng LEI, Kurtis LESCHKIES, Roman GOUK, Giback PARK, Kyuil CHO, Tapash CHAKRABORTY, Han-Wen CHEN, Steven VERHAVERBEKE
  • Patent number: 11500613
    Abstract: A memory unit with a multiply-accumulate assist scheme for a plurality of multi-bit convolutional neural network based computing-in-memory applications is controlled by a reference voltage, a word line and a multi-bit input voltage. The memory unit includes a non-volatile memory cell, a voltage divider and a voltage keeper. The non-volatile memory cell is controlled by the word line and stores a weight. The voltage divider includes a data line and generates a charge current on the data line according to the reference voltage, and a voltage level of the data line is generated by the non-volatile memory cell and the charge current. The voltage keeper generates an output current on an output node according to the multi-bit input voltage and the voltage level of the data line, and the output current is corresponding to the multi-bit input voltage multiplied by the weight.
    Type: Grant
    Filed: February 6, 2020
    Date of Patent: November 15, 2022
    Assignee: NATIONAL TSING HUA UNIVERSITY
    Inventors: Meng-Fan Chang, Han-Wen Hu, Kuang-Tang Chang
  • Patent number: 11482717
    Abstract: A dehydrogenation method for hydrogen storage materials, which is executed by a fuel cell system. The fuel cell system includes a hydrogen storage material tank, a heating unit, a fuel cell, a pump, a water thermal management unit and a heat recovery unit. The described dehydrogenation method utilizes the heating unit and the heat recovery unit to provide thermal energy to the hydrogen storage material tank, so that hydrogen storage material is heated to the dehydrogenation temperature. The pump extracts hydrogen from the hydrogen storage material tank, so that the hydrogen storage material is under negative pressure (i.e. H2 absolute pressure below 1 atm), according to which the hydrogen storage material is dehydrogenated, and the dehydrogenation efficiency and the amount of hydrogen release are improved. The method n can reduce the dehydrogenation temperature of the hydrogen storage material, and reduce the thermal energy consumption for heating the hydrogen storage material.
    Type: Grant
    Filed: March 31, 2021
    Date of Patent: October 25, 2022
    Inventors: Chia-Chieh Shen, Shih-Hung Chan, Fang-Bor Weng, Ho Chun Cheung, Yi-Hsuan Lin, Mei-Chin Chen, Jyun-Wei Chen, Ya-Che Wu, Han-Wen Liu, Kuan-Lin Chen, Jin-Xun Zhang
  • Publication number: 20220336246
    Abstract: A method for printing on a substrate includes printing a support structure by printing a liquid precursor material and curing the liquid precursor material, positioning a substrate within the support structure, printing one or more anchors on the substrate and the support structure by printing and curing the liquid precursor material to secure the substrate to the support structure, and printing one or more device structures on the substrate while anchored by printing and curing the liquid precursor material.
    Type: Application
    Filed: May 2, 2022
    Publication date: October 20, 2022
    Inventors: Daihua Zhang, Hou T. Ng, Nag B. Patibandla, Sivapackia Ganapathiappan, Yingdong Luo, Kyuil Cho, Han-Wen Chen
  • Publication number: 20220334964
    Abstract: A memory device and an operation method thereof are provided. The memory device includes: a plurality of page buffers, storing an input data; a plurality of memory planes coupled to the page buffers, based on received addresses of the memory planes, a plurality of weights stored in the memory planes, the memory planes performing bit multiplication on the weights and the input data in the page buffers in parallel to generate a plurality of bit multiplication results in parallel, the bit multiplication results stored back to the page buffers; and at least one accumulation circuit coupled to the page buffers, for performing bit accumulation on the bit multiplication results of the memory planes in parallel or in sequential to generate a multiply-accumulate (MAC) operation result.
    Type: Application
    Filed: December 6, 2021
    Publication date: October 20, 2022
    Inventors: Han-Wen HU, Yung-Chun LI, Bo-Rong LIN, Huai-Mu WANG
  • Publication number: 20220334757
    Abstract: A storage device and a data accessing method are disclosed, wherein the storage device includes a memory circuit and a control circuit. The memory circuit includes a plurality of multi-level cells, and each of the multi-level cells is configured to store at least a first bit, a second bit and a third bit in at least a first page, a second page and a third page. The control circuit is configured to read the first bits according to a one-time reading operation related to the first bits, read the second bits according to M-times reading operations related to the second bits, and read the third bits according to N-times reading operations related to the third bits, wherein the difference between M and N is less than or equal to one.
    Type: Application
    Filed: August 17, 2021
    Publication date: October 20, 2022
    Inventors: Yung-Chun LI, Han-Wen HU, Bo-Rong LIN, Huai-Mu WANG
  • Patent number: 11476202
    Abstract: The present disclosure relates to thin-form-factor reconstituted substrates and methods for forming the same. The reconstituted substrates described herein may be utilized to fabricate homogeneous or heterogeneous high-density 3D integrated devices. In one embodiment, a silicon substrate is structured by direct laser patterning to include one or more cavities and one or more vias. One or more semiconductor dies of the same or different types may be placed within the cavities and thereafter embedded in the substrate upon formation of an insulating layer thereon. One or more conductive interconnections are formed in the vias and may have contact points redistributed to desired surfaces of the reconstituted substrate. The reconstituted substrate may thereafter be integrated into a stacked 3D device.
    Type: Grant
    Filed: August 28, 2020
    Date of Patent: October 18, 2022
    Assignee: Applied Materials, Inc.
    Inventors: Han-Wen Chen, Steven Verhaverbeke, Guan Huei See, Giback Park, Giorgio Cellere, Diego Tonini, Vincent Dicaprio, Kyuil Cho
  • Publication number: 20220328336
    Abstract: Printing on a substrate includes printing a support structure by printing a liquid precursor material and curing the liquid precursor material, printing one or more alignment markers by printing the liquid precursor material outside the support structure and curing the liquid precursor material, positioning a substrate within the support structure, performing a registration of the substrate using the one or more alignment markers, and printing one or more device structures on the substrate while registered by printing and curing the liquid precursor material.
    Type: Application
    Filed: June 16, 2022
    Publication date: October 13, 2022
    Inventors: Daihua Zhang, Hou T. Ng, Nag B. Patibandla, Sivapackia Ganapathiappan, Yingdong Luo, Kyuil Cho, Han-Wen Chen
  • Publication number: 20220321064
    Abstract: A high-linearity amplifier including a main operational amplifier, a feedback circuit, and a compensation circuit is shown. The feedback circuit couples an output signal of the main operational amplifier to an input port of the main operational amplifier. The compensation circuit couples a former-stage circuit of the amplifier to the input port of the main operational amplifier to compensate for the non-linearity of the feedback circuit. The compensation circuit and the feedback circuit form an inverse paralleling linearization architecture. In the inverse paralleling linearization architecture, a resistor in the feedback circuit corresponds to a resistor in the compensation circuit which is biased in an inversed way in comparison with the corresponding resistor in the feedback circuit.
    Type: Application
    Filed: June 15, 2022
    Publication date: October 6, 2022
    Inventor: Sung-Han WEN
  • Patent number: 11449104
    Abstract: A flexible display that can be adjusted by an electromagnetic mechanism to remove a deformation is disclosed. The flexible display is attached to a body that is configurable in a folded configuration or an unfolded configuration by a hinge mechanism. When unfolded the flexible display includes a deformation (i.e., warp) in an area around the hinge mechanism. Accordingly, an electromagnet is included with the hinge mechanism to remove the deformation by attracting a magnetic element is disposed on a back surface of the flexible display.
    Type: Grant
    Filed: November 5, 2019
    Date of Patent: September 20, 2022
    Assignee: Google LLC
    Inventors: Wenli Tan, Victor Cheng, Vincent Chien, Davis Ou, Eugene Liao, Han-Wen Yeh, Mike Liu, Chun Tseng
  • Publication number: 20220278248
    Abstract: The present disclosure relates to methods and apparatus for structuring a semiconductor substrate. In one embodiment, a method of substrate structuring includes applying a resist layer to a substrate optionally disposed on a carrier. The resist layer is patterned using ultraviolet radiation or laser ablation. The patterned portions of the resist layer are then transferred onto the substrate by micro-blasting to form desired features in the substrate while unexposed or un-ablated portions of the resist layer shield the rest of the substrate. The substrate is then exposed to an etch process and a de-bonding process to remove the resist layer and release the carrier.
    Type: Application
    Filed: May 18, 2022
    Publication date: September 1, 2022
    Inventors: Han-Wen CHEN, Steven VERHAVERBEKE, Giback PARK
  • Publication number: 20220268330
    Abstract: A brake pad assembly is provided in the present disclosure. The brake pad assembly includes at least one back plate, at least one brake pad, at least one sensor plate and a warning module. The brake pad is on the surface of the board. The brake pad is surrounded by the sensor plate, and the sensor plate forms a closed circuit. The warning module is electrically connected to the sensor plate. A warning signal is generated by the warning module when the closed circuit of the sensor plate forms an open circuit or a short circuit.
    Type: Application
    Filed: February 25, 2022
    Publication date: August 25, 2022
    Applicant: ADUI BRAKE INDUSTRY INC.
    Inventors: HAN-WEN HSU, CHIH-SHENG CHIEN
  • Patent number: 11424137
    Abstract: Embodiments described herein generally relate to a processing chamber incorporating a small thermal mass which enable efficient temperature cycling for supercritical drying processes. The chamber generally includes a body, a liner, and an insulation element which enables the liner to exhibit a small thermal mass relative to the body. The chamber is also configured with suitable apparatus for generating and/or maintaining supercritical fluid within a processing volume of the chamber.
    Type: Grant
    Filed: May 20, 2019
    Date of Patent: August 23, 2022
    Assignee: Applied Materials, Inc.
    Inventors: Roman Gouk, Han-Wen Chen, Steven Verhaverbeke, Jean Delmas
  • Patent number: 11400545
    Abstract: A method of fabricating a frame to enclose one or more semiconductor dies includes forming one or more features including one or more cavities and one or more through-vias in a substrate by a first laser ablation process, filling the one or more through-vias with a dielectric material, and forming a via-in-via in the dielectric material filled in each of the one or more through-vias by a second laser ablation process. The one or more cavities is configured to enclose one or more semiconductor dies therein. In the first laser ablation process, frequency, pulse width, and pulse energy of a first pulsed laser beam to irradiate the substrate are tuned based on a depth of the one or more features. In the second laser ablation process, frequency, pulse width, and pulse energy of a second pulsed laser beam to irradiate the dielectric material are tuned based on a depth of the via-in-via.
    Type: Grant
    Filed: May 11, 2020
    Date of Patent: August 2, 2022
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Kurtis Leschkies, Wei-Sheng Lei, Jeffrey L. Franklin, Jean Delmas, Han-Wen Chen, Giback Park, Steven Verhaverbeke
  • Patent number: 11398433
    Abstract: The present disclosure relates to thin-form-factor reconstituted substrates and methods for forming the same. The reconstituted substrates described herein may be utilized to fabricate homogeneous or heterogeneous high-density 3D integrated devices. In one embodiment, a silicon substrate is structured by direct laser patterning to include one or more cavities and one or more vias. One or more semiconductor dies of the same or different types may be placed within the cavities and thereafter embedded in the substrate upon formation of an insulating layer thereon. One or more conductive interconnections are formed in the vias and may have contact points redistributed to desired surfaces of the reconstituted substrate. The reconstituted substrate may thereafter be integrated into a stacked 3D device.
    Type: Grant
    Filed: August 28, 2020
    Date of Patent: July 26, 2022
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Han-Wen Chen, Steven Verhaverbeke, Guan Huei See, Giback Park, Giorgio Cellere, Diego Tonini, Vincent Dicaprio, Kyuil Cho
  • Patent number: 11394351
    Abstract: A high-linearity amplifier including a main operational amplifier, a feedback circuit, and a compensation circuit is shown. The feedback circuit couples an output signal of the main operational amplifier to an input port of the main operational amplifier. The compensation circuit is coupled to the input port of the main operational amplifier to compensate for the non-linearity of the feedback circuit. A signal coupled to the input port of the main operational amplifier through the compensation circuit has an inverse phase compared to the output signal of the main operational amplifier.
    Type: Grant
    Filed: October 12, 2020
    Date of Patent: July 19, 2022
    Assignee: MEDIATEK INC.
    Inventor: Sung-Han Wen
  • Patent number: 11388822
    Abstract: Methods for forming circuit boards and circuit boards using an adhesion layer are described. A substrate with two surfaces is exposed to a bifunctional organic compound to form an adhesion layer on the first substrate surface. A resin layer is then deposited on the adhesion layer and the exposed substrate surfaces. Portions of the resin layer may be removed to expose metal pads for contacts.
    Type: Grant
    Filed: August 28, 2020
    Date of Patent: July 12, 2022
    Assignee: Applied Materials, Inc.
    Inventors: Tapash Chakraborty, Steven Verhaverbeke, Han-Wen Chen, Chintan Buch, Prerna Goradia, Giback Park, Kyuil Cho
  • Patent number: 11367591
    Abstract: A plasma-processing apparatus includes a chamber, a plasma generator, and a composite plasma modulator. The chamber includes a plasma zone. The plasma generator is configured to generate a plasma in the plasma zone. The composite plasma modulator is configured to modulate the plasma. The composite plasma modulator includes a dielectric plate made of a first dielectric material and a first modulating portion made of a second dielectric material and coupled to the dielectric plate.
    Type: Grant
    Filed: January 30, 2017
    Date of Patent: June 21, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventor: Han-Wen Liao