Patents by Inventor Han Yang

Han Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240135145
    Abstract: Various embodiments of the teachings herein include a computer implemented sample preparation method for generating a new sample of data for augmenting simulation data to generate realistic data to be applied for training of a data evaluation model. The method may include generating the new sample based on an output data set sampled from a model of an input data set based on residual data. The residual data are based on real data of a real process and simulated data of a simulated process corresponding to the real process.
    Type: Application
    Filed: February 3, 2022
    Publication date: April 25, 2024
    Applicant: Siemens Aktiengesellschaft
    Inventors: Yinchong Yang, Denis Krompaß, Hans-Georg Köpken
  • Publication number: 20240138152
    Abstract: In accordance with embodiments, a memory array is formed with a multiple patterning process. In embodiments a first trench is formed within a multiple layer stack and a first conductive material is deposited into the first trench. After the depositing the first conductive material, a second trench is formed within the multiple layer stack, and a second conductive material is deposited into the second trench. The first conductive material and the second conductive material are etched.
    Type: Application
    Filed: January 2, 2024
    Publication date: April 25, 2024
    Inventors: Feng-Cheng Yang, Meng-Han Lin, Sheng-Chen Wang, Han-Jong Chia, Chung-Te Lin
  • Publication number: 20240134059
    Abstract: In an aspect, a user equipment (UE) receives a spoofing alert message from either a server or an internet-of-things (IOT) device that indicates whether a spoofed Global Navigation Satellite System (GNSS) condition is present. Based on determining that the spoofing alert message indicates that a spoofed GNSS condition is present, the UE determines, based on the spoofing alert message, a location of a spoofer broadcasting a spoofed GNSS signal, determines, based on the location of the spoofer and a current location of the UE, that the UE is within a receiving area of the spoofed GNSS signal, and determines a position of the UE without using the spoofed GNSS signal.
    Type: Application
    Filed: December 8, 2023
    Publication date: April 25, 2024
    Inventors: Han ZHANG, Ning LUO, Gengsheng ZHANG, Bo ZHENG, Yinghua YANG, Min WANG
  • Publication number: 20240130434
    Abstract: A detailed listing of all claims that are, or were, in the present application, irrespective of whether the claim(s) remain(s) under examination in the application is presented below. The claims are presented in ascending order and each includes one status identifier. Those claims not cancelled or withdrawn but amended by the current amendment utilize the following notations for amendment: 1. deleted matter is shown by strikethrough for six or more characters and double brackets for five or fewer characters; and 2. added matter is shown by underlining.
    Type: Application
    Filed: September 30, 2021
    Publication date: April 25, 2024
    Inventors: Patrick MOLONEY, Justin Han Yang CHAN
  • Patent number: 11965522
    Abstract: An impeller includes a hub and a plurality of blades. The blades are arranged around the hub, and each blade includes a leading edge, a blade tip, a root portion, a trailing edge, a windward side and a leeward side. The windward side including a first turning point and a second turning point, a first vertical height difference is formed from the blade tip to the first turning point, and a second vertical height difference is formed from the first turning point to the second turning point, and the first vertical height difference is greater than the second vertical height difference. The impeller apparently reduces the noise.
    Type: Grant
    Filed: January 28, 2022
    Date of Patent: April 23, 2024
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Pei-Han Chiu, Chien-Ming Lee, Chung-Yuan Tsang, Chao-Fu Yang
  • Patent number: 11967414
    Abstract: This application relates to an image recognition model training method, an image recognition method, apparatus, and system. The method includes: obtaining a to-be-recognized image; extracting image feature information of the to-be-recognized image; and obtaining a lesion category recognition result of the to-be-recognized image by using the image feature information of the to-be-recognized image as an input parameter of a preset image recognition model, the image recognition model being trained by using a training image sample set comprising at least one strong-label training image sample, to determine the lesion category recognition result; and the strong-label training image sample representing an image sample having strong-label information, and the strong-label information comprising at least annotation information of a lesion category and a lesion position in the strong-label training image sample.
    Type: Grant
    Filed: May 14, 2021
    Date of Patent: April 23, 2024
    Assignee: TENCENT TECHNOLOGY (SHENZHEN) COMPANY LIMITED
    Inventors: Han Zheng, Zhongqian Sun, Hong Shang, Xinghui Fu, Wei Yang
  • Publication number: 20240129496
    Abstract: Methods, systems, and articles are described herein related to video coding. The method comprises receiving compressed image data of video frames including a block of image data of at least one of the frames. The method also comprises receiving first partition data to be used to decode the compressed image data and indicating a partition in the block. This method comprises detecting whether or not the block has an illegal block partition. Also, the method comprises generating second partition data to indicate the illegal block partition of the block is to be ignored. Further, the method includes decoding the block at least according to the second partition data.
    Type: Application
    Filed: December 28, 2023
    Publication date: April 18, 2024
    Applicant: Intel Corporation
    Inventor: Tsung-Han Yang
  • Patent number: 11961442
    Abstract: A shift register unit, a driving method, a drive circuit, and a display apparatus are disclosed. The shift register unit includes: a control circuit, which is configured to adjust signals of a first node and a second node according to an input signal end, a first control signal end, a second control signal end and a first reference signal end; a cascade circuit, which is configured to provide, according to the signal of the first node, a signal of a first cascade clock signal end to a cascade output end; and an output circuit, which is configured to provide, according to the signal of the first node, a signal of a control clock signal end to a drive output end, and provide, according to the signal of the second node, a signal of a second reference signal end to the drive output end.
    Type: Grant
    Filed: October 21, 2020
    Date of Patent: April 16, 2024
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Wei Yan, Wenwen Qin, Yue Shan, Deshuai Wang, Jiguo Wang, Zhen Wang, Xiaoyan Yang, Han Zhang, Jian Zhang, Yadong Zhang, Jian Sun
  • Patent number: 11957833
    Abstract: An electronic vapor provision system includes a vaporizer for vaporizing a payload for inhalation by a user of the electronic vapor provision system, the vaporizer taking a finite period of time from having power supplied to it to vaporize the payload; a power supply for supplying power to the vaporizer to vaporize the payload in response to a user activation; one or more sensors operable to output respective signals in response to interaction of the user with the electronic vapor provision system; an estimation processor configured to estimate a user's expected moment of activation, based upon analysis of one or more of the respective signals; and a control processor configured to cause power to be supplied to the vaporizer at a time that precedes the user's estimated expected moment of activation.
    Type: Grant
    Filed: February 12, 2019
    Date of Patent: April 16, 2024
    Assignee: NICOVENTURES TRADING LIMITED
    Inventors: Patrick Moloney, Colin Dickens, Justin Han Yang Chan
  • Patent number: 11958789
    Abstract: A method for determining a consistency coefficient of a power-law cement grout includes: determining a water-cement ratio of the power-law cement grout; according to engineering practice requirements, determining a time required to determine the consistency coefficient of the power-law cement grout; and obtaining the consistency coefficient of the power-law cement grout. The method is accurate and reliable, requires less calculation, etc.; and has very high practical value and popularization value in environmental protection and ecological restoration.
    Type: Grant
    Filed: December 12, 2023
    Date of Patent: April 16, 2024
    Assignee: KUNMING UNIVERSITY OF SCIENCE AND TECHNOLOGY
    Inventors: Zhi-quan Yang, Jun-fan Xiong, Ying-yan Zhu, Yi Yang, Yong-shun Han, Muhammad Asif Khan, Jian-bin Xie, Tian-bing Xiang, Bi-hua Zhang, Han-hua Xu, Jie Zhang, Shen-zhang Liu, Qi-jun Jia, Cheng-yin Ye, Gang Li
  • Publication number: 20240120018
    Abstract: A memory device, a failure bits detector, and a failure bits detection method thereof are provided. The failure bits detector includes a current generator, a current mirror, and a comparator. The current generator generates a first current according to a reference code. The current mirror mirrors the first current to generate a second current at a second end of the current mirror. The comparator compares a first voltage at a first input end with a second voltage at a second input end to generate a detection result.
    Type: Application
    Filed: October 5, 2022
    Publication date: April 11, 2024
    Applicant: MACRONIX International Co., Ltd.
    Inventors: Chung-Han Wu, Che-Wei Liang, Chih-He Chiang, Shang-Chi Yang
  • Publication number: 20240122006
    Abstract: A display device includes a data conductive layer including a first power line, a passivation layer with a first opening exposing the first power line, a via layer with a second opening partially overlapping the first opening, a pixel electrode on the via layer, a connection electrode in the first and second openings, a pixel-defining film with an opening overlapping the second opening, a light-emitting layer on the pixel-defining film, the pixel electrode and the connection electrode, and a common electrode connected to the first power line. The data conductive layer includes a data base layer, a data main metal layer, and a data capping layer, the first power line includes a wire connection structure, in which the data main metal layer is recessed from sides of the data capping layer, and the common electrode is connected to the data main metal layer in the wire connection structure.
    Type: Application
    Filed: August 28, 2023
    Publication date: April 11, 2024
    Inventors: Shin Hyuk YANG, Dong Han KANG, Jee Hoon KIM, Sung Gwon MOON, Seung Sok SON, Woo Geun LEE
  • Publication number: 20240120342
    Abstract: A transistor array substrate includes a substrate, an active layer disposed on the substrate and including a channel region, a source region and a drain region, a gate insulating layer disposed on a part of the active layer, a gate electrode overlapping the channel region of the active layer and included in an electrode conductive layer which is disposed on the gate insulating layer, a source electrode included in the electrode conductive layer and in contact with a part of the source region of the active layer, and a drain electrode included in the electrode conductive layer and in contact with a part of the drain region of the active layer. The active layer includes an oxide semiconductor including crystals and is disposed as an island shape excluding a hole in a plan view.
    Type: Application
    Filed: June 10, 2023
    Publication date: April 11, 2024
    Inventors: Sung Gwon MOON, Dong Han KANG, Jee Hoon KIM, Seung Sok SON, Shin Hyuk YANG, Woo Geun LEE
  • Patent number: 11955423
    Abstract: Methods for forming dummy under-bump metallurgy structures and semiconductor devices formed by the same are disclosed. In an embodiment, a semiconductor device includes a first redistribution line and a second redistribution line over a semiconductor substrate; a first passivation layer over the first redistribution line and the second redistribution line; a second passivation layer over the first passivation layer; a first under-bump metallurgy (UBM) structure over the first redistribution line, the first UBM structure extending through the first passivation layer and the second passivation layer and being electrically coupled to the first redistribution line; and a second UBM structure over the second redistribution line, the second UBM structure extending through the second passivation layer, the second UBM structure being electrically isolated from the second redistribution line by the first passivation layer.
    Type: Grant
    Filed: March 26, 2021
    Date of Patent: April 9, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ting-Li Yang, Po-Hao Tsai, Ming-Da Cheng, Yung-Han Chuang, Hsueh-Sheng Wang
  • Patent number: 11955245
    Abstract: A method and a system for mental index prediction are provided. The method includes the following steps. A plurality of images of a subject person are obtained. A plurality of emotion tags of the subject person in the images are analyzed. A plurality of integrated emotion tags in a plurality of predetermined time periods are calculated according to the emotion tags respectively corresponding to the images. A plurality of preferred features are determined according to the integrated emotion tags. A mental index prediction model is established according to the preferred features to predict a mental index according to the emotional index prediction model.
    Type: Grant
    Filed: July 2, 2021
    Date of Patent: April 9, 2024
    Assignees: Acer Incorporated, National Yang Ming Chiao Tung University
    Inventors: Chun-Hsien Li, Szu-Chieh Wang, Andy Ho, Liang-Kung Chen, Jun-Hong Chen, Li-Ning Peng, Tsung-Han Yang, Yun-Hsuan Chan, Tsung-Hsien Tsai
  • Patent number: 11955444
    Abstract: Some implementations described herein provide a semiconductor structure. The semiconductor structure includes a first conductive structure disposed within a first layer of the semiconductor structure. The semiconductor structure includes a dielectric structure disposed within a second layer of the semiconductor structure, with the second layer being disposed on the first layer. The semiconductor structure includes a second conductive structure disposed within a recessed portion of the dielectric structure that extends to the first conductive structure, with the second conductive structure having a concave recessed portion on a top surface of the second conductive structure. The semiconductor structure includes multiple layers of conductive material disposed within the concave recessed portion of the second conductive structure.
    Type: Grant
    Filed: October 13, 2021
    Date of Patent: April 9, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Manikandan Arumugam, Tsung-Yi Yang, Chien-Chih Chen, Mu-Han Cheng, Kuo-Hsien Cheng
  • Patent number: 11956995
    Abstract: The OLED display includes a flat display area and an edge curved-surface display area; wherein the edge curved-surface display area is provided with an optical film layer, and the optical film layer is configured to reduce a light intensity of emergent light with a preset color in the edge curved-surface display area.
    Type: Grant
    Filed: March 2, 2020
    Date of Patent: April 9, 2024
    Assignees: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Jiangrong Xie, Chao Kong, Kening Zheng, Yamin Yang, Han Nie
  • Publication number: 20240111061
    Abstract: In an aspect, a user equipment (UE) receives a spoofing alert message from either a server or an internet-of-things (IOT) device that indicates whether a spoofed Global Navigation Satellite System (GNSS) condition is present. Based on determining that the spoofing alert message indicates that a spoofed GNSS condition is present, the UE determines, based on the spoofing alert message, a location of a spoofer broadcasting a spoofed GNSS signal, determines, based on the location of the spoofer and a current location of the UE, that the UE is within a receiving area of the spoofed GNSS signal, and determines a position of the UE without using the spoofed GNSS signal.
    Type: Application
    Filed: December 8, 2023
    Publication date: April 4, 2024
    Inventors: Han ZHANG, Ning LUO, Gengsheng ZHANG, Bo ZHENG, Yinghua YANG, Min WANG
  • Publication number: 20240110875
    Abstract: A coherent Raman spectro-microscopy system is configured for generating a spectro-microscopic image of a sample and includes a light source, a supercontinuum spectrum generator, a color filter assembly, and a spectro-microscopic assembly. The light source is for emitting at least one pulsed laser beam. The supercontinuum spectrum generator is for broadening the bandwidth of at least one pulsed laser beam. The color filter assembly is for filtering the bandwidth of at least one pulsed laser beam according to a predetermined bandwidth and converting at least one pulsed laser beam into a coherent spectro-microscopic laser beam. The sample is disposed in the spectro-microscopic assembly, and the spectro-microscopic assembly receives the coherent spectro-microscopic laser beam so that the coherent spectro-microscopic laser beam passes through the sample to generate the spectro-microscopic image of the sample.
    Type: Application
    Filed: January 18, 2023
    Publication date: April 4, 2024
    Inventors: Shang-Da YANG, Chih-Hsuan Lu, Bo-Han Chen
  • Patent number: 11948887
    Abstract: Various aspects of the present disclosure provide a device that comprises an electronic device comprising a first device side, a second device side, and a first lateral device side. The example device may, for example, also comprise a substrate comprising a first substrate side, a second substrate side, and a first lateral substrate side. The substrate may, for example, comprise a first conductive pattern, a first barrier structure, and a second conductive pattern. The first conductive pattern may, for example, comprise a first side, a second side, and a first lateral side. The first barrier structure may, for example, be on the first lateral side of the first conductive pattern. The second conductive pattern may, for example, comprise a first side, a second side, and a first lateral side. The first lateral side of the second conductive pattern may, for example, be free of a metal barrier structure.
    Type: Grant
    Filed: April 26, 2022
    Date of Patent: April 2, 2024
    Assignee: AMKOR TECHNOLOGY SINGAPORE HOLDING PTE. LTD.
    Inventors: Ki Yeul Yang, Kyung Han Ryu, Hyun Cho