Patents by Inventor Han Yang

Han Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11948887
    Abstract: Various aspects of the present disclosure provide a device that comprises an electronic device comprising a first device side, a second device side, and a first lateral device side. The example device may, for example, also comprise a substrate comprising a first substrate side, a second substrate side, and a first lateral substrate side. The substrate may, for example, comprise a first conductive pattern, a first barrier structure, and a second conductive pattern. The first conductive pattern may, for example, comprise a first side, a second side, and a first lateral side. The first barrier structure may, for example, be on the first lateral side of the first conductive pattern. The second conductive pattern may, for example, comprise a first side, a second side, and a first lateral side. The first lateral side of the second conductive pattern may, for example, be free of a metal barrier structure.
    Type: Grant
    Filed: April 26, 2022
    Date of Patent: April 2, 2024
    Assignee: AMKOR TECHNOLOGY SINGAPORE HOLDING PTE. LTD.
    Inventors: Ki Yeul Yang, Kyung Han Ryu, Hyun Cho
  • Patent number: 11948837
    Abstract: A method for making a semiconductor structure includes: providing a substrate with a contact feature thereon; forming a dielectric layer on the substrate; etching the dielectric layer to form an interconnect opening exposing the contact feature; forming a metal layer on the dielectric layer and outside of the contact feature; and forming a graphene conductive structure on the metal layer, the graphene conductive structure filling the interconnect opening, being electrically connected to the contact feature, and having at least one graphene layer that extends in a direction substantially perpendicular to the substrate.
    Type: Grant
    Filed: August 30, 2021
    Date of Patent: April 2, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ching-Fu Yeh, Chin-Lung Chung, Shu-Wei Li, Yu-Chen Chan, Shin-Yi Yang, Ming-Han Lee
  • Publication number: 20240107644
    Abstract: A tubular LED lamp to be used with an external electronic power controlling device which is adapted to provide an input voltage to the lamp, comprising: a LED unit; a driving circuit for the LED unit; and a safety detection circuit adapted to detect whether the tubular LED lamp is correctly connected to an external lamp fixture; characterized in that further comprising: a holding current providing circuit adapted to provide a holding current through the electronic controlling device so as to maintain the electronic controlling device to be conductive; and a controlling circuit adapted to synchronize the safety detection circuit with the holding current providing circuit such that the safety detection circuit is adapted to carry out the detection when the hold current providing circuit is adapted to provide the holding current and the electronic controlling device is conductive; wherein the controlling circuit is adapted to deactivate the holding current providing circuit and the safety detection circuit after
    Type: Application
    Filed: June 15, 2021
    Publication date: March 28, 2024
    Inventors: Deyong KONG, Xin LIU, Feng JU, Liwei SUN, Han LU, Jing YANG, Yuanqiang LIU
  • Publication number: 20240103319
    Abstract: The invention refers to a diffusion plate and a backlight module having the diffusion plate. The diffusion plate comprises a plate-body and a plurality of pyramid-like structures arranged on a surface of the plate-body. Each pyramid-like structure has a bottom surface, a first convex portion and a second convex portion. The first convex portion and the second convex portion have different vertex angles, and therefore the pyramid-like structure can also be called as “pyramid-like structure with multiple vertex angles”. The pyramid-like structures with multiple vertex angles can increase the light splitting points, which can improve the light splitting effect of the diffusion plate. The light source of a single light-emitting diode can be divided into eight point-light sources (light splitting points) or more, which is double the number of light splitting points compared with the traditional pyramid structure with single vertex, and thus can greatly improve the light diffusion effect.
    Type: Application
    Filed: November 28, 2023
    Publication date: March 28, 2024
    Applicant: Entire Technology Co., Ltd.
    Inventors: Yan-Zuo Chen, Hung Han Kao, Tsung-Chang Yang
  • Patent number: 11940388
    Abstract: Example methods are provided to improve placement of an adaptor (210,220) to a mobile computing device (100) to measure a test strip (221) coupled to the adaptor (220) with a camera (104) and a screen (108) on a face of the mobile computing device (100). The method may include displaying a light area on a first portion of the screen (108). The first portion may be adjacent to the camera (104). The light area and the camera (104) may be aligned with a key area of the test strip (221) so that the camera (104) is configured to capture an image of the key area. The method may further include providing first guiding information for a user to place the adaptor (210,220) to the mobile computing device (100) according to a position of the light area on the screen (108).
    Type: Grant
    Filed: March 16, 2018
    Date of Patent: March 26, 2024
    Assignee: IXENSOR CO., LTD.
    Inventors: Yenyu Chen, An Cheng Chang, Tai I Chen, Su Tung Yang, Chih Jung Hsu, Chun Cheng Lin, Min Han Wang, Shih Hao Chiu
  • Patent number: 11938653
    Abstract: The present invention relates to a powder dry-pressing molding device and method.
    Type: Grant
    Filed: May 8, 2020
    Date of Patent: March 26, 2024
    Assignees: QINGDAO UNIVERSITY OF TECHNOLOGY, SHENYANG HONGYANG PRECISION CERAMICS CO., LTD.
    Inventors: Changhe Li, Mingcun Shi, Xiangyang Ma, Baoda Xing, Xiaohong Ma, Yanbin Zhang, Min Yang, Xin Cui, Teng Gao, Xiaoming Wang, Yali Hou, Han Zhai, Zhen Wang, Bingheng Lu, Huajun Cao, Naiqing Zhang, Qidong Wu
  • Patent number: 11943437
    Abstract: A method of decoding a bitstream by an electronic device is provided. A block unit is determined from an image frame received from the bitstream. An intra prediction mode index corresponding to one of wide-angle candidate modes is determined for the block unit. The electronic device determines whether the intra prediction mode index is different from predefined indices each corresponding to one of predefined wide-angle modes in the wide-angle candidate modes. Filtered samples are generated based on reference samples neighboring the block unit. The filtered samples are generated by an interpolation filter when the intra prediction mode index is different from the predefined indices. The filtered samples are generated by a reference filter when the intra prediction mode index is equal to at least one of the predefined indices. The block unit is reconstructed based on the filtered samples along a mode direction of the intra prediction mode index.
    Type: Grant
    Filed: July 12, 2022
    Date of Patent: March 26, 2024
    Assignee: FG Innovation Company Limited
    Inventors: Yu-Chiao Yang, Po-Han Lin
  • Publication number: 20240096705
    Abstract: A semiconductor device includes a plurality of channel layers vertically separated from one another. The semiconductor device also includes an active gate structure comprising a lower portion and an upper portion. The lower portion wraps around each of the plurality of channel layers. The semiconductor device further includes a gate spacer extending along a sidewall of the upper portion of the active gate structure. The gate spacer has a bottom surface. Moreover, a dummy gate dielectric layer is disposed between the gate spacer and a topmost channel layer of plurality of channel layers. The dummy gate dielectric layer is in contact with a top surface of the topmost channel layer, the bottom surface of the gate spacer, and the sidewall of the gate structure.
    Type: Application
    Filed: November 30, 2023
    Publication date: March 21, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kuei-Yu Kao, Chen-Yui Yang, Hsien-Chung Huang, Chao-Cheng Chen, Shih-Yao Lin, Chih-Chung Chiu, Chih-Han Lin, Chen-Ping Chen, Ke-Chia Tseng, Ming-Ching Chang
  • Patent number: 11935829
    Abstract: In some implementations, one or more semiconductor processing tools may form a via for a semiconductor device. The one or more semiconductor processing tools may deposit a metal plug within the via. The one or more semiconductor processing tools may deposit an oxide-based layer on the metal plug within the via. The one or more semiconductor processing tools may deposit a resistor on the oxide-based layer within the via. The one or more semiconductor processing tools may deposit a first landing pad and a second landing pad on the resistor within the via. The one or more semiconductor processing tools may deposit a first metal plug on the first landing pad and a second metal plug on the second landing pad.
    Type: Grant
    Filed: August 30, 2021
    Date of Patent: March 19, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventor: Chi-Han Yang
  • Patent number: 11933850
    Abstract: A device for detecting a slot wedge, an air gap and a broken rotor bar is provided, where a sequential circuit generates double concurrent pulses; the sequential circuit is connected to driving power modules; the driving power modules are connected to front-end interface circuits; the front-end interface circuits convert the double concurrent pulses into corresponding magnetic-field pulses; the magnetic-field pulses are transmitted to power supply terminals on adjacent phases of stator windings through impedance matching pins and coupled at a corresponding coil, air gap and squirrel cage rotor to generate single groups of cyclic rotating magnetic potentials; single rotating magnetic potentials are sequentially generated in adjacent slots on each of the phases of the stator windings; rotating electric potentials in magnetic circuits with two symmetrical phases are magnetically coupled to form distributed coupling magnetic field reflected full-cycle waves for reflecting a difference of a corresponding slot wedg
    Type: Grant
    Filed: August 2, 2021
    Date of Patent: March 19, 2024
    Assignee: HANGZHOU HENUOVA TECHNOLOGY CO., LTD.
    Inventors: Yuewu Zhang, Weixing Yang, Boyan Zhao, Jie Luo, Gang Du, Chao Wang, Han Gao, Liwei Qiu, Ming Xu, Jiamin Li, Yanxing Bao, Qianyi Zhang, Zuting Cao, Junliang Liu
  • Patent number: 11935932
    Abstract: In an embodiment, a device includes: a gate electrode; a epitaxial source/drain region adjacent the gate electrode; one or more inter-layer dielectric (ILD) layers over the epitaxial source/drain region; a first source/drain contact extending through the ILD layers, the first source/drain contact connected to the epitaxial source/drain region; a contact spacer surrounding the first source/drain contact; and a void disposed between the contact spacer and the ILD layers.
    Type: Grant
    Filed: July 21, 2022
    Date of Patent: March 19, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chun-Han Chen, Chen-Ming Lee, Fu-Kai Yang, Mei-Yun Wang
  • Patent number: 11937337
    Abstract: A method in a core network of a cellular communications system to enable Data over Non-Access Stratum, DoNAS, data delivery in a roaming scenario, the method comprising: sending from the V-SMF to a Home Session Management Function, H-SMF, a Packet Data Unit, PDU, session create request during PDU session establishment for DoNAS data delivery for a User Equipment, UE, in a roaming scenario; and receiving a response from the H-SMF. In embodiments of the method the PDU session create request comprises an indication that a control plane can be used for data delivery.
    Type: Grant
    Filed: October 17, 2019
    Date of Patent: March 19, 2024
    Assignee: Telefonaktiebolaget LM Ericsson (publ)
    Inventors: Qian Chen, Hans Bertil Rönneke, Yong Yang
  • Publication number: 20240088072
    Abstract: Methods, apparatuses, and systems related to embedded metal pads are described. An example semiconductor device includes a dielectric material, a metal pad having side surface, where a lower portion of the side surface is embedded in the dielectric material, a mask material on a portion of a surface of the dielectric material, an upper portion of the side surface of the metal pad, and a portion of a top surface of the metal pad and a contact pillar on a second portion of the top surface of metal pad, the contact pillar comprising a metal pillar and a pillar bump.
    Type: Application
    Filed: September 13, 2022
    Publication date: March 14, 2024
    Inventors: Tsung Han Chiang, Shin Yueh Yang
  • Publication number: 20240087990
    Abstract: Embodiments of the present disclosure provide a method for forming a semiconductor package. In one embodiment, the method includes providing a first integrated circuit die having a first circuit design on a substrate, providing a second integrated circuit die having a second circuit design on the substrate, wherein the first and second integrated circuit dies are separated from each other by a scribe line.
    Type: Application
    Filed: November 22, 2023
    Publication date: March 14, 2024
    Inventors: Shin-Yi YANG, Ming-Han LEE, Shau-Lin SHUE
  • Publication number: 20240086719
    Abstract: A computing system including a plurality of processing devices configured to execute a Mixture-of-Experts (MoE) layer. The processing devices are configured to execute the MoE layer at least in part by receiving an input tensor including input tokens. Executing the MoE layer further includes computing a gating function output vector based on the input tensor and computing a sparse encoding of the input tensor and the gating function output vector. The sparse encoding indicates one or more destination expert sub-models. Executing the MoE layer further includes dispatching the input tensor for processing at the one or more destination expert sub-models, and further includes computing an expert output tensor. Executing the MoE layer further includes computing an MoE layer output at least in part by computing a sparse decoding of the expert output tensor. Executing the MoE layer further includes conveying the MoE layer output to an additional computing process.
    Type: Application
    Filed: May 16, 2023
    Publication date: March 14, 2024
    Applicant: Microsoft Technology Licensing, LLC
    Inventors: Yifan XIONG, Changho HWANG, Wei CUI, Ziyue YANG, Ze LIU, Han HU, Zilong WANG, Rafael Omar SALAS, Jithin JOSE, Prabhat RAM, Ho-Yuen CHAU, Peng CHENG, Fan YANG, Mao YANG, Yongqiang XIONG
  • Publication number: 20240087955
    Abstract: A method and apparatus for forming tungsten features in semiconductor devices is provided. The method includes exposing a top opening of a feature formed in a substrate to a physical vapor deposition (PVD) process to deposit a tungsten liner layer within the feature. The PVD process is performed in a first processing region of a first processing chamber and the tungsten liner layer forms an overhang portion, which partially obstructs the top opening of the feature. The substrate is transferred from the first processing region of the first processing chamber to a second processing region of a second processing chamber without breaking vacuum. The overhang portion is exposed to nitrogen-containing radicals in the second processing region to inhibit subsequent growth of tungsten along the overhang portion. The feature is exposed to a tungsten-containing precursor gas to form a tungsten fill layer over the tungsten liner layer within the feature.
    Type: Application
    Filed: September 1, 2023
    Publication date: March 14, 2024
    Inventors: Yi XU, Xianyuan ZHAO, Zhimin QI, Aixi ZHANG, Geraldine VASQUEZ, Dien-Yeh WU, Wei LEI, Xingyao GAO, Shirish PETHE, Wenting HOU, Chao DU, Tsung-Han YANG, Kyoung-Ho BU, Chen-Han LIN, Jallepally RAVI, Yu LEI, Rongjun WANG, Xianmin TANG
  • Patent number: 11929326
    Abstract: Interconnect structures and method of forming the same are disclosed herein. An exemplary interconnect structure includes a first contact feature in a first dielectric layer, a second dielectric layer over the first dielectric layer, a third dielectric layer over the second dielectric layer, a second contact feature extending through the second dielectric layer and the third dielectric layer, and a graphene layer between the second contact feature and the third dielectric layer.
    Type: Grant
    Filed: December 20, 2021
    Date of Patent: March 12, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Shin-Yi Yang, Ming-Han Lee, Shau-Lin Shue
  • Patent number: 11930199
    Abstract: A method of decoding a bitstream by an electronic device is provided. The method determines a block unit from an image frame received from the bitstream. To reconstruct the block unit, the method receives, from a candidate list, first motion information having a first list flag for selecting a first reference frame and second motion information having a second list flag for selecting a second reference frame. The method then stores a predefined one of the first and second motion information for a sub-block determined in the block unit when the first list flag is identical to the second list flag.
    Type: Grant
    Filed: January 24, 2022
    Date of Patent: March 12, 2024
    Assignee: FG Innovation Company Limited
    Inventors: Chih-Yu Teng, Yu-Chiao Yang, Po-Han Lin
  • Publication number: 20240079704
    Abstract: A battery pack includes, a module stack in which a plurality of battery modules are stacked; a pack housing having a lower housing for supporting the module stack at a lower side thereof and an upper housing coupled to the lower housing from an upper side of the module stack; a plurality of weld nuts fixed to a lower surface of the lower housing; and a plurality of fastening bolts fastened to the weld nuts through the pack housing and the module stack.
    Type: Application
    Filed: October 26, 2020
    Publication date: March 7, 2024
    Applicant: LG ENERGY SOLUTION, LTD.
    Inventors: Jung-Hoon LEE, Doo-Han YOON, Jae-Hun YANG
  • Publication number: 20240077567
    Abstract: An auxiliary positioning system includes an ultra-wideband (UWB) element, and a service management and orchestration (SMO) apparatus and a near-real time ran intelligent controller (Near-RT RIC) connected with each other, wherein the SMO apparatus includes a non-real time ran intelligent controller (Non-RT RIC). The UWB element is connected to a second application disposed at at least one of the SMO apparatus, the Near-RT RIC and the Non-RT RIC through a first application. The UWB element is configured to output positioning information of a user device to the second application through the first application.
    Type: Application
    Filed: March 14, 2023
    Publication date: March 7, 2024
    Applicants: INVENTEC (PUDONG) TECHNOLOGY CORPORATION, INVENTEC CORPORATION
    Inventors: Encheng LIOU, Lien-Feng CHEN, Chang-Han YANG