Patents by Inventor Hanyi Ding
Hanyi Ding has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20140231236Abstract: A micro-electro-mechanical system (MEMS), methods of forming the MEMS and design structures are provided. The method includes forming a coplanar waveguide (CPW) comprising a signal electrode and a pair of electrodes on a substrate. The method includes forming a first sacrificial material over the CPW, and a wiring layer over the first sacrificial material and above the CPW. The method includes forming a second sacrificial material layer over the wiring layer, and forming insulator material about the first sacrificial material and the second sacrificial material. The method includes forming at least one vent hole in the insulator material to expose portions of the second sacrificial material, and removing the first and second sacrificial material through the vent hole to form a cavity structure about the wiring layer and which exposes the signal line and pair of electrodes below the wiring layer. The vent hole is sealed with sealing material.Type: ApplicationFiled: September 30, 2013Publication date: August 21, 2014Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Hanyi DING, Qizhi LIU, Anthony K. STAMPER
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Publication number: 20140231992Abstract: Various embodiments include wafer level chip scale package (WLCSP) structures and methods of tuning such structures. In some embodiments, the WLCSP structure includes: a printed circuit board (PCB) trace connection including at least one PCB ground connection connected with a PCB ground plane; a set of ground solder balls each contacting the printed circuit board trace connection; a set of chip pads contacting each of the ground solder balls in the set of ground solder balls; a chip ground plane connecting the set of chip pads; and a signal interconnect interposed between two of the set of ground solder balls, the signal interconnect including: a signal trace connection electrically isolated from the PCB ground plane; a signal ball contacting the signal PCB trace connection; a chip pad contacting the signal ball, and a signal trace connection on a chip contacting the chip pad.Type: ApplicationFiled: February 21, 2013Publication date: August 21, 2014Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Hanyi Ding, Richard S. Graf, Gary R. Hill, Wayne H. Woods, JR.
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Patent number: 8806415Abstract: A method of modeling an integrated circuit chip includes generating a model of a bond pad using a design tool running on a computer device. The method also includes connecting a first inductor, a first resistor, and a first set of parallel-resistor-inductor elements in series between a first node and a second node in the model. The method further includes connecting a second inductor, a second resistor, and a second set of parallel-resistor-inductor elements in series between the second node and a third node in the model. The first node corresponds to a first signal port of the bond pad. The second node corresponds to a second signal port of the bond pad.Type: GrantFiled: February 15, 2013Date of Patent: August 12, 2014Assignee: International Business Machines CorporationInventors: Hanyi Ding, Kai D. Feng, Hailing Wang
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Patent number: 8791771Abstract: A reconfigurable Wilkinson power divider, methods of manufacture and design structures are provided. The structure includes a first port, and a first arm and a second arm connected to the first port. The first arm and the second arm each include one or more tunable t-line circuits. The structure also includes a second port and a third port connected to the first port via the first arm and second arm, respectively.Type: GrantFiled: November 17, 2011Date of Patent: July 29, 2014Assignee: International Business Machines CorporationInventors: Hanyi Ding, Guoan Wang, Wayne H. Woods, Jr., Jiansheng Xu
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Publication number: 20140203967Abstract: Aspects of the invention provide for an architecture and method for testing high frequency phase shifter arrays. In one embodiment, an architecture for testing a phase shifter array, includes: a plurality of power dividers, each power divider configured to receive an output from a phase shifter within the phase shifter array and split the output into a first signal and a second signal; a plurality of power clippers, each power clipper configured to receive the second signal and modify the second signal by limiting an amplitude of the second signal; a first power combiner configured to receive the first signal from each of the plurality of power dividers to generate a first output; and a second power combiner configured to receive the modified second signal from each of the plurality of power clippers to generate a second output.Type: ApplicationFiled: January 21, 2013Publication date: July 24, 2014Applicant: International Business Machines CorporationInventors: Adem G. Aydin, Hanyi Ding
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Publication number: 20140203885Abstract: Aspects of the invention provide for a Marchand balun structure and a related design method. In one embodiment, a marchand balun structure includes: a first trace for an unbalanced port on a first metal layer, the first trace comprising: an unbalanced line including a first width for a first half and a second width for a second half, wherein the second width can be different from the first width; a pair of traces for balanced ports on a second metal layer, the pair of traces comprising: a pair of balanced lines; and a ground plane on a third metal layer, the ground plane comprising: a pair of openings directly under the pair of traces for balanced ports, wherein a center of the unbalanced line of the first trace is offset from a center of the pair of balanced lines of the pair of traces.Type: ApplicationFiled: January 18, 2013Publication date: July 24, 2014Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Hanyi Ding, Yan Ding
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Patent number: 8789003Abstract: Methods for creating a tunable phase shifter include setting physical dimension limits for the tunable phase shifter; determining electrical parameters for the tunable phase shifter, including a characteristic impedance limit and a maximum inductance tuning range, based on the physical dimension limits using a processor; and determining physical dimensions for an inductance tuning transistor and a capacitor tuning transistor, such that a characteristic impedance range is minimized.Type: GrantFiled: April 22, 2013Date of Patent: July 22, 2014Assignee: International Business Machines CorporationInventors: Hanyi Ding, Alberto Valdes Garcia, Wayne H. Woods, Jr.
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Patent number: 8779870Abstract: A low phase variation attenuator uses a combined attenuation path and a phase network to significantly reduce a phase error between a reference signal and an attenuated signal without degrading the insertion loss. A grounded parallel connection of a resistor and a capacitor is employed in series with an attenuation transistor, which is connected to a middle of a two resistor voltage divider. The two resistor voltage divider includes two resistors of equal resistance that are connected in a series connection. The two resistor voltage divider is connected in a parallel connection with a reference transistor, which functions as a main switch for the transmission or attenuation of a radio frequency (RF) signal.Type: GrantFiled: October 5, 2011Date of Patent: July 15, 2014Assignee: International Business Machines CorporationInventors: Pinping Sun, Hanyi Ding, Wayne H. Woods, Jr.
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Patent number: 8748308Abstract: A method of forming and structure for through wafer vias and signal transmission lines formed of through wafer vias. The structure includes, a semiconductor substrate having a top surface and an opposite bottom surface; and an array of through wafer vias comprising at least one electrically conductive through wafer via and at least one electrically non-conductive through wafer via, each through wafer via of the array of through wafer vias extending from the top surface of to the bottom surface of the substrate, the at least one electrically conductive via electrically isolated from the substrate.Type: GrantFiled: November 1, 2012Date of Patent: June 10, 2014Assignee: International Business Machines CorporationInventors: Hanyi Ding, Alvin J. Joseph, Anthony K. Stamper
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Publication number: 20140152337Abstract: A system, method and apparatus may comprise a wafer having a plurality of spiral test structures located on the kerf of the wafer. The spiral test structure may comprise a spiral connected at either end by a capacitor to allow the spiral test structure to resonate. The spiral structures may be located on a first metal layer or on multiple metal layers. The system may further incorporate a test apparatus having a frequency transmitter and a receiver. The test apparatus may be a sensing spiral which may be placed over the spiral test structures. A controller may provide a range of frequencies to the test apparatus and receiving the resonant frequencies from the test apparatus. The resonant frequencies will be seen as reductions in signal response at the test apparatus.Type: ApplicationFiled: December 5, 2012Publication date: June 5, 2014Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Hanyi Ding, Kai D. Feng, Ping-Chuan Wang, Zhijian Yang
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Publication number: 20140104092Abstract: A radiation signal measurement system for millimeter wave transceivers is disclosed. Embodiments of the present invention utilize a laser to align the laser with an antenna. The transceiver is then moved into the path of the laser to align the laser with the transceiver. The transceiver or antenna orientation is changed such that the transceiver and antenna face each other, in an aligned position. Millimeter wave absorber material is applied to the inside and outside of the testing chamber to minimize reflections and interference from outside sources.Type: ApplicationFiled: October 12, 2012Publication date: April 17, 2014Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: RANDALL M. BURNETT, II, HANYI DING, KAI D. FENG, DONALD J. PAPAE, FRANCIS F. SZENHER
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Publication number: 20140097858Abstract: A test circuit for a ring oscillator comprising a plurality of inverting stages includes a power supply, the power supply configured to provide a voltage to the plurality of inverting stages of the ring oscillator at a power output; and a power sensing resistor located between the power output of the power supply and direct current (DC) bias inputs of the inverting stages of the ring oscillator, wherein a signal from the power sensing resistor is configured to be monitored to determine a characteristic of the ring oscillator.Type: ApplicationFiled: October 9, 2012Publication date: April 10, 2014Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Hanyi Ding, Kai D. Feng, Hailing Wang, Zhijian Yang
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Publication number: 20140097524Abstract: An approach for a coplanar waveguide structure in stacked multi-chip systems is provided. A method of manufacturing a semiconductor structure includes forming a first coplanar waveguide in a first chip. The method also includes forming a second coplanar waveguide in a second chip. The method further includes directly connecting the first coplanar waveguide to the second coplanar waveguide using a plurality of chip-to-chip connections.Type: ApplicationFiled: October 4, 2012Publication date: April 10, 2014Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Timothy H. DAUBENSPECK, Hanyi DING, Wolfgang SAUTER, Guoan WANG, Wayne H. WOODS, JR.
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Patent number: 8680689Abstract: An approach for a coplanar waveguide structure in stacked multi-chip systems is provided. A method of manufacturing a semiconductor structure includes forming a first coplanar waveguide in a first chip. The method also includes forming a second coplanar waveguide in a second chip. The method further includes directly connecting the first coplanar waveguide to the second coplanar waveguide using a plurality of chip-to-chip connections.Type: GrantFiled: October 4, 2012Date of Patent: March 25, 2014Assignee: International Business Machines CorporationInventors: Timothy H. Daubenspeck, Hanyi Ding, Wolfgang Sauter, Guoan Wang, Wayne H. Woods, Jr.
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Publication number: 20140062519Abstract: A test device including cobra probes and a method of manufacturing is disclosed. The test device includes a conductive upper plate having an upper guide hole and a conductive lower plate having a lower guide hole. The test device also includes a conductive cobra probe disposed between the upper guide hole of the upper plate and the lower guide hole of the lower plate. A dielectric material insulates the cobra probe from the upper plate and the lower plate.Type: ApplicationFiled: September 6, 2012Publication date: March 6, 2014Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Hanyi DING, John FERRARIO, Barton E. GREEN, Richard J. ST. PIERRE
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Publication number: 20140049325Abstract: A Lange coupler having a first plurality of lines on a first level and a second plurality of lines on a second level. At least one line on the first level is cross-coupled to a respective line on the second level via electromagnetic waves traveling through the first and second plurality of lines. The first and second plurality of lines may be made of metal, and the first level may be higher than the second level. A substrate may be provided into which the first and second plurality of lines are etched so as to define an on-chip Lange coupler.Type: ApplicationFiled: October 30, 2013Publication date: February 20, 2014Applicant: International Business Machines CorporationInventors: Hanyi Ding, Kwan Him Lam
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Patent number: 8643191Abstract: Disclosed is a chip with a power divider/combiner, a module incorporating the chip and associated methods. The divider/combiner comprises first and second metal layers on opposite sides of a substrate. Interconnects extend through the substrate and comprise: a first interconnect, second interconnects annularly arranged about the first interconnect and third interconnects annularly arranged about the second interconnects. Each interconnect comprises one or more through silicon vias lined/filled with a conductor. For a power divider, an opening in the first metal layer at the first interconnect comprises an input port for receiving power and openings in the first or second metal layer at the second interconnects comprise output ports for applying power to other devices. For a power combiner, openings in the first or second metal layer at the second interconnects comprise the input ports and an opening in the first metal layer at the first interconnect comprises an output port.Type: GrantFiled: January 26, 2012Date of Patent: February 4, 2014Assignee: International Business Machines CorporationInventors: Hanyi Ding, Pinping Sun, Guoan Wang, Wayne H. Woods, Jr.
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Patent number: 8645898Abstract: Structures with high-Q value inductors, design structure for high-Q value inductors and methods of fabricating such structures is disclosed herein. A method in a computer-aided design system for generating a functional design model of an inductor is also provided. The method includes: generating a functional representation of a plurality of vertical openings simultaneously formed in a substrate, wherein a first of the plurality of vertical openings is used as through silicon vias and is etched deeper than a second of the plurality of vertical openings used for high-Q inductors; generating a functional representation of a dielectric layer formed in the plurality of vertical openings; and generating a functional representation of a metal layer deposited on the dielectric layer in the plurality of vertical.Type: GrantFiled: June 28, 2012Date of Patent: February 4, 2014Assignee: International Business Machines CorporationInventors: Hanyi Ding, Mete Erturk, Robert A. Groves, Zhong-Xiang He, Peter J. Lindgren, Anthony K. Stamper
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Patent number: 8643431Abstract: A Lange coupler having a first plurality of lines on a first level and a second plurality of lines on a second level. At least one line on the first level is cross-coupled to a respective line on the second level via electromagnetic waves traveling through the first and second plurality of lines. The first and second plurality of lines may be made of metal, and the first level may be higher than the second level. A substrate may be provided into which the first and second plurality of lines are etched so as to define an on-chip Lange coupler.Type: GrantFiled: October 20, 2011Date of Patent: February 4, 2014Assignee: International Business Machines CorporationInventors: Hanyi Ding, Kwan Him Lam
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Patent number: 8592876Abstract: A micro-electro-mechanical system (MEMS), methods of forming the MEMS and design structures are provided. The method comprises forming a coplanar waveguide (CPW) comprising a signal electrode and a pair of electrodes on a substrate. The method comprises forming a first sacrificial material over the CPW, and a wiring layer over the first sacrificial material and above the CPW. The method comprises forming a second sacrificial material layer over the wiring layer, and forming insulator material about the first sacrificial material and the second sacrificial material. The method comprises forming at least one vent hole in the insulator material to expose portions of the second sacrificial material, and removing the first and second sacrificial material through the vent hole to form a cavity structure about the wiring layer and which exposes the signal line and pair of electrodes below the wiring layer. The vent hole is sealed with sealing material.Type: GrantFiled: January 3, 2012Date of Patent: November 26, 2013Assignee: International Business Machines CorporationInventors: Hanyi Ding, Qizhi Liu, Anthony K. Stamper