Patents by Inventor Hao CHU

Hao CHU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10170571
    Abstract: A semiconductor device includes a composite gate structure formed over a semiconductor substrate. The composite gate structure includes a gate dielectric layer, a metal feature, and a semiconductor feature. The metal feature is disposed on the gate dielectric layer. The semiconductor feature is disposed on the gate dielectric layer. The metal feature and the semiconductor feature are stacked on the gate dielectric layer side by side.
    Type: Grant
    Filed: June 30, 2017
    Date of Patent: January 1, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chi-Feng Huang, Chia-Chung Chen, Victor Chiang Liang, Meng-Chang Ho, Chung-Hao Chu, Tz-Hau Guo
  • Patent number: 10157916
    Abstract: Provided is a semiconductor device includes a gate stack, a first doped region, a second doped region, a first lightly doped region and a second lightly doped region. The gate stack is disposed on a substrate. The first doped region is located in the substrate at a first side of the gate stack. The second doped region is located in the substrate at a second side of the gate stack. The first lightly doped region is located in the substrate between the gate stack and the first doped region. The second lightly doped region is located in the substrate between the gate stack and the second doped region. A property of the first lightly doped region is different from a property of the second lightly doped region.
    Type: Grant
    Filed: April 10, 2017
    Date of Patent: December 18, 2018
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Victor Chiang Liang, Chi-Feng Huang, Chia-Chung Chen, Chun-Pei Wu, Fu-Huan Tsai, Chung-Hao Chu Chu, Chin-Nan Chang, Ching-Yu Yang, Ankush Chaudhary
  • Publication number: 20180350026
    Abstract: A system and method are disclosed for processing image data. An example method includes sequentially receiving a plurality of raster lines corresponding to an image, and grouping the plurality of raster lines into a plurality of full-scale horizontal stripes of image data. For each full-scale horizontal stripe of image data, the method: generates a first downscaled version of the full-scale horizontal stripe, generates a full-scale rotated stripe by rotating the full-scale horizontal stripe to a vertical orientation, generates a first downscaled rotated stripe by rotating the first downscaled version of the full-scale horizontal stripe to the vertical orientation, and performs image processing on the full-scale rotated stripe and the first downscaled rotated stripe before all subsequent raster lines of the image have been received.
    Type: Application
    Filed: May 30, 2017
    Publication date: December 6, 2018
    Inventors: Jeffrey Hao Chu, Suolong Dong
  • Patent number: 10114585
    Abstract: Various aspects are described herein. In some aspects, the present disclosure provides a method of communicating data between an electronic unit of a system-on-chip (SoC) and a dynamic random access memory (DRAM). The method includes initiating a memory transaction corresponding to first data. The method includes determining a non-unique first signature and a unique second signature associated with the first data based on content of the first data. The method includes determining if the non-unique first signature is stored in at least one of a local buffer on the SoC separate from the DRAM or the DRAM. The method includes determining if the unique second signature is stored in at least one of the local buffer or the DRAM based on determining the non-unique first signature is stored. The method includes eliminating the memory transaction with respect to the DRAM based on determining the unique second signature is stored.
    Type: Grant
    Filed: March 2, 2017
    Date of Patent: October 30, 2018
    Assignee: QUALCOMM Incorporated
    Inventors: Jeffrey Hao Chu, Subrato Kumar De, Dexter Tamio Chun, Bohuslav Rychlik, Richard Alan Stewart
  • Publication number: 20180290018
    Abstract: A robot for assisting a user in playing golf includes a self-propelled body, a memory device, a processor, a display device, a positioning device, a compass device, a lidar device and a Doppler radar that cooperatively estimate a position at which a golf ball would likely land after a shot, and to display the estimated position on a golf course map for assisting the user to find the golf ball.
    Type: Application
    Filed: September 13, 2017
    Publication date: October 11, 2018
    Inventors: Shao-Ting CHENG, Chien-Hao CHU
  • Publication number: 20180294261
    Abstract: Provided is a semiconductor device includes a gate stack, a first doped region, a second doped region, a first lightly doped region and a second lightly doped region. The gate stack is disposed on a substrate. The first doped region is located in the substrate at a first side of the gate stack. The second doped region is located in the substrate at a second side of the gate stack. The first lightly doped region is located in the substrate between the gate stack and the first doped region. The second lightly doped region is located in the substrate between the gate stack and the second doped region. A property of the first lightly doped region is different from a property of the second lightly doped region.
    Type: Application
    Filed: April 10, 2017
    Publication date: October 11, 2018
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Victor Chiang Liang, Chi-Feng Huang, Chia-Chung Chen, Chun-Pei Wu, Fu-Huan Tsai, Chung-Hao Chu Chu, Chin-Nan Chang, Ching-Yu Yang, Ankush Chaudhary
  • Publication number: 20180288344
    Abstract: Systems and methods for switching voltage operating points of an image signal processing pipeline are provided. The method comprises capturing an image during a sensor frame time. The method further comprises storing a plurality of pixels associated with the captured image. The method further comprises reading a first set of plurality of pixels within the sensor frame time. The method further comprises processing the first set of plurality of pixels and count a first set of plurality of pixels. The method further comprises comparing the count value with a pixel threshold value. The method further comprises, in response to the pixel count value reaching the pixel threshold value, switching the image signal processing pipeline from a first voltage operating point to a second voltage operating point.
    Type: Application
    Filed: March 28, 2017
    Publication date: October 4, 2018
    Inventors: Jeffrey Hao Chu, Suolong Dong
  • Publication number: 20180277666
    Abstract: A bipolar junction transistor includes a semiconductor substrate, a fin structure, an epitaxial emitter, an epitaxial collector and a gate. The fin structure is disposed on the semiconductor substrate and has a base portion of a first conductivity type, a first recessed portion and a second recessed portion. The epitaxial emitter of a second conductivity type is disposed in the first recessed portion of the fin structure. The epitaxial collector of the second conductivity type is disposed in the second recessed portion of the fin structure. The gate is disposed on the base portion of the fin structure and isolated from the base portion of the fin structure.
    Type: Application
    Filed: March 22, 2017
    Publication date: September 27, 2018
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chung-Hao Chu, Chi-Feng Huang, Chia-Chung Chen, Victor Chiang Liang
  • Publication number: 20180253258
    Abstract: Various aspects are described herein. In some aspects, the present disclosure provides a method of communicating data between an electronic unit of a system-on-chip (SoC) and a dynamic random access memory (DRAM). The method includes initiating a memory transaction corresponding to first data. The method includes determining a non-unique first signature and a unique second signature associated with the first data based on content of the first data. The method includes determining if the non-unique first signature is stored in at least one of a local buffer on the SoC separate from the DRAM or the DRAM. The method includes determining if the unique second signature is stored in at least one of the local buffer or the DRAM based on determining the non-unique first signature is stored. The method includes eliminating the memory transaction with respect to the DRAM based on determining the unique second signature is stored.
    Type: Application
    Filed: March 2, 2017
    Publication date: September 6, 2018
    Inventors: Jeffrey Hao CHU, Subrato Kumar DE, Dexter Tamio CHUN, Bohuslav RYCHLIK, Richard Alan STEWART
  • Patent number: 9984637
    Abstract: An array substrate and a manufacturing method thereof, and a display panel including the array substrate and a driving method thereof are provided. Each of the sub-pixel units of the array substrate includes a first thin film transistor and a second thin film transistor; the first thin film transistor includes a first gate electrode, a first source electrode and a first drain electrode; the second thin film transistor includes a second gate electrode, a second source electrode and a second drain electrode; each of the sub-pixel unit further includes a first pixel electrode electrically connected to the first drain electrode, a second pixel electrode electrically connected to the second drain electrode; and the first pixel electrode and the second pixel electrode are disposed in different layers and insulated with each other.
    Type: Grant
    Filed: February 18, 2016
    Date of Patent: May 29, 2018
    Assignees: BOE Technology Group Co., Ltd., Hefei BOE Optoelectronics Technology Co., Ltd.
    Inventors: Hao Chu, Yue Shi, Kaidi Fang
  • Patent number: 9972809
    Abstract: The present disclosure provides an array substrate, an OLED display panel and a display device. The array substrate includes a light-emitting region and a non-light-emitting region, wherein an anode, an organic light-emitting layer and a cathode on a base substrate are arranged at the non-light-emitting region, and a metal structure on the base substrate is arranged at the non-light-emitting region, wherein the array substrate further comprises a first light-absorbing layer arranged at the non-light-emitting region and configured to absorb a light beam from the organic light-emitting layer and arriving at the non-light-emitting region, and the cathode is transparent, and the anode is transparent or nontransparent.
    Type: Grant
    Filed: April 21, 2016
    Date of Patent: May 15, 2018
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., HEFEI BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Hao Chu, Jing Hu
  • Publication number: 20180071578
    Abstract: A wearable augmented reality device for golf play assists a golfer who plays golf with a ball and a club, and includes a camera, a memory, a processor and a display. The camera captures an image of the ball and the club so as to obtain a captured image. The memory stores an image recognition module and an image calculation module. The processor executes the image recognition module so as to recognize the ball and the club in the captured image, to execute the image calculation module so as to determine whether the ball is hit by the club according to a positional relationship between the ball and the club in the captured image, and to calculate flight information of the ball to be displayed by the display when it is determined that the ball is hit by the club.
    Type: Application
    Filed: February 2, 2017
    Publication date: March 15, 2018
    Inventor: Chien-Hao CHU
  • Publication number: 20170336702
    Abstract: A light source module of a projector includes a light source having a lamp axis, a fan for providing a cooling airflow, and a flow guide device disposed between the light source and the fan and for guiding the cooling airflow. The flow guide device includes a first air channel connected between a side of the light source and an air outlet of the fan, a second air channel connected between another side of the light source and the air outlet of the fan, and a first airflow control assembly disposed in the first air channel and for controlling the first air channel either in communication or non-communication states via gravity. The first airflow control assembly has a first control rotating shaft inclined relative to the lamp axis and a first included angle between the first control rotating shaft and the lamp axis is less than 90 degrees.
    Type: Application
    Filed: May 16, 2017
    Publication date: November 23, 2017
    Inventors: Wen-Hao Chu, Te-Tang Chen, Tsung-Ching Lin
  • Publication number: 20170287421
    Abstract: An array substrate and a manufacturing method thereof, and a display panel including the array substrate and a driving method thereof are provided. Each of the sub-pixel units of the array substrate includes a first thin film transistor and a second thin film transistor; the first thin film transistor includes a first gate electrode, a first source electrode and a first drain electrode; the second thin film transistor includes a second gate electrode, a second source electrode and a second drain electrode; each of the sub-pixel unit further includes a first pixel electrode electrically connected to the first drain electrode, a second pixel electrode electrically connected to the second drain electrode; and the first pixel electrode and the second pixel electrode are disposed in different layers and insulated with each other.
    Type: Application
    Filed: February 18, 2016
    Publication date: October 5, 2017
    Applicants: BOE Technology Group Co., Ltd., Hefei BOE Optoelectronics Technology Co., Ltd.
    Inventors: Hao Chu, Yue Shi, Kaidi Fang
  • Publication number: 20170062772
    Abstract: The present disclosure provides an array substrate, an OLED display panel and a display device. The array substrate includes a light-emitting region and a non-light-emitting region, wherein an anode, an organic light-emitting layer and a cathode on a base substrate are arranged at the non-light-emitting region, and a metal structure on the base substrate is arranged at the non-light-emitting region, wherein the array substrate further comprises a first light-absorbing layer arranged at the non-light-emitting region and configured to absorb a light beam from the organic light-emitting layer and arriving at the non-light-emitting region, and the cathode is transparent, and the anode is transparent or nontransparent.
    Type: Application
    Filed: April 21, 2016
    Publication date: March 2, 2017
    Applicants: BOE TECHNOLOGY GROUP CO., LTD., HEFEI BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Hao CHU, Jing HU
  • Patent number: 9498894
    Abstract: A cutting device includes a bottom plate, a platform located on the bottom plate for holding a workpiece, a first support plate connected to the support plate and located above the bottom plate, a first telescopic cylinder having a first piston, a blade connected to the first piston, a first medium providing device configured to provide medium, a first switch including a gateway A1 connected to a first lower cavity of the first telescopic cylinder, a gateway B1 opened to the outside, a gateway P1 connected to the first medium providing device, a first sensor including a gateway A2 opened to the outside, a gateway B2 communicating with a first upper cavity of the first telescopic cylinder, and a gateway P2 connected to the gateway B1.
    Type: Grant
    Filed: December 23, 2013
    Date of Patent: November 22, 2016
    Assignee: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventor: Chih-Hao Chu
  • Publication number: 20160332056
    Abstract: A low-bouncing buffer net includes a net material, a net frame and a buffering material. The net frame is used for supporting the net material. The buffering material is disposed on the net material. The disclosure can reduce the bouncing force generated after a golf ball contacts the net and ensure that the golf ball can be stopped in the target.
    Type: Application
    Filed: August 18, 2015
    Publication date: November 17, 2016
    Inventor: CHIEN-HAO CHU
  • Patent number: 9473247
    Abstract: The present invention relates to a device and a method for conversion from optical double-sideband modulation signals to optical single-sideband modulation signals. Period-one nonlinear dynamics of semiconductor lasers is utilized to achieve such optical signal conversion. Only a typical semiconductor laser is required as the key conversion unit. The microwave and data quality are maintained or even improved after conversion, increasing detection sensitivity, transmission distance, and link gain of the communication networks. The device is relatively less sensitive to ambient variations, can be self-adapted to changes in operating conditions, and can be applied for a broad range of operating microwave frequency up to at least 80 GHz and a high data rate up to at least 2.5 Gbits/s. The device can therefore be dynamically reconfigured for different communication networks adopting different operating microwave frequencies and different data rates.
    Type: Grant
    Filed: April 30, 2014
    Date of Patent: October 18, 2016
    Assignee: NATIONAL CHENG KUNG UNIVERSITY
    Inventors: Sheng-Kwang Hwang, Yu-Han Hung, Cheng-Hao Chu
  • Patent number: 9304884
    Abstract: A test apparatus applicable to a server includes a processing unit, a control unit, a switch unit and a power relay unit. The processing unit outputs a reset signal and a processing signal. The control unit includes a first physical layer chip performing a first communication protocol, and a second physical layer chip performing a second communication protocol. The switch unit receives a working voltage and a processing signal to select a powering signal or a disconnection signal to output. The power relay unit receives the powering signal or the disconnection signal. When the power relay unit receives the powering signal, the server performs a test task on the first physical layer chip. When the power relay unit receives the disconnection signal and the processing unit outputs the reset signal to the control unit, the server performs the test task on the second physical layer chip.
    Type: Grant
    Filed: October 14, 2013
    Date of Patent: April 5, 2016
    Assignees: INVENTEC (PUDONG) TECHNOLOGY CORPORATION, INVENTEC CORPORATION
    Inventor: Chun-Hao Chu
  • Publication number: 20160026588
    Abstract: Various embodiments of methods and systems for precompensated bus width conversion (“PBWC”) in a portable computing device (“PCD”) are disclosed. Because starting memory addresses for data transfers emanating from a processing engine in a system on a chip (“SoC”) may be misaligned with a starting memory address of a main bus on the SoC, PBWC solutions seek to precompensate data transfers to align the starting addresses. Advantageously, by doing so PBWC embodiments may significantly reduce the amount of “filler” data chunks that are transferred through the main bus, thereby optimizing band width utilization of the main bus.
    Type: Application
    Filed: July 23, 2014
    Publication date: January 28, 2016
    Inventors: Jeffrey Hao CHU, Neil Evan CHRISTANTO