Patents by Inventor Hao CHUNG

Hao CHUNG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140264271
    Abstract: A ferroelectric memory device includes a memory layer, made of a silicon-based ferroelectric memory material. The silicon-based ferroelectric memory material includes a mesoporous silica film with nanopores and atomic polar structures on inner walls of the nanopores. The atomic polar structures are formed by asymmetrically bonding metal ions to silicon-oxygen atoms on the inner walls, and the silicon-based ferroelectric memory material includes semiconductor quantum dots, metal quantum dots and metal-semiconductor alloy quantum dots.
    Type: Application
    Filed: March 18, 2013
    Publication date: September 18, 2014
    Applicant: NATIONAL APPLIED RESEARCH LABORATORIES
    Inventors: Jia-Min Shieh, Wen-Hsien Huang, Yu-Chung Lien, Chang-Hong Shen, Fu-Ming Pan, Hao-Chung Kuo
  • Patent number: 8829652
    Abstract: A light emitting device with graded composition hole tunneling layer is provided. The device comprises a substrate and an n-type semiconductor layer is disposed on the substrate, in which the n-type semiconductor layer comprises a first portion and a second portion. A graded composition hole tunneling layer is disposed on the first portion of the n-type semiconductor layer. An electron blocking layer is disposed on the graded composition hole tunneling layer. A p-type semiconductor layer is disposed on the electron blocking layer. A first electrode is disposed on the p-type semiconductor layer, and a second electrode is disposed on the second portion of the n-type semiconductor layer and is electrical insulated from the first portion of the n-type semiconductor. The graded composition hole tunneling layer is used as the quantum-well to improve the transport efficiency of the holes to increase the light emitting efficiency of the light emitting device.
    Type: Grant
    Filed: July 17, 2012
    Date of Patent: September 9, 2014
    Assignee: National Chiao Tung University
    Inventors: Chao-Hsun Wang, Hao-Chung Kuo
  • Patent number: 8764666
    Abstract: An imaging probe for a biological sample includes an OCT probe and an ultrasound probe combined with the OCT probe in an integral probe package capable of providing by a single scanning operation images from the OCT probe and ultrasound probe to simultaneously provide integrated optical coherence tomography (OCT) and ultrasound imaging of the same biological sample. A method to provide high resolution imaging of biomedical tissue includes the steps of finding an area of interest using the guidance of ultrasound imaging, and obtaining an OCT image and once the area of interest is identified where the combination of the two imaging modalities yields high resolution OCT and deep penetration depth ultrasound imaging.
    Type: Grant
    Filed: October 28, 2009
    Date of Patent: July 1, 2014
    Assignee: The Regents of the University of California
    Inventors: Zhongping Chen, Jiechen Yin, Qifa Zhou, Changhong Hu, Hao-Chung Yang, Huihua Kenny Chiang, Kirk K. Shung
  • Patent number: 8742442
    Abstract: A method for patterning an epitaxial substrate includes: (a) forming an etch mask layer over an epitaxial substrate, and patterning the etch mask layer using a patterned cover mask layer to form the etch mask layer into a plurality of spaced apart mask patterns; and (b) etching the epitaxial substrate that is exposed from the mask patterns, and removing the mask patterns such that the epitaxial substrate is formed with a plurality of spaced apart substrate patterns.
    Type: Grant
    Filed: April 18, 2012
    Date of Patent: June 3, 2014
    Assignee: Sino-American Silicon Products Inc.
    Inventors: Cheng-Hung Wei, Bo-Wen Lin, Ching-Yen Peng, Hao-Chung Kuo, Wen-Ching Hsu
  • Patent number: 8721346
    Abstract: A signal transmission module is provided. The signal transmission module includes an electrical connector, a linked unit, a data connector, a sliding block, a link and a lock block. The data connector rotates and expands according to a first shaft and a first elastomer of the linked unit, and electrically connects to the electrical connector. During retraction of the data connector, the data connector pushes the sliding block. Then the sliding block moves against the lock block so that the lock block rotates. The lock block rotates to lock and secure the data connector by the lock piece, while a cam of the link moves to a secure location along an incline plane of a track of the sliding block.
    Type: Grant
    Filed: July 5, 2011
    Date of Patent: May 13, 2014
    Assignee: Ability Enterprise Co., Ltd.
    Inventors: Yu-Fang Lin, Hsien-Ming Lee, Hao-Chung Lien
  • Publication number: 20140126627
    Abstract: A search apparatus and search method of prediction mode having direction are provided. The apparatus and method can be applied to intra-prediction of video processing. An initial prediction mode is quickly selected based on a distribution of directional energy values. A plurality of first-stage prediction modes are obtained by spreading out from the initial prediction mode. A fine adjustment is processed according to the prediction mode of a neighboring block. The coding costs of the first-stage prediction modes are calculated and then the prediction mode with the lowest coding cost is selected. Therefore, a total calculation amount is reduced.
    Type: Application
    Filed: February 26, 2013
    Publication date: May 8, 2014
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Ce-Min Fang, Wen-Hao Chung
  • Publication number: 20140084238
    Abstract: A nano-patterned substrate includes a substrate and a plurality of nano-structures. The substrate has an upper surface and each of the plurality of nano-structures comprises a semiconductor buffer region and a buffer region formed on the upper surface of the substrate, wherein one of the pluralities of nano-structures has a ratio of height to diameter greater than 1, and an arc-shaped top surface.
    Type: Application
    Filed: December 1, 2013
    Publication date: March 27, 2014
    Applicants: SINO-AMERICAN SILICON PRODUCTS. LNC., EPISTAR CORPORATION
    Inventors: Zhen-Yu Li, Ching-Hua Chiu, Hao-Chung Kuo, Tien-Chang Lu
  • Publication number: 20140077224
    Abstract: The present disclosure involves an apparatus. The apparatus includes a substrate having a front side a back side opposite the front side. The substrate includes a plurality of openings formed from the back side of the substrate. The openings collectively define a pattern on the back side of the substrate from a planar view. In some embodiments, the substrate is a silicon substrate or a silicon carbide substrate. Portions of the silicon substrate vertically aligned with the openings have vertical dimensions that vary from about 100 microns to about 300 microns. A III-V group compound layer is formed over the front side of the silicon substrate. The III-V group compound layer is a component of one of: a light-emitting diode (LED), a laser diode (LD), and a high-electron mobility transistor (HEMT).
    Type: Application
    Filed: September 14, 2012
    Publication date: March 20, 2014
    Applicant: TSMC Solid State Lighting Ltd.
    Inventors: Zhen-Yu Li, Chung-Pao Lin, Hsing-Kuo Hsia, Hao-Chung Kuo, Cindy Huichun Shu, Hsin-Chieh Huang
  • Publication number: 20140077153
    Abstract: The present disclosure involves a light-emitting device. The light-emitting device includes an n-doped gallium nitride (n-GaN) layer located over a substrate. A multiple quantum well (MQW) layer is located over the n-GaN layer. An electron-blocking layer is located over the MQW layer. A p-doped gallium nitride (p-GaN) layer is located over the electron-blocking layer. The light-emitting device includes a hole injection layer. In some embodiments, the hole injection layer includes a p-doped indium gallium nitride (p-InGaN) layer that is located in one of the three following locations: between the MQW layer and the electron-blocking layer; between the electron-blocking layer and the p-GaN layer; and inside the p-GaN layer.
    Type: Application
    Filed: September 14, 2012
    Publication date: March 20, 2014
    Applicant: TSMC Solid State Lighting Ltd.
    Inventors: Zhen-Yu Li, Tzu-Te Yang, Hon-Way Lin, Chung-Pao Lin, Kuan-Chun Chen, Ching-Yu Chen, You-Da Lin, Hao-Chung Kuo
  • Publication number: 20140078757
    Abstract: The present disclosure involves a lighting apparatus. The lighting apparatus includes a polygon die. The polygon die includes a plurality of light-emitting diodes (LEDs). Each LED includes a plurality of epi-layers, the epi-layers containing a p-type layer, an n-type layer, and a multiple quantum well (MQW) disposed between the p-type layer and the n-type layer. Each LED includes a p-type electrode and an n-type electrode electrically coupled to the p-type layer and the n-type layer, respectively. The polygon die also includes a submount to which each of the LEDs is coupled. The p-type and the n-type electrodes are located between the submount and the epi-layers. The submount contains a plurality of conductive elements configured to electrically couple at least a portion of the plurality of LEDs in series.
    Type: Application
    Filed: March 8, 2013
    Publication date: March 20, 2014
    Applicant: TSMC Solid State Lighting Ltd.
    Inventors: Kuan-Chun Chen, Hao-Chung Kuo, You-Da Lin, Zhen-Yu Li
  • Publication number: 20140077152
    Abstract: The present disclosure involves an illumination apparatus. The illumination apparatus includes an n-doped semiconductor compound layer, a p-doped semiconductor compound layer spaced apart from the n-doped semiconductor compound layer, and a multiple-quantum-well (MQW) disposed between the first semiconductor compound layer and the second semiconductor compound layer. The MQW includes a plurality of alternating first and second layers. The first layers of the MQW have substantially uniform thicknesses. The second layers have graded thicknesses with respect to distances from the p-doped semiconductor compound layer. A subset of the second layers located most adjacent to the p-doped semiconductor compound layer is doped with a p-type dopant. The doped second layers have graded doping concentration levels that vary with respect to distances from the p-doped semiconductor layer.
    Type: Application
    Filed: September 14, 2012
    Publication date: March 20, 2014
    Applicant: TSMC Solid State Lighting Ltd.
    Inventors: Zhen-Yu Li, Hon-Way Lin, Chung-Pao Lin, Hsing-Kuo Hsia, Hao-Chung Kuo
  • Publication number: 20140065754
    Abstract: The invention discloses a method for fabricating power-generating module with solar cell. The method includes the steps of providing a flexible substrate; forming a solar cell unit on the flexible substrate by using a high density plasma at a temperature lower than about 150° C.; and forming a circuit unit on the flexible substrate; wherein the solar cell unit is coupled to the circuit unit, so as to provide the power needed for the operation of the circuit unit.
    Type: Application
    Filed: November 8, 2013
    Publication date: March 6, 2014
    Applicant: NATIONAL APPLIED RESEARCH LABORATORIES
    Inventors: Jia-Min SHIEH, Chang-Hong SHEN, Wen-Hsien HUANG, Bau-Tong DAI, Jung Y. HUANG, Hao-Chung KUO
  • Publication number: 20140063185
    Abstract: A method and device for coding interlaced video data. The method includes coding interlaced video data captured from a plurality of different positions, the interlaced video data including data for a top field and a bottom field for at least one interlaced video scan, the top field including every other line starting with a top line of a frame and the bottom field including interposed lines in the frame.
    Type: Application
    Filed: December 21, 2012
    Publication date: March 6, 2014
    Applicant: Industrial Technology Research Institute
    Inventors: Fang-Chu Chen, Ching-Chieh Lin, Wen-Hao Chung
  • Publication number: 20140060592
    Abstract: A cleaning device includes a first linearly driving assembly, a second linearly driving assembly, a rotation driving assembly, and a sprayer connected one by one in that order. The first linearly driving assembly drives the second linearly driving assembly, the rotation driving assembly, and the sprayer to move along a first direction. The second linearly driving assembly drives the rotation driving assembly and the sprayer to move along a second direction. The rotation driving assembly rotates the sprayer along an axis perpendicular to the first direction and the second direction.
    Type: Application
    Filed: August 26, 2013
    Publication date: March 6, 2014
    Applicants: HON HAI PRECISION INDUSTRY CO., LTD., HONG FU JIN PRECISION INDUSTRY (ShenZhen) CO., LTD .
    Inventors: HAI-FENG PAN, WEN-LI WANG, TIAN-FENG HUANG, HAO-CHUNG LEE
  • Patent number: 8644387
    Abstract: For de-interlacing a current interlaced field using a prior interlaced field and a subsequent interlaced field, a motion estimation method is performed with a group of motion-vector sets. Each motion-vector set includes at least two motion vectors. According to the two motion vectors and a specified block of the current interlaced field, which contains a missing pixel to be estimated, a pair of candidate blocks are defined in the prior and subsequent interlaced fields, respectively. By comparing a plurality of pairs of candidate blocks with the specified block, the best matching block pair can be found and used for de-interlacing.
    Type: Grant
    Filed: April 3, 2008
    Date of Patent: February 4, 2014
    Assignee: Mstar Semiconductor, Inc.
    Inventor: Chia-Hao Chung
  • Publication number: 20140008609
    Abstract: A method of fabricating a light emitting device, comprising: providing a substrate; forming an undoped semiconductor layer on the substrate; forming a patterned metal layer on the undoped semiconductor layer; using the patterned metal layer as a mask to etch the undoped semiconductor layer and forming a plurality of nanorods on the substrate; and forming an light emitting stack on the plurality of nanorods to form a plurality of voids between the light emitting stack and the plurality of nanorods.
    Type: Application
    Filed: July 2, 2013
    Publication date: January 9, 2014
    Inventors: Ching Hsueh Chiu, Po Min Tu, Hao Chung Kuo, Chun Yen Chang, Shing Chung Wang
  • Publication number: 20130342103
    Abstract: A solid state lighting luminaire, which comprises a solid state light source, an encapsulated structure, and a first phosphor, is provided. The encapsulated structure encapsulates the solid state light source and has an outside illuminating surface. The first phosphor is patterned to cover a portion of the outside illuminating surface for down-converting the illumination from the solid state light source.
    Type: Application
    Filed: June 25, 2012
    Publication date: December 26, 2013
    Inventors: Shing-Chung WANG, Hao-Chung KUO, Hsin-Chu CHEN, Kuo-Ju CHEN
  • Publication number: 20130320418
    Abstract: A device includes a semiconductor substrate, a well region in the semiconductor substrate, and a Metal-Oxide-Semiconductor (MOS) device. The MOS device includes a gate dielectric overlapping the well region, a gate electrode over the gate dielectric, and a source/drain region in the well region. The source/drain region and the well region are of opposite conductivity types. An edge of the first source drain region facing away from the gate electrode is in contact with the well region to form a junction isolation.
    Type: Application
    Filed: August 17, 2012
    Publication date: December 5, 2013
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chien-Hsien Tseng, Shou-Gwo Wuu, Chia-Chan Chen, Kuo-Yu Wu, Dao-Hong Yang, Ming-Hao Chung
  • Publication number: 20130302926
    Abstract: A method for fabricating semiconductor dice includes the steps of providing a wafer assembly having a substrate and semiconductor structures on the substrate; and defining the semiconductor dice on the substrate. The method also includes the step of separating the substrate from the semiconductor structures by applying a first laser pulse to each semiconductor die on the substrate having first parameters selected to break an interface between the substrate and the semiconductor structures and then applying a second laser pulse to each semiconductor die on the substrate having second parameters selected to complete separation of the substrate from the semiconductor structures. The method can also include the steps of forming one or more intermediate structures between the semiconductor dice on the substrate configured to protect the semiconductor dice during the separating step.
    Type: Application
    Filed: July 8, 2013
    Publication date: November 14, 2013
    Inventors: Chen-Fu Chu, Hao-Chung Cheng, Trung Tri Doan, Feng-Hsu Fan
  • Patent number: 8563964
    Abstract: A semiconductor light emitting device is disclosed, which comprises: a substrate having a first surface and a second surface; a first semiconductor conductive layer is disposed on the first surface of the substrate; an insert layer is disposed on the first semiconductor conductive layer; an active layer is disposed on the insert layer; a second semiconductor conductive layer is disposed on the active layer; a first electrode is disposed on the second semiconductor conductive layer; and a second electrode is disposed on the second surface of the substrate, in which the electric of the second electrode is opposite to that of the first electrode.
    Type: Grant
    Filed: June 29, 2011
    Date of Patent: October 22, 2013
    Assignee: National Chiao Tung University
    Inventors: Chao-Hsun Wang, Zhen-Yu Li, Hao-Chung Kuo