Patents by Inventor Hao CHUNG

Hao CHUNG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150287881
    Abstract: A light emitting diode device comprises the transparent conductive layer is formed on the conductive substrate, the p-type semiconductor layer is formed on the transparent conductive layer, the active layer is formed on the p-type semiconductor layer, and the n-type semiconductor layer is formed on the active layer, the buffer layer is formed on the n-type semiconductor layer, and a metal electrode is formed on a rough and uneven surface of the buffer layer, in which the electrical property of the n-type semiconductor layer is opposites to that of the p-type semiconductor layer. The reflective effect within the light emitting diode device can be increased. In addition, by reducing the thickness of the undoped GaN layer, the absorption of ultraviolet light inside the components of the light emitting diode device can be reduced.
    Type: Application
    Filed: July 8, 2014
    Publication date: October 8, 2015
    Inventors: Hung-Shen CHU, Da-Wei LIN, Hao-Chung KUO
  • Publication number: 20150287879
    Abstract: A light emitting diode device is provided, which comprises a silicon-based substrate, a buffer layer, a super lattice structure layer, a nano-structure layer, a first semiconductor layer, a light emitting layer, and a second semiconductor layer. The buffer layer is formed on the silicon-based substrate, the super lattice structure layer is formed on the buffer layer, the nano-structure layer is formed on the super lattice structure layer, a first semiconductor layer is formed on the nano-structure layer, and the light emitting layer is formed between the first semiconductor layer and the second semiconductor layer. The super lattice layer and the nano-structure can release the stress within the light emitting diode device, and reduce the epitaxy defect, so that the internal quantum effect and the external quantum effect can be increased.
    Type: Application
    Filed: August 18, 2014
    Publication date: October 8, 2015
    Inventors: Chia-Yu LEE, Da-Wei LIN, An-Jye TZOU, Hao-Chung KUO
  • Patent number: 9135676
    Abstract: An image interpolation processing apparatus includes a motion vector generating module, for generating a first reference motion vector and a second reference motion vector for an interpolated block of an interpolated frame according to the interpolated block and a plurality of blocks adjacent to the interpolated block; a blurred block processing module, for determining an area property of the interpolation block being one of an image covered area, an image uncovered area and a non-blurred area according to the first reference motion vector and the second reference motion vector, and a representative motion vector of the interpolated block being one of the first reference motion vector and the second reference motion vector; and a frame interpolation module, for generating an image content of the interpolated block according to the representative motion vector and the area property.
    Type: Grant
    Filed: October 13, 2010
    Date of Patent: September 15, 2015
    Assignee: MStar Semiconductor, Inc.
    Inventors: Chung-Yi Chen, Chia-Hao Chung
  • Patent number: 9130114
    Abstract: A vertical light emitting diode (VLED) die includes an epitaxial structure having a first-type confinement layer, an active layer on the first-type confinement layer configured as a multiple quantum well (MQW) configured to emit light, and a second-type confinement layer having a roughened surface. In a first embodiment, the roughened surface includes a pattern of holes with a depth (d) in a major surface thereof surrounded by a pattern of protuberances with a height (h) on the major surface. In a second embodiment, the roughened surface includes a pattern of primary protuberances surrounded by a pattern of secondary protuberances.
    Type: Grant
    Filed: May 16, 2013
    Date of Patent: September 8, 2015
    Assignee: SemiLEDS Optoelectronics Co., Ltd.
    Inventors: Chen-Fu Chu, Hao-Chung Cheng, Feng-Hsu Fan, Wen-Huang Liu, Chao-Chen Cheng, David Trung Doan, Yang Po Wen
  • Patent number: 9099593
    Abstract: The present disclosure involves an illumination apparatus. The illumination apparatus includes an n-doped semiconductor compound layer, a p-doped semiconductor compound layer spaced apart from the n-doped semiconductor compound layer, and a multiple-quantum-well (MQW) disposed between the first semiconductor compound layer and the second semiconductor compound layer. The MQW includes a plurality of alternating first and second layers. The first layers of the MQW have substantially uniform thicknesses. The second layers have graded thicknesses with respect to distances from the p-doped semiconductor compound layer. A subset of the second layers located most adjacent to the p-doped semiconductor compound layer is doped with a p-type dopant. The doped second layers have graded doping concentration levels that vary with respect to distances from the p-doped semiconductor layer.
    Type: Grant
    Filed: September 14, 2012
    Date of Patent: August 4, 2015
    Assignee: TSMC Solid State Lighting Ltd.
    Inventors: Zhen-Yu Li, Hon-Way Lin, Chung-Pao Lin, Hsing-Kuo Hsia, Hao-Chung Kuo
  • Patent number: 9076950
    Abstract: A lighting apparatus includes a polygon die including a plurality of light-emitting diodes (LEDs), and a submount to which each of the LEDs is coupled. Each LED includes a plurality of epi-layers which contains a p-type layer, an n-type layer, and a multiple quantum well (MQW) disposed between the p-type layer and the n-type layer, and a p-type electrode and an n-type electrode which are electrically coupled to the p-type layer and the n-type layer, respectively. The p-type and the n-type electrodes are located between the submount and the epi-layers. The submount contains a plurality of conductive elements configured to electrically couple at least a portion of the plurality of LEDs in series. At least some of the plurality of LEDs have non-rectangular top view shapes.
    Type: Grant
    Filed: March 8, 2013
    Date of Patent: July 7, 2015
    Assignee: TSMC SOLID STATE LIGHTING LTD.
    Inventors: Kuan-Chun Chen, Hao-Chung Kuo, You-Da Lin, Zhen-Yu Li
  • Publication number: 20150187998
    Abstract: A package structure applied for method for a solid-state lighting apparatus is disclosed in the present invention and at least comprises a frame, a light emitting member, an encapsulant and a plurality of fluorescent powders. The light emitting member is disposed in the frame. The encapsulant is provided to fill the frame for packing the light emitting member therein, and the fluorescent powders are dispersed in the encapsulant. Furthermore, there is a plurality of scattering particles doped into the encapsulant.
    Type: Application
    Filed: April 30, 2014
    Publication date: July 2, 2015
    Applicant: National Chiao Tung University
    Inventors: Chien-Chung LIN, Hao-Chung KUO, Kuo-Ju CHEN, Hau-Vei HAN, Hsin-Chu CHEN
  • Publication number: 20150171266
    Abstract: The present disclosure involves an apparatus. The apparatus includes a substrate having a front side a back side opposite the front side. The substrate includes a plurality of openings formed from the back side of the substrate. The openings collectively define a pattern on the back side of the substrate from a planar view. In some embodiments, the substrate is a silicon substrate or a silicon carbide substrate. Portions of the silicon substrate vertically aligned with the openings have vertical dimensions that vary from about 100 microns to about 300 microns. A III-V group compound layer is formed over the front side of the silicon substrate. The III-V group compound layer is a component of one of: a light-emitting diode (LED), a laser diode (LD), and a high-electron mobility transistor (HEMT).
    Type: Application
    Filed: February 25, 2015
    Publication date: June 18, 2015
    Inventors: Zhen-Yu Li, Chung-Pao Lin, Hsing-Kuo Hsia, Hao-Chung Kuo, Cindy Huichun Shu, Hsin-Chieh Huang
  • Patent number: 9040333
    Abstract: The invention discloses a method for fabricating power-generating module with solar cell. The method includes the steps of providing a flexible substrate; forming a solar cell unit on the flexible substrate by using a high density plasma at a temperature lower than about 150° C.; and forming a circuit unit on the flexible substrate; wherein the solar cell unit is coupled to the circuit unit, so as to provide the power needed for the operation of the circuit unit.
    Type: Grant
    Filed: November 8, 2013
    Date of Patent: May 26, 2015
    Assignee: National Applied Research Laboratories
    Inventors: Jia-Min Shieh, Chang-Hong Shen, Wen-Hsien Huang, Bau-Tong Dai, Jung Y. Huang, Hao-Chung Kuo
  • Patent number: 9027399
    Abstract: A quartz glass liquid level sensor includes a support frame, a light masking plate, a quartz glass tube, and a sensor module. The light masking plate is movably mounted on the support frame. The quartz glass tube is movably mounted to the support frame. One end of the quartz glass tube is securely fixed to the light masking plate. The sensor module is mounted on the support frame, for sensing a position of the light masking plate relative to the support frame.
    Type: Grant
    Filed: January 30, 2013
    Date of Patent: May 12, 2015
    Assignees: Hong Fu Jin Precision Industry (ShenZhen) Co., Ltd., Hon Hai Precision Industry Co., Ltd.
    Inventors: Tian-Feng Huang, Wen-Li Wang, Hao-Chung Lee
  • Patent number: 9022751
    Abstract: An impeller includes a metal base plate, a shaft and a plurality of plastic blades. The metal base plate includes a shaft-coupling portion, a peripheral portion, and first and second surfaces. The first surface faces away from the second surface in a first direction, and the second surface faces away from the first surface in a second direction. The metal base plate is flat between the shaft-coupling portion and the peripheral portion. The first surface has a permanent magnet. The shaft has a fixing end coupled with the shaft-coupling portion, as well as a free end extending axially in the first direction. Each plastic blade has a coupling portion coupled with the peripheral portion, as well as an air-driving portion axially extending in the second direction. The impeller may be rotatably coupled with a driving module. The driving module is installed in a fan frame to form an advection fan.
    Type: Grant
    Filed: September 14, 2012
    Date of Patent: May 5, 2015
    Assignee: Sunonwealth Electric Machine Industry Co., Ltd.
    Inventors: Yuan-Jie Zheng, Chih-Hao Chung, Tso-Kuo Yin
  • Patent number: 8993409
    Abstract: A method for fabricating air media layer within the semiconductor optical device is provided. The step of method includes a substrate is provided, a GaN thin film is formed on the substrate, a sacrificial layer is formed on the GaN thin film, and a nitride-containing semiconductor layer is formed on the sacrificial layer. The semiconductor optical device is immersed with an acidic solution to remove the portion of sacrificial layer to form an air media layer around the residual sacrificial layer.
    Type: Grant
    Filed: March 8, 2012
    Date of Patent: March 31, 2015
    Assignee: National Chiao Tung University
    Inventors: Tien-Chang Lu, Huei-Min Huang, Hao-Chung Kuo, Shing-Chung Wang
  • Patent number: 8989268
    Abstract: Method and apparatus for motion estimation for video processing. An embodiment of a method for motion estimation includes the following steps. In the course of motion estimation, integer motion estimation is performed with respect to a macroblock to generate a plurality of integer motion vectors. It is determined, according to a portion of the motion vectors, which correspond to a plurality of block modes, whether the integer motion vectors of each block mode are substantially equal to those of a corresponding upper-layer block mode of the block mode, so as to determine whether to perform or skip fractional motion estimation of the block mode, wherein each corresponding upper-layer block mode(s) of the block modes is greater than the block mode.
    Type: Grant
    Filed: November 29, 2010
    Date of Patent: March 24, 2015
    Assignee: Industrial Technology Research Institute
    Inventors: Yuan-Teng Chang, Wen-Hao Chung
  • Patent number: 8981534
    Abstract: The present disclosure involves an apparatus. The apparatus includes a substrate having a front side a back side opposite the front side. The substrate includes a plurality of openings formed from the back side of the substrate. The openings collectively define a pattern on the back side of the substrate from a planar view. In some embodiments, the substrate is a silicon substrate or a silicon carbide substrate. Portions of the silicon substrate vertically aligned with the openings have vertical dimensions that vary from about 100 microns to about 300 microns. A III-V group compound layer is formed over the front side of the silicon substrate. The III-V group compound layer is a component of one of: a light-emitting diode (LED), a laser diode (LD), and a high-electron mobility transistor (HEMT).
    Type: Grant
    Filed: September 14, 2012
    Date of Patent: March 17, 2015
    Assignee: TSMC Solid State Lighting Ltd.
    Inventors: Zhen-Yu Li, Chung-Pao Lin, Hsing-Kuo Hsia, Hao-Chung Kuo, Cindy Huichun Shu, Hsin-Chieh Huang
  • Patent number: 8974194
    Abstract: An impeller of an advection-type fan includes a metal base plate, a shaft and a plurality of plastic blades. The metal base plate includes a shaft-coupling portion and a peripheral portion, with a first plane facing in a first direction and a second plane facing in a second direction opposite to the first direction arranged between the shaft-coupling portion and the peripheral portion. The metal base plate is in a plane form between the shaft-coupling portion and the peripheral portion. The shaft has a fixing end and a free end. The fixing end is coupled with the shaft-coupling portion, and the free end extends in the first direction. Each plastic blade has a coupling portion and an air-driving portion. The coupling portion is coupled with the peripheral portion, and the air-driving portion extends in the second direction.
    Type: Grant
    Filed: March 13, 2012
    Date of Patent: March 10, 2015
    Assignee: Sunonwealth Electric Machine Industry Co., Ltd.
    Inventors: Tso-Kuo Yin, Chih-Hao Chung, Yuan-Jie Zheng
  • Publication number: 20150055671
    Abstract: The present disclosure involves a light-emitting device. The light-emitting device includes an n-doped gallium nitride (n-GaN) layer located over a substrate. A multiple quantum well (MQW) layer is located over the n-GaN layer. An electron-blocking layer is located over the MQW layer. A p-doped gallium nitride (p-GaN) layer is located over the electron-blocking layer. The light-emitting device includes a hole injection layer. In some embodiments, the hole injection layer includes a p-doped indium gallium nitride (p-InGaN) layer that is located in one of the three following locations: between the MQW layer and the electron-blocking layer; between the electron-blocking layer and the p-GaN layer; and inside the p-GaN layer.
    Type: Application
    Filed: November 5, 2014
    Publication date: February 26, 2015
    Inventors: Zhen-Yu Li, Tzu-Te Yang, Hon-Way Lin, Chung-Pao Lin, Kuan-Chun Chen, Ching-Yu Chen, You-Da Lin, Hao-Chung Kuo
  • Patent number: 8921204
    Abstract: A method for fabricating semiconductor dice includes the steps of providing a wafer assembly having a substrate and semiconductor structures on the substrate; and defining the semiconductor dice on the substrate. The method also includes the step of separating the substrate from the semiconductor structures by applying a first laser pulse to each semiconductor die on the substrate having first parameters selected to break an interface between the substrate and the semiconductor structures and then applying a second laser pulse to each semiconductor die on the substrate having second parameters selected to complete separation of the substrate from the semiconductor structures. The method can also include the steps of forming one or more intermediate structures between the semiconductor dice on the substrate configured to protect the semiconductor dice during the separating step.
    Type: Grant
    Filed: July 8, 2013
    Date of Patent: December 30, 2014
    Assignee: SemiLEDS Optoelectronics Co., Ltd.
    Inventors: Chen-Fu Chu, Hao-Chung Cheng, Trung Tri Doan, Feng-Hsu Fan
  • Publication number: 20140364597
    Abstract: Methods are disclosed for isolating nucleic acids from formalin-fixed paraffin embedded (FFPE) tissue samples. Each of tissue samples contains paraffin and a target biological tissue or material, and the method includes the steps of: adding a first reagent and a second reagent to the FFPE tissue sample, the first reagent dissolving the paraffin material and the second reagent lysing the biological tissue; mixing the first reagent, the second reagent, and the FFPE tissue sample to form a first mixture; (2) heating the first mixture at 50-80° C. for 30-90 minutes; and then heating the first mixture at 80-95° C. for 30-90 minutes to fractionize the first mixture to form an aqueous phase and an oil phase; (3) collecting an aqueous solution from the aqueous phase; and (4) isolating nucleic acids from the aqueous solution. The method improves the efficiency and convenience of isolating nucleic acids from FFPE tissue samples.
    Type: Application
    Filed: March 21, 2014
    Publication date: December 11, 2014
    Applicant: RBC Bioscience Corp.
    Inventors: Ting-Hao Chung, Cheng-Chun Kuan, Shih-Yu Kuo
  • Publication number: 20140356995
    Abstract: A method for fabricating a lateral-epitaxial-overgrowth thin-film LED with a nanoscale-roughened structure is provided. The lateral-epitaxial-overgrowth thin-film LED with a nanoscale-roughened structure has a substrate, a metal bonding layer formed on the substrate, a first electrode formed on the metal bonding layer, a semiconductor structure formed on the first electrode with a lateral-epitaxial-growth technology, and a second electrode formed on the semiconductor structure. A nanoscale-roughened structure is formed on the semiconductor structure except the region covered by the second electrode. Lateral epitaxial growth is used to effectively inhibit the stacking faults and reduce the thread dislocation density in the semiconductor structure to improve the crystallization quality of the light-emitting layer and reduce leakage current. Meanwhile, the surface roughened structure on the semiconductor structure can promote the external quantum efficiency.
    Type: Application
    Filed: August 15, 2014
    Publication date: December 4, 2014
    Inventors: Chia-Yu LEE, Chao-Hsun WANG, Ching-Hsueh CHIU, Hao-Chung KUO
  • Patent number: 8882974
    Abstract: A support mechanism used in an electro plasma polishing process includes a support beam, a first electrically conducting assembly, and a second electrically conducting assembly. The first electrically conducting assembly and the second electrically conducting assembly are mounted on the support beam. The first electrically conducting assembly is electrically insulated from the second electrically conducting assembly.
    Type: Grant
    Filed: February 28, 2013
    Date of Patent: November 11, 2014
    Assignees: Hong Fu Jin Precision Industry (ShenZhen) Co., Ltd., Hon Hai Precision Industry Co., Ltd.
    Inventors: Tian-Feng Huang, Bo Li, Wen-Li Wang, Hao-Chung Lee