Patents by Inventor Hao CHUNG

Hao CHUNG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160276546
    Abstract: A chip package structure and method of manufacturing the same are provided. The chip package structure includes a substrate with a carrier surface, a chip having a first surface and a second surface positioned oppositely and a side surface connecting the first surface and the second surface, an encapsulation layer and a fluorescent layer. The second surface of the chip is disposed on the carrier surface of the substrate. The fluorescent layer fully covers the first surface of the chip. The encapsulation layer covers the carrier surface of the substrate and the side surface of the chip. A reflectivity of the encapsulation layer is at least greater than 90%.
    Type: Application
    Filed: March 18, 2016
    Publication date: September 22, 2016
    Inventors: Hao-Chung Lee, Chin-Hua Hung, Cheng-Wei Hung, Jui-Fu Chang, Yu-Feng Lin
  • Patent number: 9431576
    Abstract: A lighting device includes a plurality of light-emitting diodes including a first light-emitting diode with a non-rectangular shape in a top view, a submount to which each of the plurality of light-emitting diodes is coupled, and a plurality of conductive elements formed between the submount and the plurality of light-emitting diodes to electrically connecting at least a portion of the plurality of light-emitting diodes with each other in series.
    Type: Grant
    Filed: July 6, 2015
    Date of Patent: August 30, 2016
    Assignee: EPISTAR CORPORATION
    Inventors: Kuan-Chun Chen, Hao-Chung Kuo, You-Da Lin, Zhen-Yu Li
  • Publication number: 20160211330
    Abstract: A high electron mobility transistor is provided, which includes a substrate, a superlattice structure formed on the substrate, and a transistor epitaxial structure formed on the superlattice structure such that the superlattice structure is interposed between the substrate and the transistor epitaxial layer. As the high electron mobility transistor has the carbon-doped AlN/GaN superlattice structure between the substrate and the transistor epitaxial layer. Thus, the present invention can effectively reduce vertical leakage current, so as to improve the epitaxial quality and the breakdown voltage of the high electron mobility transistor.
    Type: Application
    Filed: October 1, 2015
    Publication date: July 21, 2016
    Applicant: NATIONAL CHIAO TUNG UNIVERSITY
    Inventors: Zhen-Yu LI, An-Jye TZOU, Hao-Chung KUO, Chunyen CHANG
  • Publication number: 20160147669
    Abstract: A method for controlling access of a cache includes at least following steps: receiving a memory address; utilizing a hashing address logic to perform a programmable hash function upon at least a portion of the memory address to generate a hashing address; and determining an index of the cache based at least partly on the hashing address.
    Type: Application
    Filed: November 21, 2014
    Publication date: May 26, 2016
    Inventors: Hsilin Huang, Cheng-Ying Ko, Hsin-Hao Chung, Chao-Chin Chen
  • Publication number: 20160123568
    Abstract: A light emitting device includes a light source, a light source carrier and a circuit board. The circuit board is configured to provide power to the light source via the light source carrier. The circuit board includes a metal substrate having an upper surface, the upper surface including a first electrode area, a second electrode area and a heat conduction area; a first metal electrode formed on the first electrode area; a first insulation layer formed between the first metal electrode and the metal substrate; a second metal electrode formed on the second electrode area; a second insulation layer formed between the second metal electrode and the metal substrate; and a solder resist layer covering the upper surface of the metal substrate; wherein the heat conduction area is exposed from the solder resist layer, and the heat conduction area is connected to the light source carrier.
    Type: Application
    Filed: October 30, 2015
    Publication date: May 5, 2016
    Inventors: Hao-Chung Lee, Yu-Feng Lin, Meng-Ting Tsai
  • Patent number: 9312432
    Abstract: The present disclosure involves an apparatus. The apparatus includes a photonic die structure that includes a light-emitting diode (LED) die. The LED die is a vertical LED die in some embodiments. The LED die includes a substrate. A p-doped III-V compound layer and an n-doped III-V compound layer are each disposed over the substrate. A multiple quantum well (MQW) layer is disposed between the p-doped III-V compound layer and the n-doped III-V compound layer. The p-doped III-V compound layer includes a first region having a non-exponential doping concentration characteristic and a second region having an exponential doping concentration characteristic. In some embodiments, the second region is formed using a lower pressure than the first region.
    Type: Grant
    Filed: March 13, 2012
    Date of Patent: April 12, 2016
    Assignee: TSMC SOLID STATE LIGHTING LTD.
    Inventors: Ming-Hua Lo, Zhen-Yu Li, Hsing-Kuo Hsia, Hao-Chung Kuo
  • Patent number: 9257463
    Abstract: A device includes a semiconductor substrate, a well region in the semiconductor substrate, and a Metal-Oxide-Semiconductor (MOS) device. The MOS device includes a gate dielectric overlapping the well region, a gate electrode over the gate dielectric, and a source/drain region in the well region. The source/drain region and the well region are of opposite conductivity types. An edge of the first source drain region facing away from the gate electrode is in contact with the well region to form a junction isolation.
    Type: Grant
    Filed: August 17, 2012
    Date of Patent: February 9, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chien-Hsien Tseng, Shou-Gwo Wuu, Chia-Chan Chen, Kuo-Yu Wu, Dao-Hong Yang, Ming-Hao Chung
  • Publication number: 20160017314
    Abstract: Methods are disclosed for isolating nucleic acids from formalin-fixed paraffin embedded (FFPE) tissue samples. Each of tissue samples contains paraffin and a target biological tissue or material, and the method includes the steps of: adding a first reagent and a second reagent to the FFPE tissue sample, the first reagent dissolving the paraffin material and the second reagent lysing the biological tissue; mixing the first reagent, the second reagent, and the FFPE tissue sample to form a first mixture; (2) heating the first mixture at 50-80° C. for 30-90 minutes; and then heating the first mixture at 80-95° C. for 30-90 minutes to fractionize the first mixture to form an aqueous phase and an oil phase; (3) collecting an aqueous solution from the aqueous phase; and (4) isolating nucleic acids from the aqueous solution. The method improves the efficiency and convenience of isolating nucleic acids from FFPE tissue samples.
    Type: Application
    Filed: September 30, 2015
    Publication date: January 21, 2016
    Inventors: Ting-Hao CHUNG, Cheng-Chun KUAN, Shih-Yu KUO
  • Patent number: 9240518
    Abstract: A light emitting diode device is provided, which comprises a silicon-based substrate, a buffer layer, a super lattice structure layer, a nano-structure layer, a first semiconductor layer, a light emitting layer, and a second semiconductor layer. The buffer layer is formed on the silicon-based substrate, the super lattice structure layer is formed on the buffer layer, the nano-structure layer is formed on the super lattice structure layer, a first semiconductor layer is formed on the nano-structure layer, and the light emitting layer is formed between the first semiconductor layer and the second semiconductor layer. The super lattice layer and the nano-structure can release the stress within the light emitting diode device, and reduce the epitaxy defect, so that the internal quantum effect and the external quantum effect can be increased.
    Type: Grant
    Filed: August 18, 2014
    Date of Patent: January 19, 2016
    Assignee: National Chiao Tung University
    Inventors: Chia-Yu Lee, Da-Wei Lin, An-Jye Tzou, Hao-Chung Kuo
  • Publication number: 20160013166
    Abstract: A light emitting module including a light emitting device package structure and a heat dissipation structure is provided. The light emitting device package structure includes light emitting devices, a patterned reflective element and a patterned conductive layer. The patterned reflective element is disposed around side surfaces of the light emitting devices and exposes a first bottom surface of a first pad and a second bottom surface of a second pad. The patterned conductive layer is disposed on the first bottom surface of the first pad and the second bottom surface of the second pad. The light emitting devices are electrically connected to each other in a series connection, a parallel connection or a series-parallel connection through the patterned conductive layer. The heat dissipation structure is disposed below the light emitting device package structure and includes a heat dissipation unit and a patterned circuit layer disposed on the heat dissipation unit.
    Type: Application
    Filed: June 12, 2015
    Publication date: January 14, 2016
    Inventors: Hao-Chung Lee, Yu-Feng Lin
  • Publication number: 20150340553
    Abstract: A photonic device includes: a first-type III-V group layer; a second-type III-V group layer formed on the first-type III-V group layer; and a multi-quantum well layer disposed between the first-type III-V group layer and the second-type III-V group layer; wherein: the multi-quantum well layer comprises a plurality of active layers interleaved with a plurality of barrier layers such that each barrier layer is separated from adjacent barrier layers by a respective one of the active layer; a material of each barrier layer comprises semiconductor compound devoid of Al element; the barrier layers comprises a first group layers between the first-type III-V group layer and the second-type III-V group layer and a second group layers between the second-type III-V group layer and the first group layers, and a thickness of each barrier layer of the first group layers is greater than that of each barrier layer of the second group layers; and the barrier layers of the first group layers comprise uniform thickness.
    Type: Application
    Filed: August 4, 2015
    Publication date: November 26, 2015
    Inventors: Zhen-Yu Li, Hon-Way Lin, Chung-Pao Lin, Hsing-Kuo Hsia, Hao-Chung Kuo
  • Patent number: 9196015
    Abstract: An image processing apparatus for generating an intermediate frame according to a previous frame and a next frame is provided. The apparatus includes a determining module and a selecting module. The intermediate frame includes a plurality of intermediate image blocks, each of which corresponds to a motion vector. For each intermediate image block, the determining module determines whether an interpolated image generated according to the motion vector meets a correctness requirement. According to whether the interpolated image meets the correctness requirement, the selecting module selects the interpolated image or a substitutive image different from the interpolated image to represent the intermediate image block.
    Type: Grant
    Filed: August 13, 2012
    Date of Patent: November 24, 2015
    Assignee: MStar Semiconductor, Inc.
    Inventors: Chia-Hao Chung, Chung-Yi Chen
  • Publication number: 20150330426
    Abstract: A clamper includes a base, a movable element, a sliding element, a connecting bar, a clamping element and a first elastic element. The movable element is movable in a first direction relative to the base. The sliding element is movable in a second direction relative to the base. The connecting bar connects the movable element and the sliding element. The clamping element sets on the sliding element. The first elastic element includes a terminal setting on the sliding element.
    Type: Application
    Filed: April 21, 2015
    Publication date: November 19, 2015
    Applicant: ABILITY ENTERPRISE CO., LTD.
    Inventors: Hao-Chung LIEN, Hsien-Ming LEE, Yu-Fang LIN
  • Publication number: 20150333227
    Abstract: A light emitting device package structure and a manufacturing method thereof are provided. The light emitting device package structure includes a light emitting device and a protecting element. The light emitting device has an upper surface and a lower surface opposite to each other, a side surface connecting the upper surface and the lower surface and a first electrode pad and a second electrode pad located on the lower surface and separated from each other. The protecting element encapsulates the side surface of the light emitting device and exposes at least portion of the upper surface, at least portion of a first bottom surface of the first electrode pad and at least portion of a second bottom surface of the second electrode pad.
    Type: Application
    Filed: May 14, 2015
    Publication date: November 19, 2015
    Inventors: Hao-Chung Lee, Yu-Feng Lin
  • Publication number: 20150318453
    Abstract: A package method includes steps of providing a light emitting module, a mold and a molding compound, wherein the light emitting module includes a substrate and at least one light emitting unit disposed on the substrate, the mold has at least one recess, and a side wall of the recess is parallel to a side surface of the light emitting unit; filling the recess with the molding compound; placing the substrate on the mold reversely, so that the light emitting unit is immersed into the recess and the molding compound directly encapsulates the light emitting unit; and heating and pressing the substrate and the mold, so as to solidify the molding compound.
    Type: Application
    Filed: April 20, 2015
    Publication date: November 5, 2015
    Inventors: Chin-Hua Hung, Hao-Chung Lee, Yu-Feng Lin
  • Publication number: 20150311190
    Abstract: A light emitting diode (LED) package structure including a carrier substrate, a LED and an electrostatic protection device is provided. The carrier substrate includes two leadframes separated from each other and a reflective member. The reflective member encapsulates the leadframes and exposes a carrier surface of each of the leadframes. The reflective member has a cavity, and a bottom surface of the cavity is aligned with the carrier surface of each of the leadframes. The LED is disposed inside the cavity and bridges the leadframes. The electrostatic protection device is disposed inside the cavity and bridges the leadframes. The LED is connected in anti-parallel to the electrostatic protection device.
    Type: Application
    Filed: April 28, 2015
    Publication date: October 29, 2015
    Inventors: Meng-Ting Tsai, Hao-Chung Lee, Yu-Feng Lin
  • Publication number: 20150311391
    Abstract: A lighting device includes a plurality of light-emitting diodes including a first light-emitting diode with a non-rectangular shape in a top view, a submount to which each of the plurality of light-emitting diodes is coupled, and a plurality of conductive elements formed between the submount and the plurality of light-emitting diodes to electrically connecting at least a portion of the plurality of light-emitting diodes with each other in series.
    Type: Application
    Filed: July 6, 2015
    Publication date: October 29, 2015
    Inventors: Kuan-Chun CHEN, Hao-Chung KUO, You-Da LIN, Zhen-Yu LI
  • Patent number: D761213
    Type: Grant
    Filed: April 2, 2015
    Date of Patent: July 12, 2016
    Assignee: Genesis Photonics Inc.
    Inventors: Hao-Chung Lee, Yu-Feng Lin, Xun-Xain Zhan
  • Patent number: D761214
    Type: Grant
    Filed: April 2, 2015
    Date of Patent: July 12, 2016
    Assignee: Genesis Photonics Inc.
    Inventors: Hao-Chung Lee, Yu-Feng Lin, Xun-Xain Zhan
  • Patent number: D762596
    Type: Grant
    Filed: April 2, 2015
    Date of Patent: August 2, 2016
    Assignee: Genesis Photonics Inc.
    Inventors: Hao-Chung Lee, Yu-Feng Lin, Xun-Xain Zhan