Abstract: Embodiments are directed to a method of forming a laminated magnetic inductor and resulting structures having multiple magnetic layer thicknesses. A first magnetic stack having one or more magnetic layers alternating with one or more insulating layers is formed in a first inner region of the laminated magnetic inductor. A second magnetic stack is formed opposite a major surface of the first magnetic stack in an outer region of the laminated magnetic inductor. A third magnetic stack is formed opposite a major surface of the second magnetic stack in a second inner region of the laminated magnetic inductor. The magnetic layers are formed such that a thickness of a magnetic layer in each of the first and third magnetic stacks is less than a thickness of a magnetic layer in the second magnetic stack.

Abstract: Antibacterial coatings and methods of making the antibacterial coatings are described herein. A first branched polyethylenimine (BPEI) layer is formed and a first glyoxal layer is formed on a surface of the BPEI layer. The first BPEI layer and the first glyoxal layer are cured to form a crosslinked BPEI coating. The first BPEI layer can be modified with superhydrophobic moieties, superhydrophilic moieties, or negatively charged moieties to increase the antifouling characteristics of the coating. The first BPEI layer can be modified with contact-killing bactericidal moieties to increase the bactericidal characteristics of the coating.

Abstract: Embodiments are directed to a method of forming a laminated magnetic inductor and resulting structures having anisotropic magnetic layers. A first magnetic stack is formed having one or more magnetic layers alternating with one or more insulating layers. A trench is formed in the first magnetic stack oriented such that an axis of the trench is perpendicular to a hard axis of the magnetic inductor. The trench is filled with a dielectric material.

Abstract: A first material is filled during a semiconductor fabrication process in a space bound on at least one side by a fence formation created as a result of an etching operation. A solvent-removable material is deposited such that the solvent-removable material encapsulates at least that portion of the fence formation which is protruding from the structure such that a height of the fence formation exceeds a height of the structure. The portion of the fence formation which is protruding from the structure and a first portion of the solvent-removable material are removed by planarization. A second portion of the solvent-removable material is removed by dissolving in a solvent, the second portion remaining after removal by the planarization of the first portion of the solvent-removable material.

Abstract: Aspects include high resolution brain-electronic interfaces and related methods. Aspects include forming a semiconductor circuit on a substrate, depositing a tensile stress layer on the circuit, and separating the semiconductor circuit from a portion of the silicon substrate. Aspects also include removing the tensile stress layer from the semiconductor circuit and transferring the semiconductor circuit to a biocompatible film.

Abstract: An embodiment of the invention provides a method to control a mechanical system based on the cognitive state of a user, where a first action is performed at an input device that is associated with the user. The cognitive state of the user is detected at the input device; and, a change to the first action is determined based on the cognitive state of the user. A controlled action is performed based on the recommended change. A system can include an input device associated with user, where a first action is performed at the input device. A processor connected to the input device detects the cognitive state of the user at the input device and determines a change to the first action based on the cognitive state of the user. A controller connected to the processor performs a controlled action based on the recommended change.

Abstract: Present disclosure relates to magnetic materials, chips having magnetic materials, and methods of forming magnetic materials. In certain embodiments, magnetic materials may include a seed layer, and a cobalt-based alloy formed on seed layer. The seed layer may include copper, cobalt, nickel, platinum, palladium, ruthenium, iron, nickel alloy, cobalt-iron-boron alloy, nickel-iron alloy, and any combination of these materials. In certain embodiments, the chip may include one or more on-chip magnetic structures. Each on-chip magnetic structure may include a seed layer, and a cobalt-based alloy formed on seed layer. In certain embodiments, method may include: placing a seed layer in an aqueous electroless plating bath to form a cobalt-based alloy on seed layer. In certain embodiments, the aqueous electroless plating bath may include sodium tetraborate, an alkali metal tartrate, ammonium sulfate, cobalt sulfate, ferric ammonium sulfate and sodium borohydride and has a pH between about 9 to about 13.

Abstract: DC-DC power converters with GaN switches, magnetic inductors and CMOS power drivers integrated through face-to-face wafer bonding techniques are provided. In one aspect, an integrated DC-DC power converter includes: a Si CMOS chip having at least one Si CMOS transistor formed thereon; a GaN switch chip, bonded to the Si CMOS chip in a face-to-face manner, having at least one GaN transistor formed thereon; and an on-chip magnetic inductor present either on the Si CMOS chip or on the GaN switch chip. A method of forming an integrated DC-DC power converter is also provided.

Abstract: A magnetic laminating inductor structure and process for preventing substrate bowing and damping losses generally include a laminated film stack including a magnetic layer having a tensile stress, an insulating layer having a compressive stress disposed on the magnetic layer, and a dielectric planarizing layer on the insulating layer. The dielectric planarizing layer has a neutral stress and a roughness value less than the insulating layer. The reduction in surface roughness reduces damping losses and the compressive stress of the insulating layers reduces wafer bowing.

Abstract: A magnetic laminating inductor structure and process for preventing substrate bowing and damping losses generally include a laminated film stack including a magnetic layer having a tensile stress, an insulating layer having a compressive stress disposed on the magnetic layer, and a dielectric planarizing layer on the insulating layer. The dielectric planarizing layer has a neutral stress and a roughness value less than the insulating layer. The reduction in surface roughness reduces damping losses and the compressive stress of the insulating layers reduces wafer bowing.

Abstract: A neural probe is presented for local neural optogenetics stimulation and neurochemistry recordings. The neural probe includes a probe body, a shank extending from the probe body to a tip, a plurality of micro light-emitting diodes (LEDs) positioned across a length of a first surface of the shank for providing neuron-affecting light, a plurality of carbon devices, and a plurality of carbon electrodes positioned across a length of a second surface of the shank, the second surface in opposed relation to the first surface. The plurality of carbon electrodes can be vertically aligned carbon nanotubes or vertically aligned carbon nanofibers. The plurality of carbon electrodes can also be horizontally aligned carbon nanotubes. The plurality of micro LEDs activate neurons and the plurality of vertically aligned carbon electrodes electrochemically record neurotransmitters.

Abstract: An on-chip magnetic structure includes a palladium activated seed layer and a substantially amorphous magnetic material disposed onto the palladium activated seed layer. The substantially amorphous magnetic material includes nickel in a range from about 50 to about 80 atomic % (at. %) based on the total number of atoms of the magnetic material, iron in a range from about 10 to about 50 at. % based on the total number of atoms of the magnetic material, and phosphorous in a range from about 0.1 to about 30 at. % based on the total number of atoms of the magnetic material. The magnetic material can include boron in a range from about 0.1 to about 5 at. % based on the total number of atoms of the magnetic material.

Abstract: A method for fabricating a magnetic material stack on a substrate includes the following steps. A first dielectric layer is formed. A first magnetic material layer is formed on the first dielectric layer. At least a second dielectric layer is formed on the first magnetic material layer. At least a second magnetic material layer is formed on the second dielectric layer. During one or more of the forming steps, a surface smoothing operation is performed to remove at least a portion of surface roughness on the layer being formed. The magnetic material stack can be used to form a low magnetic loss yoke inductor.

Abstract: An on-chip magnetic structure structure includes a magnetic material comprising cobalt in a range from about 80 to about 90 atomic % (at. %) based on the total number of atoms of the magnetic material, tungsten in a range from about 4 to about 9 at. % based on the total number of atoms of the magnetic material, phosphorous in a range from about 7 to about 15 at. % based on the total number of atoms of the magnetic material, and palladium substantially dispersed throughout the magnetic material.

Abstract: Techniques for electrodepositing selenium (Se)-containing films are provided. In one aspect, a method of preparing a Se electroplating solution is provided. The method includes the following steps. The solution is formed from a mixture of selenium oxide; an acid selected from the group consisting of alkane sulfonic acid, alkene sulfonic acid, aryl sulfonic acid, heterocyclic sulfonic acid, aromatic sulfonic acid and perchloric acid; and a solvent. A pH of the solution is then adjusted to from about 2.0 to about 3.0. The pH of the solution can be adjusted to from about 2.0 to about 3.0 by adding a base (e.g., sodium hydroxide) to the solution. A Se electroplating solution, an electroplating method and a method for fabricating a photovoltaic device are also provided.

Abstract: A magnetic laminating structure and process includes alternating layers of a magnetic material and a multilayered insulating material, wherein the multilayered insulating material is intermediate adjacent magnetic material layers and comprises a first insulating layer abutting at least one additional insulating layer, wherein the first insulating layer and the at least one additional insulating layer comprise different dielectric materials and/or are formed by a different deposition process, and wherein the layers of the magnetic material have a cumulative thickness greater than 1 micron.

Abstract: A system and method for monitoring a health status of a subject. The system comprises: a medical device implantable in the subject and having a passage or compartment through which blood flows through; a sensor device embedded at or near a surface of said passage within said medical device for generating signals suitable for measuring a Doppler shift effect occurring within said passage; and a control device coupled to said sensor device for measuring a liquid blood flow rate within said passage based on sensor generated signals outputs. The embedded sensor device comprises a first piezo-electric element configured to generate an acoustic excitation signal and a second piezo-electric element configured to receive said acoustic excitation signal. The second piezo-electric element emits a signal responsive to said acoustic excitation signal. Control device in real time compares a generated output signal with the input excitation signal to determine a Doppler frequency shift measurement.

Abstract: Fully integrated, on-chip DC-DC power converters are provided. In one aspect, a DC-DC power converter includes: a SOI wafer having a SOI layer separated from a substrate by a buried insulator, wherein the SOI layer and the buried insulator are selectively removed from at least one first portion of the SOI wafer, and wherein the SOI layer and the buried insulator remain present in at least one second portion of the SOI wafer; at least one GaN transistor formed on the substrate in the first portion of the SOI wafer; at least one CMOS transistor formed on the SOI layer in the second portion of the SOI wafer; a dielectric covering the GaN and CMOS transistors; and at least one magnetic inductor formed on the dielectric. A method of forming a fully integrated DC-DC power converter is also provided.

Abstract: A magnetic laminating structure and process includes alternating layers of a magnetic material and a multilayered insulating material, wherein the multilayered insulating material is intermediate adjacent magnetic material layers and comprises a first insulating layer abutting at least one additional insulating layer, wherein the first insulating layer and the at least one additional insulating layer comprise different dielectric materials and/or are formed by a different deposition process, and wherein the layers of the magnetic material have a cumulative thickness greater than 1 micron.

Abstract: An on-chip magnetic structure includes a palladium activated seed layer and a substantially amorphous magnetic material disposed onto the palladium activated seed layer. The substantially amorphous magnetic material includes nickel in a range from about 50 to about 80 atomic % (at. %) based on the total number of atoms of the magnetic material, iron in a range from about 10 to about 50 at. % based on the total number of atoms of the magnetic material, and phosphorous in a range from about 0.1 to about 30 at. % based on the total number of atoms of the magnetic material. The magnetic material can include boron in a range from about 0.1 to about 5 at. % based on the total number of atoms of the magnetic material.