Abstract: Procedures, analysis techniques, and correction methods are presented for assessing the electrical properties of the Si layer of silicon-on-insulator substrates. Detailed analysis and equations are outlined in a computer algorithm written in Mathcad for both the linear and saturated regions of FET behavior.

Abstract: A method of determining electrical parameters of a silicon-on-insulator wafer. In this method a native oxide of a silicon layer on a silicon-on-insulator substrate is removed from a silicon mesa formed on the silicon layer. The mesa is contacted with two liquid metal electrodes. A voltage is applied to an electrode on the bottom of the silicon-on-insulator wafer. The current between the two liquid metal electrodes is measured for a combination of voltages between the liquid metal electrodes and the bottom voltage. The resulting current-voltage behavior is analyzed to obtain parameters of mobility, charge in the buried oxide of the silicon-on-insulator substrate, interface state charge, threshold voltages in the linear and saturated regions, doping density, transconductances and output conductances.

Abstract: A method of determining electrical parameters of a silicon-on-insulator wafer. In this method a native oxide of a silicon layer on a silicon-on-insulator substrate is removed from a silicon mesa formed on the silicon layer. The mesa is contacted with two liquid metal electrodes. A voltage is applied to an electrode on the bottom of the silicon-on-insulator wafer. The current between the two liquid metal electrodes is measured for a combination of voltages between the liquid metal electrodes and the bottom voltage. The resulting current-voltage behavior is analyzed to obtain parameters of mobility, charge in the buried oxide of the silicon-on-insulator substrate, interface state charge, threshold voltages in the linear and saturated regions, doping density, transconductances and output conductances.

Abstract: The present invention relates to an improved method of depositing a diamond-like carbon film onto a substrate by low temperature plasma-enhanced chemical vapor deposition (PECVD) from a hydrocarbon/helium plasma. More specifically, the diamond-like carbon films of the present invention are deposited onto the substrate by employing acetylene which is heavily diluted with helium as the plasma gas. The films formed using the process of the present invention are characterized as being amorphous and having dielectric strengths comparable to those normally observed for diamond films. More importantly, however is that the films produced herein are thermally stable, optically transparent, absorbent in the ultraviolet range and hard thus making them extremely desirable for a wide variety of applications.

Abstract: The present invention relates to an improved method of depositing a diamond-like carbon film onto a substrate by low temperature plasma-enhanced chemical vapor deposition (PECVD) from a hydrocarbon/helium plasma. More specifically, the diamond like carbon films of the present invention are deposited onto the substrate by employing acetylene which is heavily diluted with helium as the plasma gas. The films formed using the process of the present invention are characterized as being amorphous and having dielectric strengths comparable to those normally observed for diamond films. More importantly, however is that the films produced herein are thermally stable, optically transparent, absorbent in the ultraviolet range and hard thus making them extremely desirable for a wide variety of applications.

Abstract: The formation of a self-aligned semiconductor structure in a semiconductor substrate is described by providing a first and a second layer or a wave guide of different chemical composition above said semiconductor substrate, said second layer providing a shape defining opening permitting chemical conversion of said first layer adjacent said substrate to a third chemical composition different from said first and second layers. The third chemical composition is removed with a reagent that reacts only with said third composition and not with said first and second layers for the manufacture of self-aligned semiconductor structures. The third chemical composition is retained in the formation of a wave guide and has an index of refraction different from the first layer.

Abstract: An FET transistor is provided having a two element semiconductor channel region between metal contacts and epitaxial therewith a graded three element seminconductor, in which two of the three elements are in common with the semiconductor of the channel, positioned between a Schottky barrier gate of the same contact metal and the channel. An FET with a GaAs channel between tin source and drain contacts, a graded 500 to 1000 Angstrom thick GaAlAs region epitaxial with the channel and a Schottky barrier tin metal gate over the GaAlAs region.

Abstract: An ion implantation annealing source for a controlled excess of the most volatile element of a multielement compound semiconductor whereby the source is provided with interstices and contains the most volatile element of the multielement semiconductor; and process of ion implantation employing the annealing source.

Abstract: A process for diffusing a dopant into a III-V type semiconductor body is disclosed which comprises:(a) placing in a heating chamber which is substantially devoid of any oxidizing substance a deposition substrate possessing a dopant-containing layer which has been vapor deposited upon a major surface thereof in contact with, or in the proximity of, an object substrate fabricated from a III-V type semiconductor material with the dopant-containing layer of the deposition substrate being substantially opposed to a major surface of the object substrate;(b) introducing into the heating chamber a source of Group V element corresponding to the Group V element of the object substrate, said source being capable of providing Group V element in the vapor phase at the diffusion temperature with the vapor pressure of the vapor phase Group V element being at or above the equilibrium vapor pressure of the Group V element present at the surface of the object substrate; and,(c) heating the deposition substrate and the object s

Abstract: Ion implanted gallium arsenide substrates are annealed by providing an arsenic-containing gaseous ambient on all sides of the substrate, and heating the gallium arsenide substrate with broad area incoherent light.

Abstract: An integrated circuit structure made up of a monocrystalline substrate on which there is an epitaxial intermediate layer of GaAlAs or GaAlAs and Ge with the Ge adjacent to the substrate. The structure is equipped with a single or a combined device epitaxial layer involving GaAs and GaAlAs. The intermediate GaAlAs layer permits substrate, circuit and optical signal application flexibility.

Abstract: Semiconductor devices can be fabricated using as an intermediate manufacturing structure a substrate of one semiconductor with a thin epitaxial surface layer of a different semiconductor with properties such that the semiconductors each have different solubilities with respect to a metal. When a vertical differentiation is used to expose the different materials and the metal is deposited on both and heated, the metal will form a Schottky barrier in one material and an ohmic contact in the other. Where the substrate is gallium arsenide and the epitaxial layer is gallium aluminum arsenide and the metal is tin, a self-aligned gallium arsenide MESFET is formed wherein the tin forms ohmic contacts with the gallium arsenide and a Schottky barrier contact with the gallium aluminum arsenide.

Abstract: A fluorescent material member covering a series array of solar cells that produce a high voltage operates to convert incident light to a uniform number of photons per cell.

Abstract: A high efficiency tandem solar cell may be fabricated wherein a layer of transparent conducting material is placed over a crystalline substrate and under an amorphous region. Light incident on the upper surface has higher energy photons absorbed in the higher bandgap amorphous material and lower energy photons pass through the transparent conductor to a point of absorption in the lower energy gap crystalline material.

Abstract: The disclosure provides a highly efficient e.g., up to 40% efficiency, solar cell for solar energy concentrator use. Two solar cell layers comprised of different semiconductor materials are grown upon a transparent, insulating substrate. A metal layer covering the bottom serves to reflect light back through the structure, and can serve as a wrap-around electrical contact to both materials. As an example, a structure of Si and GaAlAs is produced on a substrate from the group consisting of Al.sub.2 O.sub.3, Spinel, Quartz and BeO.

Abstract: Surface recombination in solar cells that is produced by band bending at the surface of the semiconductor which is in turn caused by defect states which pin the Fermi level at the surface, may be improved by applying a surface layer which may be a plasma oxide that has been hydrogen annealed and this layer may also be useful as an antireflecting coating.

Abstract: Enhanced efficiency can be achieved in the construction of semiconductor optical energy conversion devices such as solar cells by providing a translucent frequency shifting supporting member with appropriate doping such as Al.sub.2 O.sub.3 :Cr.sup.+3 (Ruby) that is capable of shifting the wavelength of incident light energy in the direction of greatest efficiency of the semiconductor device. The efficiency can be further enhanced by providing a crystal perfection accommodation region between the active region of the device and the light frequency shifting substrate.

Abstract: A technique for fabricating a semiconductor heterostructure by growth of a ternary semiconductor on a binary semiconductor substrate from a melt of the ternary semiconductor containing less than saturation of at least one common ingredient of both the binary and ternary semiconductors wherein in a single temperature step the binary semiconductor substrate is etched, a p-n junction with specific device characteristics is produced in the binary semiconductor substrate by diffusion of a dopant from the melt and a region of the ternary semiconductor of precise conductivity type and thickness is grown by virtue of a change in the melt characteristics when the etched binary semiconductor enters the melt.

Abstract: A high efficiency silicon solar cell (1) may be constructed by providing a two-stage drift field emitter (4) with a 1 micron thickness on a drift field base region (10) with a back surface field region (12). The stage (7) of the drift field emitter adjacent to the junction (8) is moderately doped from 10.sup.18 to 10.sup.16 atoms/cc adjacent the junction to minimize bandgap shrinkage and to maximize carrier lifetime while the stage of the emitter adjacent the surface is highly doped at 10.sup.19 atoms/cc to minimize sheet resistance. The drift field is aiding in both the emitter and base regions. The size of the base (10) is less than an effective diffusion length. There is a difference in doping level in the base depending on the conductivity type of the silicon. For n-conductivity type the base is doped 10.sup.13 atoms/cc at the pn junction, increasing to 10.sup.16 atoms/cc in the drift field region. For p-conductivity type the base is doped 10.sup.16 at the junction, increasing to 10.sup.