Patents by Inventor Hau Thien Tran
Hau Thien Tran has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20120284583Abstract: Overlapping sub-matrix based LDPC (Low Density Parity Check) decoder. Novel decoding approach is presented, by which, updated bit edge messages corresponding to a sub-matrix of an LDPC matrix are immediately employed for updating of the check edge messages corresponding to that sub-matrix without requiring storing the bit edge messages; also updated check edge messages corresponding to a sub-matrix of the LDPC matrix are immediately employed for updating of the bit edge messages corresponding to that sub-matrix without requiring storing the check edge messages. Using this approach, twice as many decoding iterations can be performed in a given time period when compared to a system that performs updating of all check edge messages for the entire LDPC matrix, then updating of all bit edge messages for the entire LDPC matrix, and so on. When performing this overlapping approach in conjunction with min-sum processing, significant memory savings can also be achieved.Type: ApplicationFiled: July 16, 2012Publication date: November 8, 2012Applicant: BROADCOM CORPORATIONInventors: Hau Thien Tran, Kelly Brian Cameron, Ba-Zhong Shen, Tak K. Lee
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Patent number: 8301991Abstract: LDPC (Low Density Parity Check) coded modulation symbol decoding. Symbol decoding is supported by appropriately modifying an LDPC tripartite graph to eliminate the bit nodes thereby generating an LDPC bipartite graph (such that symbol nodes are appropriately mapped directly to check nodes thereby obviating the bit nodes). The edges that communicatively couple the symbol nodes to the check nodes are labeled appropriately to support symbol decoding of the LDPC coded modulation signal. The iterative decoding processing may involve updating the check nodes as well as estimating the symbol sequence and updating the symbol nodes. In some embodiments, an alternative hybrid decoding approach may be performed such that a combination of bit level and symbol level decoding is performed. This LDPC symbol decoding out-performs bit decoding only. In addition, it provides comparable or better performance of bit decoding involving iterative updating of the associated metrics.Type: GrantFiled: November 30, 2010Date of Patent: October 30, 2012Assignee: Broadcom CorporationInventors: Ba-Zhong Shen, Hau Thien Tran, Kelly Brian Cameron
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Publication number: 20120272118Abstract: Variable modulation within combined LDPC (Low Density Parity Check) coding and modulation coding systems. Variable modulation encoding of LDPC coded symbols is presented. In addition, LDPC encoding, that generates an LDPC variable code rate signal, may also be performed as well. The encoding can generate an LDPC variable code rate and/or modulation signal whose code rate and/or modulation may vary as frequently as on a symbol by symbol basis. Some embodiments employ a common constellation shape for all of the symbols of the signal sequence, yet individual symbols may be mapped according different mappings of the commonly shaped constellation; such an embodiment may be viewed as generating a LDPC variable mapped signal. In general, any one or more of the code rate, constellation shape, or mapping of the individual symbols of a signal sequence may vary as frequently as on a symbol by symbol basis.Type: ApplicationFiled: June 29, 2012Publication date: October 25, 2012Applicant: BROADCOM CORPORATIONInventors: Ba-Zhong Shen, Hau Thien Tran, Kelly Brian Cameron
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Patent number: 8254407Abstract: A method for asymmetrical MIMO wireless communication begins by determining a number of transmission antennas for the asymmetrical MIMO wireless communication. The method continues by determining a number of reception antennas for the asymmetrical MIMO wireless communication. The method continues by, when the number of transmission antennas exceeds the number of reception antennas, using spatial time block coding for the asymmetrical MIMO wireless communication. The method continues by, when the number of transmission antennas does not exceed the number of reception antennas, using spatial multiplexing for the asymmetrical MIMO wireless communication.Type: GrantFiled: May 20, 2010Date of Patent: August 28, 2012Assignee: Broadcom CorporationInventors: Christopher J. Hansen, James A. Trachewsky, Nambirajan Seshadri, Kelly B. Cameron, Hau Thien Tran, Ba-Zhong Shen
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Patent number: 8250432Abstract: Variable modulation within combined LDPC (Low Density Parity Check) coding and modulation coding systems. Variable modulation encoding of LDPC coded symbols is presented. In addition, LDPC encoding, that generates an LDPC variable code rate signal, may also be performed as well. The encoding can generate an LDPC variable code rate and/or modulation signal whose code rate and/or modulation may vary as frequently as on a symbol by symbol basis. Some embodiments employ a common constellation shape for all of the symbols of the signal sequence, yet individual symbols may be mapped according different mappings of the commonly shaped constellation; such an embodiment may be viewed as generating a LDPC variable mapped signal. In general, any one or more of the code rate, constellation shape, or mapping of the individual symbols of a signal sequence may vary as frequently as on a symbol by symbol basis.Type: GrantFiled: May 26, 2011Date of Patent: August 21, 2012Assignee: Broadcom CorporationInventors: Ba-Zhong Shen, Hau Thien Tran, Kelly Brian Cameron
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Publication number: 20120192029Abstract: LDPC (Low Density Parity Check) codes with corresponding parity check matrices selectively constructed with CSI (Cyclic Shifted Identity) and null sub-matrices. An LDPC matrix corresponding to an LDPC code is employed within a communication device to encode and/or decode coded signals for use in any of a number of communication systems. The LDPC matrix is composed of a number of sub-matrices and may be partitioned into a left hand side matrix and a right hand side matrix. The right hand side matrix may include two sub-matrix diagonals therein that are composed entirely of CSI (Cyclic Shifted Identity) sub-matrices; one of these two sub-matrix diagonals is located on the center sub-matrix diagonal and the other is located just to the left thereof. All other sub-matrices of the right hand side matrix may be null sub-matrices (i.e., all elements therein are values of zero “0”).Type: ApplicationFiled: March 19, 2012Publication date: July 26, 2012Applicant: BROADCOM CORPORATIONInventors: Ba-Zhong Shen, Hau Thien Tran, Tak K. Lee, Kelly Brian Cameron
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Patent number: 8230298Abstract: Overlapping sub-matrix based LDPC (Low Density Parity Check) decoder. Novel decoding approach is presented, by which, updated bit edge messages corresponding to a sub-matrix of an LDPC matrix are immediately employed for updating of the check edge messages corresponding to that sub-matrix without requiring storing the bit edge messages; also updated check edge messages corresponding to a sub-matrix of the LDPC matrix are immediately employed for updating of the bit edge messages corresponding to that sub-matrix without requiring storing the check edge messages. Using this approach, twice as many decoding iterations can be performed in a given time period when compared to a system that performs updating of all check edge messages for the entire LDPC matrix, then updating of all bit edge messages for the entire LDPC matrix, and so on. When performing this overlapping approach in conjunction with min-sum processing, significant memory savings can also be achieved.Type: GrantFiled: January 1, 2010Date of Patent: July 24, 2012Assignee: Broadcom CorporationInventors: Hau Thien Tran, Kelly Brian Cameron, Ba-Zhong Shen, Tak K. Lee
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Patent number: 8145987Abstract: LDPC (Low Density Parity Check) codes with corresponding parity check matrices selectively constructed with CSI (Cyclic Shifted Identity) and null sub-matrices. An LDPC matrix corresponding to an LDPC code is employed within a communication device to encode and/or decode coded signals for use in any of a number of communication systems. The LDPC matrix is composed of a number of sub-matrices and may be partitioned into a left hand side matrix and a right hand side matrix. The right hand side matrix may include two sub-matrix diagonals therein that are composed entirely of CSI (Cyclic Shifted Identity) sub-matrices; one of these two sub-matrix diagonals is located on the center sub-matrix diagonal and the other is located just to the left thereof. All other sub-matrices of the right hand side matrix may be null sub-matrices (i.e., all elements therein are values of zero “0”).Type: GrantFiled: January 13, 2011Date of Patent: March 27, 2012Assignee: Broadcom CorporationInventors: Ba-Zhong Shen, Hau Thien Tran, Tak K. Lee, Kelly Brian Cameron
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Publication number: 20120014364Abstract: A wireless local area network (WLAN) transmitter includes a baseband processing module and a plurality of radio frequency (RF) transmitters. The processing module selects one of a plurality of modes of operation based on a mode selection signal. The processing module determines a number of transmit streams based on the mode selection signal. The processing of the data further continues by converting encoded data into streams of symbols in accordance with the number of transmit streams and the mode selection signal. A number of the plurality of RF transmitters are enabled based on the mode selection signal to convert a corresponding one of the streams of symbols into a corresponding RF signal such that a corresponding number of RF signals is produced.Type: ApplicationFiled: September 26, 2011Publication date: January 19, 2012Applicant: BROADCOM CORPORATIONInventors: Christopher J. Hansen, Jason A. Trachewsky, Nambirajan Seshadri, Kelly Brian Cameron, Hau Thien Tran, Ba-Zhong Shen
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Patent number: 8086930Abstract: Fixed-spacing parity insertion for FEC (Forward Error Correction) codewords. Fixed spacing is employed to intersperse parity bits among information bits when generating a codeword. According to this fixed spacing, a same number of information bits is placed between each of the parity bits within the codeword. If desired, the order of the parity bits may be changed before they are placed into the codeword. Moreover, the order of the information bits may also be modified before they are placed into the codeword. The FEC encoding employed to generate the parity bits from the information bits can be any of a variety of codes include Reed-Solomon (RS) code, LDPC (Low Density Parity Check) code, turbo code, turbo trellis coded modulation (TTCM), or some other code providing FEC capabilities.Type: GrantFiled: January 29, 2008Date of Patent: December 27, 2011Assignee: Broadcom CorporationInventors: Tak K. Lee, Ba-Zhong Shen, Hau Thien Tran, Kelly Brian Cameron
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Patent number: 8059740Abstract: A wireless local area network (WLAN) transmitter includes a baseband processing module and a plurality of radio frequency (RF) transmitters. The baseband processing module is operably coupled to process data by scrambling the data in accordance with a pseudo random sequence to produce scrambled data. The processing of the data continues by selecting one of a plurality of encoding modes based on a mode selection signal. The processing of the data continues by encoding the scrambled data in accordance with the one of the plurality of encoding modes to produce encoded data. The processing of the data continues by determining a number of transmit streams based on the mode selection signal. The processing of the data further continues by converting the encoded data into streams of symbols in accordance with the number of transmit streams and the mode selection signal.Type: GrantFiled: May 28, 2004Date of Patent: November 15, 2011Assignee: Broadcom CorporationInventors: Christopher J. Hansen, Jason A. Trachewsky, Nambirajan Seshadri, Kelly Brian Cameron, Hau Thien Tran, Ba-Zhong Shen
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Publication number: 20110258518Abstract: Variable modulation within combined LDPC (Low Density Parity Check) coding and modulation coding systems. A novel approach is presented for variable modulation encoding of LDPC coded symbols. In addition, LDPC encoding, that generates an LDPC variable code rate signal, may also be performed as well. The encoding can generate an LDPC variable code rate and/or modulation signal whose code rate and/or modulation may vary as frequently as on a symbol by symbol basis. Some embodiments employ a common constellation shape for all of the symbols of the signal sequence, yet individual symbols may be mapped according different mappings of the commonly shaped constellation; such an embodiment may be viewed as generating a LDPC variable mapped signal. In general, any one or more of the code rate, constellation shape, or mapping of the individual symbols of a signal sequence may vary as frequently as on a symbol by symbol basis.Type: ApplicationFiled: May 26, 2011Publication date: October 20, 2011Applicant: BROADCOM CORPORATIONInventors: Ba-Zhong Shen, Hau Thien Tran, Kelly Brian Cameron
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Patent number: 7975202Abstract: Variable modulation with LDPC (Low Density Parity Check) coding provides for generation of LDPC coded symbols having different respective code rates and/or modulations. In addition, appropriate LDPC encoding, that generates an LDPC variable code rate signal, may also be performed as well. The encoding can generate an LDPC variable code rate and/or modulation signal whose code rate and/or modulation may vary as frequently as on a symbol by symbol basis. Some embodiments employ a common constellation shape for all of the symbols of the signal sequence, yet individual symbols may be mapped according different mappings of the commonly shaped constellation; such an embodiment may be viewed as generating a LDPC variable mapped signal. In general, any one or more of the code rate, constellation shape, and/or mapping of the individual symbols of a signal sequence may vary as frequently as on a symbol by symbol basis.Type: GrantFiled: October 3, 2006Date of Patent: July 5, 2011Assignee: Broadcom CorporationInventors: Ba-Zhong Shen, Hau Thien Tran, Kelly Brian Cameron
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Patent number: 7958428Abstract: LDPC (Low Density Parity Check) coded signal decoding using parallel and simultaneous bit node and check node processing. This novel approach to decoding of LDPC coded signals may be described as being LDPC bit-check parallel decoding. In some alternative embodiment, the approach to decoding LDPC coded signals may be modified to LDPC symbol-check parallel decoding or LDPC hybrid-check parallel decoding. A novel approach is presented by which the edge messages with respect to the bit nodes and the edge messages with respect to the check nodes may be updated simultaneously and in parallel to one another. Appropriately constructed executing orders direct the sequence of simultaneous operation of updating the edge messages at both nodes types (e.g., edge and check). For various types of LDPC coded signals, including parallel-block LDPC coded signals, this approach can perform decoding processing in almost half of the time as provided by previous decoding approaches.Type: GrantFiled: August 29, 2007Date of Patent: June 7, 2011Assignee: Broadcom CorporationInventors: Ba-Zhong Shen, Hau Thien Tran, Kelly Brian Cameron
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Publication number: 20110110353Abstract: A wireless local area network (WLAN) transmitter includes a MAC module, a PLCP module, and a PMD module. The Medium Access Control (MAC) module is operably coupled to convert a MAC Service Data Unit (MSDU) into a MAC Protocol Data Unit (MPDU) in accordance with a WLAN protocol. The Physical Layer Convergence Procedure (PLCP) Module is operably coupled to convert the MPDU into a PLCP Protocol Data Unit (PPDU) in accordance with the WLAN protocol. The Physical Medium Dependent (PMD) module is operably coupled to convert the PPDU into a plurality of radio frequency (RF) signals in accordance with one of a plurality of operating modes of the WLAN protocol, wherein the plurality of operating modes includes multiple input and multiple output combinations.Type: ApplicationFiled: January 13, 2011Publication date: May 12, 2011Applicant: BROADCOM CORPORATIONInventors: Christopher J. Hansen, Jason A. Trachewsky, Nambirajan Seshadri, Kelly Brian Cameron, Hau Thien Tran, Ba-Zhong Shen
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Publication number: 20110107175Abstract: LDPC (Low Density Parity Check) codes with corresponding parity check matrices selectively constructed with CSI (Cyclic Shifted Identity) and null sub-matrices. An LDPC matrix corresponding to an LDPC code is employed within a communication device to encode and/or decode coded signals for use in any of a number of communication systems. The LDPC matrix is composed of a number of sub-matrices and may be partitioned into a left hand side matrix and a right hand side matrix. The right hand side matrix may include two sub-matrix diagonals therein that are composed entirely of CSI (Cyclic Shifted Identity) sub-matrices; one of these two sub-matrix diagonals is located on the center sub-matrix diagonal and the other is located just to the left thereof. All other sub-matrices of the right hand side matrix may be null sub-matrices (i.e., all elements therein are values of zero “0”).Type: ApplicationFiled: January 13, 2011Publication date: May 5, 2011Applicant: BROADCOM CORPORATIONInventors: Ba-Zhong Shen, Hau Thien Tran, Tak K. Lee, Kelly Brian Cameron
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Publication number: 20110072336Abstract: LDPC (Low Density Parity Check) coded modulation symbol decoding. Symbol decoding is supported by appropriately modifying an LDPC tripartite graph to eliminate the bit nodes thereby generating an LDPC bipartite graph (such that symbol nodes are appropriately mapped directly to check nodes thereby obviating the bit nodes). The edges that communicatively couple the symbol nodes to the check nodes are labeled appropriately to support symbol decoding of the LDPC coded modulation signal. The iterative decoding processing may involve updating the check nodes as well as estimating the symbol sequence and updating the symbol nodes. In some embodiments, an alternative hybrid decoding approach may be performed such that a combination of bit level and symbol level decoding is performed. This LDPC symbol decoding out-performs bit decoding only. In addition, it provides comparable or better performance of bit decoding involving iterative updating of the associated metrics.Type: ApplicationFiled: November 30, 2010Publication date: March 24, 2011Applicant: BROADCOM CORPORATIONInventors: Ba-Zhong Shen, Hau Thien Tran, Kelly Brian Cameron
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Patent number: 7900127Abstract: LDPC (Low Density Parity Check) codes with corresponding parity check matrices selectively constructed with CSI (Cyclic Shifted Identity) and null sub-matrices. An LDPC matrix corresponding to an LDPC code is employed within a communication device to encode and/or decode coded signals for use in any of a number of communication systems. The LDPC matrix is composed of a number of sub-matrices and may be partitioned into a left hand side matrix and a right hand side matrix. The right hand side matrix may include two sub-matrix diagonals therein that are composed entirely of CSI (Cyclic Shifted Identity) sub-matrices; one of these two sub-matrix diagonals is located on the center sub-matrix diagonal and the other is located just to the left thereof. All other sub-matrices of the right hand side matrix may be null sub-matrices (i.e., all elements therein are values of zero “0”).Type: GrantFiled: July 31, 2009Date of Patent: March 1, 2011Assignee: Broadcom CorporationInventors: Ba-Zhong Shen, Hau Thien Tran, Tak K. Lee, Kelly Brian Cameron
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Patent number: 7873022Abstract: A wireless local area network (WLAN) transmitter includes a MAC module, a PLCP module, and a PMD module. The Medium Access Control (MAC) module is operably coupled to convert a MAC Service Data Unit (MSDU) into a MAC Protocol Data Unit (MPDU) in accordance with a WLAN protocol. The Physical Layer Convergence Procedure (PLCP) Module is operably coupled to convert the MPDU into a PLCP Protocol Data Unit (PPDU) in accordance with the WLAN protocol. The Physical Medium Dependent (PMD) module is operably coupled to convert the PPDU into a plurality of radio frequency (RF) signals in accordance with one of a plurality of operating modes of the WLAN protocol, wherein the plurality of operating modes includes multiple input and multiple output combinations.Type: GrantFiled: September 3, 2004Date of Patent: January 18, 2011Assignee: Broadcom CorporationInventors: Christopher J. Hansen, Jason A. Trachewsky, Nambirajan Seshadri, Kelly Brian Cameron, Hau Thien Tran, Ba-Zhong Shen
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Patent number: 7849389Abstract: LDPC (Low Density Parity Check) coded modulation symbol decoding. Symbol decoding is supported by appropriately modifying an LDPC tripartite graph to eliminate the bit nodes thereby generating an LDPC bipartite graph (such that symbol nodes are appropriately mapped directly to check nodes thereby obviating the bit nodes). The edges that communicatively couple the symbol nodes to the check nodes are labeled appropriately to support symbol decoding of the LDPC coded modulation signal. The iterative decoding processing may involve updating the check nodes as well as estimating the symbol sequence and updating the symbol nodes. In some embodiments, an alternative hybrid decoding approach may be performed such that a combination of bit level and symbol level decoding is performed. This LDPC symbol decoding out-performs bit decoding only. In addition, it provides comparable or better performance of bit decoding involving iterative updating of the associated metrics.Type: GrantFiled: October 5, 2006Date of Patent: December 7, 2010Assignee: Broadcom CorporationInventors: Ba-Zhong Shen, Hau Thien Tran, Kelly Brian Cameron