Patents by Inventor Hee In Nam

Hee In Nam has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10872727
    Abstract: A multilayer ceramic capacitor includes: a ceramic body including dielectric layers and first internal electrodes and second internal electrodes disposed to face each other with one of the dielectric layers interposed therebetween; and first and second external electrodes disposed on external surfaces of the ceramic body and electrically connected to the first and second internal electrodes, respectively. The dielectric layer includes dielectric grains, a grain boundary is present between at least two dielectric grains of the dielectric grains, and a Si/Ti mole ratio in the grain boundary satisfies 15% to 40%.
    Type: Grant
    Filed: February 19, 2019
    Date of Patent: December 22, 2020
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Kum Jin Park, Kwang Hee Nam, Young Bin Jeong, Myung Woo Lee, Jong Han Kim
  • Patent number: 10872726
    Abstract: A multilayer ceramic capacitor includes: a ceramic body including dielectric layers and first internal electrodes and second internal electrodes disposed to face each other with one of the dielectric layers interposed therebetween; and first and second external electrodes disposed on external surfaces of the ceramic body and electrically connected to the first and second internal electrodes, respectively. The dielectric layer includes dielectric grains, a grain boundary is present between at least two dielectric grains of the dielectric grains, and a Si/Ti mole ratio in the grain boundary satisfies 15% to 40%.
    Type: Grant
    Filed: October 24, 2018
    Date of Patent: December 22, 2020
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Kum Jin Park, Kwang Hee Nam, Young Bin Jeong, Myung Woo Lee, Jong Han Kim
  • Patent number: 10865329
    Abstract: The present invention relates to an adhesive film for a semiconductor that can more easily bury unevenness such as through wires of a semiconductor substrate or a wire attached to a semiconductor chip and the like, and yet can be applied to various cutting methods without specific limitations to realize excellent cuttability, thus improving reliability and efficiency of a semiconductor packaging process.
    Type: Grant
    Filed: April 29, 2016
    Date of Patent: December 15, 2020
    Assignee: LG CHEM, LTD.
    Inventors: Hee Jung Kim, Se Ra Kim, Jung Hak Kim, Seung Hee Nam, Jung Ho Jo, Kwang Joo Lee, Young Kook Kim
  • Patent number: 10809829
    Abstract: Disclosed are an organic light emitting display device and a method of manufacturing the same to reduce thickness and weight. The organic light emitting display device with a touch sensor removes the necessity of an additional adhesion process by directly forming a touch sensing electrode and a touch driving electrode arranged in parallel and a color filter on an encapsulation layer covering a light emitting device, thereby simplifying a manufacturing process and reducing manufacturing costs.
    Type: Grant
    Filed: February 21, 2017
    Date of Patent: October 20, 2020
    Assignee: LG Display Co., Ltd.
    Inventors: Jae-Won Lee, Seung-Hee Nam, Min-Joo Kim, Kwon-Shik Park, Jae-Young Oh, Deuk-Su Lee, Bu-Yeol Lee, Eun-Hye Lee
  • Publication number: 20200294972
    Abstract: The present invention relates to a semiconductor device and a method of manufacturing a semiconductor device, and more particularly, to a semiconductor device capable of reducing the uppermost semiconductor chip damage and stably performing wire bonding even if an excessive force is applied during a die bonding process or a wire bonding process, and a method for manufacturing the semiconductor device.
    Type: Application
    Filed: May 27, 2020
    Publication date: September 17, 2020
    Applicant: LG Chem, Ltd.
    Inventors: Jung Hak Kim, Hee Jung Kim, Se Ra Kim, Jung Ho Jo, Kwang Joo Lee, Seung Hee Nam, Young Kook Kim
  • Patent number: 10775912
    Abstract: Disclosed is a display device having touch sensors which may reduce parasitic capacitance and a method of manufacturing the same. The display device includes a plurality of touch sensing lines respectively arranged so as to traverse a plurality of common electrode blocks forming an electric field with pixel electrodes, a lower planarization layer having openings in regions overlapping drain electrodes of thin film transistors, an upper planarization layer arranged between one of the pixel electrodes and the common electrode blocks, and the touch sensing lines so as to cover a side surface of the lower planarization layer, and an upper protective film arranged between the pixel electrodes and the common electrode blocks, and, thus, parasitic capacitance generated between the touch sensing lines and the common electrode blocks may be reduced without reduction in liquid crystal capacitance and storage capacitance.
    Type: Grant
    Filed: December 12, 2018
    Date of Patent: September 15, 2020
    Assignee: LG Display Co., Ltd.
    Inventors: Jung-Sun Beak, Seung-Hee Nam, Jung-Ho Bang, Seong-Joo Lee
  • Patent number: 10759971
    Abstract: The present invention relates to an adhesive composition for a semiconductor including: a thermoplastic resin having a glass transition temperature of ?10° C. to 20° C.; a curing agent containing a phenol resin having a softening point of 70° C. or more; a solid epoxy resin; and a liquid epoxy resin, wherein a weight ratio of the total contents of the solid epoxy resin and the liquid epoxy resin to the thermoplastic resin is 1.6 to 2.6, an adhesive film for a semiconductor including the adhesive composition for a semiconductor, a dicing die bonding film including an adhesive layer including the adhesive composition for a semiconductor, and a method for dicing a semiconductor wafer using the dicing die bonding film.
    Type: Grant
    Filed: April 29, 2016
    Date of Patent: September 1, 2020
    Assignee: LG CHEM, LTD.
    Inventors: Hee Jung Kim, Se Ra Kim, Jung Hak Kim, Seung Hee Nam, Jung Ho Jo, Kwang Joo Lee, Young Kook Kim
  • Patent number: 10707187
    Abstract: The present invention relates to a semiconductor device and a method of manufacturing a semiconductor device, and more particularly, to a semiconductor device capable of reducing the uppermost semiconductor chip damage and stably performing wire bonding even if an excessive force is applied during a die bonding process or a wire bonding process, and a method for manufacturing the semiconductor device.
    Type: Grant
    Filed: November 4, 2016
    Date of Patent: July 7, 2020
    Assignee: LG Chem, Ltd.
    Inventors: Jung Hak Kim, Hee Jung Kim, Se Ra Kim, Jung Ho Jo, Kwang Joo Lee, Seung Hee Nam, Young Kook Kim
  • Patent number: 10672847
    Abstract: A display device includes: thin film transistors (TFTs) on a substrate, pixel electrodes (PEs) respectively connected to the TFTs, common electrode blocks (CEBs) on the substrate, each CEB forming an electric field with a respective PE, touch sensing lines (TSLs) respectively connected to the CEBs, a lower planarization layer (PL) between the TFTs and the TSLs, an upper PL between the TSLs and one of: the PEs and the CEBs, an upper protective film between the PEs and the CEBs, and pixel contact holes extending through the lower PL and the upper PL to expose respective drain electrodes of the TFTs, wherein a side surface of each of the lower PL and the upper PL, exposed through the pixel contact holes, contacts one of: the upper protective film and the PEs.
    Type: Grant
    Filed: December 4, 2018
    Date of Patent: June 2, 2020
    Assignee: LG Display Co., Ltd.
    Inventors: Seung-Hee Nam, Jung-Ho Bang, Jung-Sun Beak, Seong-Joo Lee
  • Patent number: 10672923
    Abstract: A front electrode for solar cells and a solar cell, the front electrode including a stepped structure at an outermost surface thereof, wherein the stepped structure is composed of n stages, in which n is an integer of 3 or greater, and an nth stage has a smaller cross-sectional area than an (n?1)th stage such that the (n?1)th stage is partially exposed, and the stepped structure occupies about 5% to about 100% of a total surface area of the outermost surface.
    Type: Grant
    Filed: July 27, 2017
    Date of Patent: June 2, 2020
    Assignee: SAMSUNG SDI CO., LTD.
    Inventors: Dong Suk Kim, Hee In Nam, Sang Hee Park, Seok Hyun Jung, Jae Hwi Cho
  • Publication number: 20200165166
    Abstract: A multilayer ceramic capacitor includes: a ceramic body in which dielectric layers and first and second internal electrodes are alternately stacked; and first and second external electrodes formed on an outer surface of the ceramic body and electrically connected to the first and second internal electrodes, respectively. In a microstructure of the dielectric layer, dielectric grains are divided by a dielectric grain size into sections each having an interval of 50 nm, respectively, a fraction of the dielectric grains in each of the sections within a range of 50 nm to 450 nm is within a range of 0.025 to 0.20, and a thickness of the dielectric layer is 0.8 ?m or less.
    Type: Application
    Filed: January 31, 2020
    Publication date: May 28, 2020
    Inventors: Seok Hyun YOON, Jung Deok PARK, Chan Hee NAM, Dong Hun KIM
  • Patent number: 10650901
    Abstract: An electronic device includes a controller, a non-transitory computer-readable storage medium including memory cells having a plurality of threshold voltage distributions and storing operation codes executable by the controller.
    Type: Grant
    Filed: November 21, 2018
    Date of Patent: May 12, 2020
    Assignee: SK hynix Inc.
    Inventor: Hee Nam Yoo
  • Patent number: 10584066
    Abstract: A multilayer ceramic capacitor includes: a ceramic body in which dielectric layers and first and second internal electrodes are alternately stacked; and first and second external electrodes formed on an outer surface of the ceramic body and electrically connected to the first and second internal electrodes, respectively. In a microstructure of the dielectric layer, dielectric grains are divided by a dielectric grain size into sections each having an interval of 50 nm, respectively, a fraction of the dielectric grains in each of the sections within a range of 50 nm to 450 nm is within a range of 0.025 to 0.20, and a thickness of the dielectric layer is 0.8 ?m or less.
    Type: Grant
    Filed: June 6, 2018
    Date of Patent: March 10, 2020
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Seok Hyun Yoon, Jung Deok Park, Chan Hee Nam, Dong Hun Kim
  • Publication number: 20200072132
    Abstract: A method of continuously variable valve duration (CVVD) location learning may include when a controller determines necessity of position learning for short duration and long duration of a CVVD system, performing conditional application re-learning control in which the position learning is performed in a situation in which validity determination of system environment condition for CVVD hardware and validity determination of vehicle environment condition for engine operation information of an engine are satisfied.
    Type: Application
    Filed: December 6, 2018
    Publication date: March 5, 2020
    Applicants: Hyundai Motor Company, KIA Motors Corporation
    Inventors: Jung-Sup Byun, Hee-Nam Woo
  • Publication number: 20200063611
    Abstract: A method of continuously variable valve duration (CVVD) location learning may include when current position information applied to valve duration control in a CVVD system is not detected by a controller, executing a re-learning mode in which re-learning of short duration and long duration is performed by classifying a situation, in which the current position information is not detected, into a plurality of non-detection situations.
    Type: Application
    Filed: December 13, 2018
    Publication date: February 27, 2020
    Applicants: Hyundai Motor Company, Kia Motors Corporation
    Inventors: Jung-Sup BYUN, Hee-Nam WOO
  • Patent number: 10564043
    Abstract: The present invention relates to a apparatus and method for measuring a waveform of a light wave. A light wave measurement apparatus according to an embodiment of the present invention includes a pulse separation unit to separate an input light wave into a fundamental pulse and a signal pulse, a time delay adjustment unit to adjust a time delay between the fundamental pulse and the signal pulse, a focusing unit to focus the fundamental pulse and the signal pulse whose time delay is adjusted on an ionization material, and an ionization yield measurement unit to measure an ionization yield from electrons and/or ions generated by the focused fundamental pulse and signal pulse. The waveform of the input light wave is obtained by obtaining an ionization yield modulation changed by the signal pulse as a function of the time delay.
    Type: Grant
    Filed: May 17, 2018
    Date of Patent: February 18, 2020
    Assignees: Institute For Basic Science, Gwangju Institute of Science And Technology
    Inventors: Kyung-Taec Kim, Chang-Hee Nam, Seung-Beom Park, Wo-Sik Cho, Kyung-Seung Kim
  • Publication number: 20200051747
    Abstract: A multilayer ceramic capacitor includes: a ceramic body including dielectric layers and first internal electrodes and second internal electrodes disposed to face each other with one of the dielectric layers interposed therebetween; and first and second external electrodes disposed on external surfaces of the ceramic body and electrically connected to the first and second internal electrodes, respectively. The dielectric layer includes dielectric grains, a grain boundary is present between at least two dielectric grains of the dielectric grains, and a Si/Ti mole ratio in the grain boundary satisfies 15% to 40%.
    Type: Application
    Filed: October 24, 2018
    Publication date: February 13, 2020
    Inventors: Kum Jin PARK, Kwang Hee NAM, Young Bin JEONG, Myung Woo LEE, Jong Han KIM
  • Publication number: 20200051748
    Abstract: A multilayer ceramic capacitor includes: a ceramic body including dielectric layers and first internal electrodes and second internal electrodes disposed to face each other with one of the dielectric layers interposed therebetween; and first and second external electrodes disposed on external surfaces of the ceramic body and electrically connected to the first and second internal electrodes, respectively. The dielectric layer includes dielectric grains, a grain boundary is present between at least two dielectric grains of the dielectric grains, and a Si/Ti mole ratio in the grain boundary satisfies 15% to 40%.
    Type: Application
    Filed: February 19, 2019
    Publication date: February 13, 2020
    Inventors: Kum Jin PARK, Kwang Hee NAM, Young Bin JEONG, Myung Woo LEE, Jong Han KIM
  • Patent number: D891877
    Type: Grant
    Filed: May 15, 2019
    Date of Patent: August 4, 2020
    Inventor: Chang Hee Nam
  • Patent number: D891878
    Type: Grant
    Filed: May 15, 2019
    Date of Patent: August 4, 2020
    Inventor: Chang Hee Nam