Patents by Inventor Hem Takiar

Hem Takiar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180174996
    Abstract: A wide I/O semiconductor device is disclosed including a memory die stack wire bonded to an interface chip. The stack of memory die may be wire bonded to the interface chip using a wire bond scheme optimized for die-to-die connection and optimized for the large number of wire bond connections in a wide I/O semiconductor device. This method can achieve significant BW increase by improving packaging yield and costs, not possible with current packaging schemes.
    Type: Application
    Filed: February 18, 2018
    Publication date: June 21, 2018
    Applicant: SANDISK TECHNOLOGIES LLC
    Inventors: Michael Mostovoy, Gokul Kumar, Ning Ye, Hem Takiar, Venkatesh P. Ramachandra, Vinayak Ghatawade, Chih-Chin Liao
  • Publication number: 20180114777
    Abstract: The present technology relates to a semiconductor device. The semiconductor device comprises: a plurality of dies stacked on top of each other, each of the dies comprising a first major surface, an IO conductive pattern on the first major surface and extended to a minor surface substantially perpendicular to the major surfaces to form at least one IO electrical contact on the minor surface, and the plurality of dies aligned so that the corresponding minor surfaces of all dies substantially coplanar with respect to each other to form a common flat sidewall, and a plurality of IO routing traces formed over the sidewall and at least partially spaced away from the sidewall. The plurality of IO routing traces are spaced apart from each other in a first direction on the sidewall, and each of IO routing traces is electrically connected to a respective IO electrical contact and extended across the sidewall in a second direction substantially perpendicular to the first direction on the sidewall.
    Type: Application
    Filed: September 14, 2017
    Publication date: April 26, 2018
    Applicant: SANDISK INFORMATION TECHNOLOGY (SHANGHAI) CO., LTD.
    Inventors: Chin Tien Chiu, Hem Takiar, Gursharan Singh, Fisher Yu, CC Liao
  • Publication number: 20180114773
    Abstract: The present technology relates to a semiconductor package. The semiconductor package comprises: a first component comprising a plurality of first dies stacked on top of each other, each of first dies comprising at least one side surface and an electrical contact exposed on the side surface, and the plurality of first dies aligned so that the corresponding side surfaces of all first dies substantially coplanar with respect to each other to form a common sidewall; a first conductive pattern formed over the sidewall and at least partially spaced away from the sidewall, the first conductive pattern electrically interconnecting the electrical contacts of the plurality of first dies; at least one second component; and a second conductive pattern formed on a surface of the second component, the second conductive pattern affixed and electrically connected to the first conductive pattern formed over the sidewall of the first component.
    Type: Application
    Filed: September 14, 2017
    Publication date: April 26, 2018
    Applicant: SANDISK INFORMATION TECHNOLOGY (SHANGHAI) CO., LTD .
    Inventors: Chin Tien Chiu, Tiger Tai, Ken Qian, CC Liao, Hem Takiar, Gursharan Singh
  • Publication number: 20180102344
    Abstract: A non-volatile storage system includes a plurality of memory dies and an interface circuit. Each memory die includes a wide I/O interface electrically coupled to another wide I/O interface of another memory die of the plurality of memory dies. The interface circuit is physically separate from the memory dies. The interface circuit includes a first interface and a second interface. The first interface comprises a wide I/O interface electrically coupled to a wide I/O interface of at least one of the memory dies of the plurality of memory dies. The second interface is a narrow I/O interface configured to communicate with an external circuit.
    Type: Application
    Filed: October 6, 2016
    Publication date: April 12, 2018
    Applicant: SANDISK TECHNOLOGIES LLC
    Inventors: Venkatesh P. Ramachandra, Michael Mostovoy, Hem Takiar, Gokul Kumar, Vinayak Ghatawade
  • Patent number: 9899347
    Abstract: A wide I/O semiconductor device is disclosed including a memory die stack wire bonded to an interface chip. The stack of memory die may be wire bonded to the interface chip using a wire bond scheme optimized for die-to-die connection and optimized for the large number of wire bond connections in a wide I/O semiconductor device. This method can achieve significant BW increase by improving packaging yield and costs, not possible with current packaging schemes.
    Type: Grant
    Filed: March 9, 2017
    Date of Patent: February 20, 2018
    Assignee: SanDisk Technologies LLC
    Inventors: Michael Mostovoy, Gokul Kumar, Ning Ye, Hem Takiar, Venkatesh P. Ramachandra, Vinayak Ghatawade, Chih-Chin Liao
  • Publication number: 20180047706
    Abstract: A semiconductor device vertically mounted on a medium such as a printed circuit board, and a method of its manufacture, are disclosed. The semiconductor device includes a stack of semiconductor die having contact pads which extend to an active edge of the die aligned on one side of the stack. The active edges of the die are affixed to the PCB and the contact pads at the active edge are electrically coupled to the PCB. This configuration provides an optimal, high density arrangement of semiconductor die in the device, where a large number of semiconductor die can be mounted and electrically coupled directly to the PCT, without a substrate, without staggering the semiconductor die, and without using wire bonds.
    Type: Application
    Filed: June 12, 2017
    Publication date: February 15, 2018
    Applicant: SANDISK INFORMATION TECHNOLOGY (SHANGHAI) CO., LTD.
    Inventors: Suresh Upadhyayula, Ning Ye, Chin Tien Chiu, Hem Takiar, Peng Chen
  • Publication number: 20180005974
    Abstract: A semiconductor device is disclosed including at least first and second vertically stacked and interconnected semiconductor packages. Signal communication between the second semiconductor package and a host device occurs through the first semiconductor package.
    Type: Application
    Filed: June 12, 2017
    Publication date: January 4, 2018
    Applicant: SANDISK INFORMATION TECHNOLOGY (SHANGHAI) CO., LTD.
    Inventors: Chin-Tien Chiu, Hem Takiar
  • Patent number: 9362244
    Abstract: A memory device, and a method of making the memory device, are disclosed. The memory device is fabricated by mounting one or more semiconductor die on a substrate, and wire bonding the die to the substrate. The die and wire bonds are encapsuated, and the encapsulated device is singulated. The wire bonds are severed during the singulation step, and thereafter the severed wire bonds are connected to the substrate by external connectors on one or more surfaces of the molding compound.
    Type: Grant
    Filed: October 22, 2012
    Date of Patent: June 7, 2016
    Assignee: SanDisk Information Technology (Shanghai) Co., Ltd.
    Inventors: Chin Tien Chiu, Cheeman Yu, Hem Takiar
  • Patent number: 9337153
    Abstract: A memory device including a metallic layer shielding electromagnetic radiation and/or dissipating heat, and a method of making the memory device, are disclosed. The metallic layer is formed on a metallic layer transfer assembly. The metallic layer transfer assembly and the unencapsulated memory device are placed in a mold and encapsulated. During the encapsulation and curing of the molding compound, the metallic layer is transferred from the shield to the encapsulated memory device.
    Type: Grant
    Filed: December 16, 2011
    Date of Patent: May 10, 2016
    Assignee: SanDisk Information Technology (Shanghai) Co., Ltd.
    Inventors: Peng Fu, Shan Luo, Zhong Lu, Kaiyou Qian, Chin Tien Chiu, Cheeman Yu, Hem Takiar, Ye Bai
  • Patent number: 9230919
    Abstract: A rigid wave pattern formed on a first side of a substrate in a semiconductor die package. The rigid wave pattern aligns with and overlies the contact fingers formed on the second side of the substrate. The rigid wave pattern includes a first pattern with an etched portion and an unetched portion around the etched portion. When the substrate and dice are encased during the molding process, the rigid wave pattern effectively reduces deformation of and stresses on the dice, therefore substantially alleviating die cracking.
    Type: Grant
    Filed: October 30, 2014
    Date of Patent: January 5, 2016
    Assignee: SanDisk Technologies Inc.
    Inventors: Chin-Tien Chiu, Chih-Chin Liao, Ken Jian Ming Wang, Han-Shiao Chen, Cheeman Yu, Hem Takiar
  • Patent number: 9218953
    Abstract: A low profile USB flash memory device, and methods of forming same, are disclosed. The USB flash memory device includes an integrated circuit memory portion and a USB connector. The memory portion and the USB connector may be integrally formed on the same substrate. The USB flash memory device includes a substrate on which is mounted one or more flash memory die, a controller die, passive components and an LED for indicating when the memory is being accessed. In contrast to prior art USB memory devices which used TSOP packages mounted on a printed circuit board, the semiconductor die of the present invention are affixed to the substrate and wire bonded in a SIP configuration. Omitting the encapsulated TSOP packages allows a reduction in the overall thickness of the USB flash memory device.
    Type: Grant
    Filed: February 2, 2015
    Date of Patent: December 22, 2015
    Assignee: SanDisk Technologies Inc.
    Inventors: Suresh Upadhyayula, Robert C. Miller, Hem Takiar, Steven Sprouse, Ka Ian Yung
  • Patent number: 9209159
    Abstract: A strengthened semiconductor die substrate and package are disclosed. The substrate may include contact fingers formed with nonlinear edges. Providing a nonlinear contour to the contact finger edges reduces the mechanical stress exerted on the semiconductor die which would otherwise occur with straight edges to the contact fingers. The substrate may additionally or alternatively include plating traces extending at an angle from the contact fingers. Extending at an angle, at least the ends of the plating traces at the edge of the substrate are covered beneath a lid in which the semiconductor package is encased. Thus, when in use with a host device, contact between the ends of the plating traces beneath the lid and contact pins of the host device is avoided.
    Type: Grant
    Filed: March 2, 2012
    Date of Patent: December 8, 2015
    Assignee: SanDisk Technologies Inc.
    Inventors: Hem Takiar, Cheeman Yu, Ken Jian Ming Wang, Chin-Tien Chiu, Han-Shiao Chen, Chih-Chin Liao
  • Publication number: 20150223335
    Abstract: A printed circuit board is disclosed having coextensive electrical connectors and contact pad areas. Areas of the contact pads where the traces and/or vias are located may be etched away to ensure electrical isolation between the traces, vias and contact pads.
    Type: Application
    Filed: April 13, 2015
    Publication date: August 6, 2015
    Applicant: SANDISK TECHNOLOGIES INC.
    Inventors: Chih-Chin Liao, Han-Shiao Chen, Chin-Tien Chiu, Ken Jian Ming Wang, Cheeman Yu, Hem Takiar
  • Publication number: 20150214184
    Abstract: A system and method are disclosed for applying a die attach epoxy to substrates on a panel of substrates. The system includes a window clamp having one or more windows through which the epoxy may be applied onto the substrate panel. The size and shape of the one or more windows correspond to the size and shape of the area on the substrate to receive the die attach epoxy. Once the die attach epoxy is sprayed onto the substrate through the windows of the window clamp, the die may be affixed to the substrate and the epoxy cured in one or more curing steps. The system may further include a clean-up follower for cleaning epoxy off of the window clamp, and a window cleaning mechanism for cleaning epoxy off of the sidewalls of the windows of the window clamp.
    Type: Application
    Filed: April 9, 2015
    Publication date: July 30, 2015
    Applicants: SANDISK INFORMATION TECHNOLOGY (SHANGHAI) CO., LTD., SANDISK SEMICONDUCTOR (SHANGHAI) CO., LTD.
    Inventors: Wei Gu, Zhong Lu, Shrikar Bhagath, Chin-Tien Chiu, Hem Takiar, XiangYang Liu
  • Publication number: 20150155156
    Abstract: A low profile USB flash memory device, and methods of forming same, are disclosed. The USB flash memory device includes an integrated circuit memory portion and a USB connector. The memory portion and the USB connector may be integrally formed on the same substrate. The USB flash memory device includes a substrate on which is mounted one or more flash memory die, a controller die, passive components and an LED for indicating when the memory is being accessed. In contrast to prior art USB memory devices which used TSOP packages mounted on a printed circuit board, the semiconductor die of the present invention are affixed to the substrate and wire bonded in a SIP configuration. Omitting the encapsulated TSOP packages allows a reduction in the overall thickness of the USB flash memory device.
    Type: Application
    Filed: February 2, 2015
    Publication date: June 4, 2015
    Applicant: SANDISK TECHNOLOGIES INC.
    Inventors: Suresh Upadhyayula, Robert C. Miller, Hem Takiar, Steven Sprouse, Ka Ian Yung
  • Patent number: 9006912
    Abstract: A printed circuit board is disclosed having coextensive electrical connectors and contact pad areas. Areas of the contact pads where the traces and/or vias are located may be etched away to ensure electrical isolation between the traces, vias and contact pads.
    Type: Grant
    Filed: July 9, 2012
    Date of Patent: April 14, 2015
    Assignee: SanDisk Technologies Inc.
    Inventors: Chih-Chin Liao, Han-Shiao Chen, Chin-Tien Chiu, Ken Jian Ming Wang, Cheemen Yu, Hem Takiar
  • Patent number: 8987053
    Abstract: A semiconductor package including a plurality of stacked semiconductor die, and methods of forming the semiconductor package, are disclosed. In order to ease wirebonding requirements on the controller die, the controller die may be mounted directly to the substrate in a flip chip arrangement requiring no wire bonds or footprint outside of the controller die. Thereafter, a spacer layer may be affixed to the substrate around the controller die to provide a level surface on which to mount one or more flash memory die. The spacer layer may be provided in a variety of different configurations.
    Type: Grant
    Filed: February 11, 2013
    Date of Patent: March 24, 2015
    Assignee: SanDisk Technologies Inc.
    Inventors: Suresh Upadhyayula, Hem Takiar
  • Publication number: 20150054177
    Abstract: A rigid wave pattern formed on a first side of a substrate in a semiconductor die package. The rigid wave pattern aligns with and overlies the contact fingers formed on the second side of the substrate. The rigid wave pattern includes a first pattern with an etched portion and an unetched portion around the etched portion. When the substrate and dice are encased during the molding process, the rigid wave pattern effectively reduces deformation of and stresses on the dice, therefore substantially alleviating die cracking.
    Type: Application
    Filed: October 30, 2014
    Publication date: February 26, 2015
    Applicant: SANDISK TECHNOLOGIES INC.
    Inventors: Chin-Tien Chiu, Chih-Chin Liao, Ken Jian Ming Wang, Han-Shiao Chen, Cheeman Yu, Hem Takiar
  • Patent number: 8947883
    Abstract: A low profile USB flash memory device, and methods of forming same, are disclosed. The USB flash memory device includes an integrated circuit memory portion and a USB connector. The memory portion and the USB connector may be integrally formed on the same substrate. The USB flash memory device includes a substrate on which is mounted one or more flash memory die, a controller die, passive components and an LED for indicating when the memory is being accessed. In contrast to prior art USB memory devices which used TSOP packages mounted on a printed circuit board, the semiconductor die of the present invention are affixed to the substrate and wire bonded in a SIP configuration. Omitting the encapsulated TSOP packages allows a reduction in the overall thickness of the USB flash memory device.
    Type: Grant
    Filed: December 27, 2007
    Date of Patent: February 3, 2015
    Assignee: SanDisk Technologies Inc.
    Inventors: Suresh Upadhyayula, Robert C. Miller, Hem Takiar, Steven Sprouse, Ka Ian Yung
  • Publication number: 20150001739
    Abstract: A memory device, and a method of making the memory device, are disclosed. The memory device is fabricated by mounting one or more semiconductor die on a substrate, and wire bonding the die to the substrate. The die and wire bonds are encapsuated, and the encapsulated device is singulated. The wire bonds are severed during the singulation step, and thereafter the severed wire bonds are connected to the substrate by external connectors on one or more surfaces of the molding compound.
    Type: Application
    Filed: October 22, 2012
    Publication date: January 1, 2015
    Inventors: Chin Tien Chiu, Cheeman Yu, Hem Takiar