Abstract: A method of training an Optical Proximity Correction (OPC) model comprises symmetrizing a complex design to be a test pattern having orthogonal symmetry. Symmetrizing may comprise establishing a axis of symmetry passing through the design, thereby dividing the design into two portions; deleting one of the two portions; and mirror-imaging the other of the two portions about the axis of symmetry. The design may be centered.

Abstract: This disclosure includes a SRAF layout that minimizes the number of SRAFs required to reliably print contact shapes. A method is provided that reduces the number of necessary SRAF features on a mask, placing at least two elongated SRAF shapes on the mask such that the elongated SRAF shapes extend past at least one edge of a mask shape in at least one direction.

Abstract: Lithography systems and methods of manufacturing semiconductor devices are disclosed. For example, a lithography system includes at least two reticle stages and a common projection lens system disposed between the reticle stages and a wafer stage, and at least one alignment system for aligning the reticle stages.

Abstract: Multi-beam lithography systems and methods of manufacturing semiconductor devices using the same are disclosed. For example, the method utilizes non-coincidence of boundaries of electrical fields emanating from chrome on glass or phase shifted mask features distributed over two masks for the optimization of lithographic process windows, side lobe suppression, or pattern orientation dependent process window optimization employing one mask with polarization rotating film on the backside.

Abstract: Integrated circuits and methods of manufacture and design thereof are disclosed. For example, a method of manufacturing includes depositing a gate material over a semiconductor substrate, and depositing a first resist layer over the gate material. A first mask is used to pattern the first resist layer to form first and second resist features. The first resist features include pattern for gate lines of the semiconductor device and the second resist features include printing assist features. A second mask is used to form a resist template; the second mask removes the second resist features.

Abstract: Integrated circuits and methods of manufacture and design thereof are disclosed. For example, a method of manufacturing includes using a first mask to pattern a gate material forming a plurality of first and second features. The first features form gate electrodes of the semiconductor devices, whereas the second features are dummy electrodes. Based on the location of these dummy electrodes, selected dummy electrodes are removed using a second mask. The use of the method provides greater flexibility in tailoring individual devices for different objectives.

Abstract: System and method for using adjustment patterns as well as physical parameters as targets to control mask structure dimensions using optical proximity correction. A method for correcting layer patterns comprises selecting optimum sacrificial patterns, defining virtual targets from the optimum sacrificial patterns, and executing an optical proximity correction process with the virtual targets to correct layer patterns. The selecting of the optimum sacrificial patterns may be performed in a separate processing stage, thereby reducing the number of targets to be investigated during a process window optical proximity correction, thereby reducing the runtime, processing, and memory requirements.

Abstract: A method for generating a mask pattern is provided. A target lithographic pattern comprising a plurality of first geometric regions is provided, wherein the regions between the plurality of first geometric regions comprise first spaces. The target lithographic pattern is transformed, and the transformed pattern is decomposed into a first pattern and a second pattern.

Abstract: Lithography masks and methods of manufacture thereof are disclosed. For example, a method of manufacturing a lithography mask includes forming a stack over a substrate. The stack includes bottom attenuated phase shift material layers, intermediate opaque material layers, and finally top resist layers. The method further includes patterning the stack and then trimming the resist layers to uncover a portion of the opaque material layers. The uncovered opaque material layers are subsequently etched followed by removal of any remaining resist layers.

Abstract: A method of making a semiconductor device is disclosed. A target mask pattern is provided which includes features to be exposed on the mask, and features to be non-exposed on the mask. The to be exposed features are fractured by searching for geometries on the target mask pattern that meet one or more conditions, identifying mask pattern structures to be fractured, fracturing the identified pattern structures according to a fracture instruction list, creating a set of mask exposure patterns, exposing the mask to the mask exposure pattern, and developing the mask.

Abstract: Lithography masks and methods of manufacture thereof are disclosed. A preferred embodiment comprises a method of manufacturing a lithography mask. The method includes providing a substrate, forming a first pattern in a first region of the substrate, and forming a second pattern in a second region of the substrate, the second pattern comprising patterns for features oriented differently than patterns for features of the first pattern. The method includes affecting a polarization rotation of light differently in the first region than in the second region of the substrate.

Abstract: A test pattern or set of patterns, a method of evaluating the transfer properties of the pattern, and a method of determining a parameter of a transfer process (e.g., imaging process) making use of the test pattern is provided. With the test pattern, the impact of line edge roughness on a transferred pattern may be analyzed. For example, the test pattern may be based upon a lines/spaces pattern, wherein periodic structures having a well-defined period and amplitude are adjacent to the lines. A photomask is provided with the test pattern and an image of the pattern is obtained. Edges of the image are determined and, therefrom, a set of edge position data are obtained. Edge position data are fitted to a straight line to determine edge position residuals. An amplitude spectrum is calculated dependent upon spatial frequencies to obtain a amplitude/spatial frequency relationship. A ratio of determined maximum is formed.

Abstract: A mask and method for patterning a semiconductor wafer is disclosed. A mask set is fabricated on a transparent substrate. A mask layer comprising mask region elements that transmit light is disposed on the substrate, wherein each mask element is segmented into a plurality of segments.

Abstract: The method of dynamically monitoring a reticle includes preventively macro monitoring and defect inspecting with regard to mechanical loading, including particle deposits or electrostatically induced damage, and energy load, including the associated changes to the reticle material and surface characteristics. Different surface distributions of the absorber layer as well as characteristics of the exposure system, such as N2 purging of the projection lens/reticle area in order to reduce contamination and recrystallization on optically active surfaces are considered.

Abstract: System and Method for Semiconductor Device Fabrication Using Modeling System and method for using adjustment patterns as well as physical parameters as targets to control mask structure dimensions using optical proximity correction. A preferred embodiment includes defining targets based on definition rules and adjusting mask layer structures based on the targets. The targets comprise structures that are visible in the reproduced pattern as well as targets that affect geometric properties. The targets that affect geometric properties include target sacrificial structures that are selected from one or more of the following groups: actual sacrificial structures that are visible only in an intermediate exposure of the reproduced pattern, virtual sacrificial structures of a mask layer having at least one dimension smaller than a minimum dimension required for resolution, and virtual sacrificial structures not part of the reproduced pattern.

Abstract: A test pattern or set of patterns, a method of evaluating the transfer properties of the pattern, and a method of determining a parameter of a transfer process (e.g., imaging process) making use of the test pattern is provided. With the test pattern, the impact of line edge roughness on a transferred pattern may be analyzed. For example, the test pattern may be based upon a lines/spaces pattern, wherein periodic structures having a well-defined period and amplitude are adjacent to the lines. A photomask is provided with the test pattern and an image of the pattern is obtained. Edges of the image are determined and, therefrom, a set of edge position data are obtained. Edge position data are fitted to a straight line to determine edge position residuals. An amplitude spectrum is calculated dependent upon spatial frequencies to obtain a amplitude/spatial frequency relationship. A ratio of determined maximum is formed.

Abstract: A method of inspecting a mask or reticle, the mask or reticle being provided with a pattern to be transferred onto a semiconductor wafer, the pattern having a defect, includes the step of creating a plurality of logical zones and uniquely associating each of said logical zones with a surface area of said pattern. Then, an inspection rule representing a characteristic sensitivity for detecting a defect is associated with each of said logical zones. An image of said pattern is then recorded and compared with a reference image of an ideal pattern for locating a defect within said pattern. One of said logical zones is then identified with said located defect and that inspection rule which is associated with said identified logical zone is retrieved from a memory. The inspection rule is then applied to a characteristic of said defect for determining, whether said defect is to be repaired. A signal can be issued in response to said determination.

Abstract: The invention relates to a method for production of contacts on a wafer, preferably with the aid of a lithographic process. The preferred embodiment provides a method which overcomes the disadvantages of the complex point/hole lithography process, and which avoids any increase in the process complexity. This method is achieved in that a strip structure extending over two layers is used to structure the contacts. The strip structure in the first layer is rotated at a predetermined angle with respect to the strip structure in the second layer, and the contacts are formed in the mutually overlapping areas of the strip structures in the two layers.

Abstract: A measuring position for finding a structural element for measuring a characteristic dimension, for instance, the critical dimension CD, which element is about to be formed on a mask, is inserted as second data information into an exchange file containing the circuit layout in a hierarchical configuration of first data information or cells representing the structural elements. To prevent the second data information, which are virtual structural elements, from being incorporated in the control instructions for mask exposure, like the first data information, as structural elements that are to be formed, the second data information does not include an allocation of a geometric shape to the measuring position, or a shape that is allocated thereto has the transparency of the background, so that there is no contrast during the exposure. The second data information can be inserted as allocated to a plane that is not converted into a control instruction.

Abstract: The invention relates to a method for production of contacts on a wafer, preferably with the aid of a lithographic process. The preferred embodiment provides a method which overcomes the disadvantages of the complex point/hole lithography process, and which avoids any increase in the process complexity. This method is achieved in that a strip structure extending over two layers is used to structure the contacts. The strip structure in the first layer is rotated at a predetermined angle with respect to the strip structure in the second layer, and the contacts are formed in the mutually overlapping areas of the strip structures in the two layers.