Abstract: By a non-selective epitaxial growth method, an SiGe film is grown on the whole surface of a silicon oxide film so as to cover an inner wall of a base opening. Here, such film forming conditions are selected that, inside the base opening, a bottom portion is formed of single crystal, other portions such as a sidewall portion are formed of polycrystalline, and a film thickness of the sidewall portion is less than or equal to 1.5 times the film thickness of the bottom portion. In this non-selective epitaxial growth, monosilane, hydrogen, diborane, and germane are used as source gases. Then, flow rates of monosilane and hydrogen are set to 20 sccm and 20 slm respectively. Also, a growth temperature is set to 650° C., a flow rate of diborane is set to 75 sccm, and a flow rate of germane is set to 35 sccm.

Abstract: A production method of a multilayer inductor is provided as one capable of readily producing a multilayer inductor which can achieve satisfactory inductance and de bias characteristics together. In this production method of the multilayer inductor, there occurs interdiffusion of a Ni component in a magnetic layer and a Zn component in a nonmagnetic sheet to form an interdiffusion layer in a region of the nonmagnetic sheet inside a conductive pattern. This method allows the interdiffusion layer to be formed without need for complicated processing of the nonmagnetic sheet. Furthermore, there is no boundary region between the magnetic layer and the nonmagnetic sheet around it, which suppresses occurrence of cracking.

Abstract: A method of stably and correctly evaluating impurities distribution under a gate of a semiconductor device without damaging a silicon substrate is disclosed. According to the evaluation method, a gate electrode made of a silicon containing material is removed without removing a gate insulating film by contacting pyrolysis hydrogen generated by pyrolysis to the semiconductor device that includes the gate electrode arranged on a semiconductor substrate through a gate insulating film, and a source electrode and a drain electrode formed on the semiconductor substrate on corresponding sides of the gate electrode. Further, a processed form of the gate is evaluated by observing a form of the gate insulating film that remains on the semiconductor substrate, the gate insulating film that remains on the semiconductor substrate is removed by a wet process, and the impurities distribution under the gate is measured and evaluated.

Abstract: A method of stably and correctly evaluating impurities distribution under a gate of a semiconductor device without damaging a silicon substrate is disclosed. According to the evaluation method, a gate electrode made of a silicon containing material is removed without removing a gate insulating film by contacting pyrolysis hydrogen generated by pyrolysis to the semiconductor device that includes the gate electrode arranged on a semiconductor substrate through a gate insulating film, and a source electrode and a drain electrode formed on the semiconductor substrate on corresponding sides of the gate electrode. Further, a processed form of the gate is evaluated by observing a form of the gate insulating film that remains on the semiconductor substrate, the gate insulating film that remains on the semiconductor substrate is removed by a wet process, and the impurities distribution under the gate is measured and evaluated.

Abstract: A semiconductor device fabrication method includes the steps of (a) forming a dielectric film on a semiconductor substrate; (b) etching the dielectric film by a dry process; and (c) supplying thermally decomposed atomic hydrogen onto the semiconductor substrate under a prescribed temperature condition, to remove a damaged layer produced in the semiconductor substrate due to the dry process.

Abstract: A method of manufacturing a semiconductor device is provided which comprises: forming a first gate insulating film and a second gate insulating film in an active region of a semiconductor substrate; introducing an impurity of a first conductivity type into a first site where a first body region is to be formed, the first site being disposed under the first gate insulating film in the active region; forming a gate electrode on each of the first gate insulating film and the second gate insulating film; and introducing an impurity of the first conductivity type into the first site and a second site where a second body region is to be formed, the second site being disposed under the second gate insulating film in the active region, to form the first body region and the second body region, respectively.

Abstract: An inner hole 31 to which a driving shaft 2 is inserted is formed in a campiece 3 of a camshaft 1, and a plurality of grooves 34 extending in the insertion direction of the driving shaft 2 are formed in the inner hole 31. The driving shaft 2 is inserted into the inner hole 31 with the cam piece 3 heated to expand the diameter of the inner hole 31. By reducing again the diameter of the inner hole 31 by cooling it in this state, an outer circumferential surface of the driving shaft 2 is pressed and raised by the inner hole 31 and enters the groove 34, by which the cam piece 3 is firmly fixed onto the driving shaft 2.

Abstract: The present invention realizes a heterobipolar transistor using a SiGeC base layer in order to improve its electric characteristics. Specifically, the distribution of carbon and boron within the base layer is controlled so that the concentration of boron is higher than the concentration of carbon on the side bordering on the emitter layer, and upon the formation of the emitter layer, both boron and carbon are dispersed into a portion of the emitter layer that comes into contact with the base layer.

Abstract: By a non-selective epitaxial growth method, an SiGe film is grown on the whole surface of a silicon oxide film so as to cover an inner wall of a base opening. Here, such film forming conditions are selected that, inside the base opening, a bottom portion is formed of single crystal, other portions such as a sidewall portion are formed of polycrystalline, and a film thickness of the sidewall portion is less than or equal to 1.5 times the film thickness of the bottom portion. In this non-selective epitaxial growth, monosilane, hydrogen, diborane, and germane are used as source gases. Then, flow rates of monosilane and hydrogen are set to 20 sccm and 20 slm respectively. Also, a growth temperature is set to 650° C., a flow rate of diborane is set to 75 sccm, and a flow rate of germane is set to 35 sccm.

Abstract: By a non-selective epitaxial growth method, an SiGe film is grown on the whole surface of a silicon oxide film so as to cover an inner wall of a base opening. Here, such film forming conditions are selected that, inside the base opening, a bottom portion is formed of single crystal, other portions such as a sidewall portion are formed of polycrystalline, and a film thickness of the sidewall portion is less than or equal to 1.5 times the film thickness of the bottom portion. In this non-selective epitaxial growth, monosilane, hydrogen, diborane, and germane are used as source gases. Then, flow rates of monosilane and hydrogen are set to 20 sccm and 20 slm respectively. Also, a growth temperature is set to 650° C., a flow rate of diborane is set to 75 sccm, and a flow rate of germane is set to 35 sccm.

Abstract: The present invention realizes a heterobipolar transistor using a SiGeC base layer in order to improve its electric characteristics. Specifically, the distribution of carbon and boron within the base layer is controlled so that the concentration of boron is higher than the concentration of carbon on the side bordering on the emitter layer, and upon the formation of the emitter layer, both boron and carbon are dispersed into a portion of the emitter layer that comes into contact with the base layer.

Abstract: A method of stably and correctly evaluating impurities distribution under a gate of a semiconductor device without damaging a silicon substrate is disclosed. According to the evaluation method, a gate electrode made of a silicon containing material is removed without removing a gate insulating film by contacting pyrolysis hydrogen generated by pyrolysis to the semiconductor device that includes the gate electrode arranged on a semiconductor substrate through a gate insulating film, and a source electrode and a drain electrode formed on the semiconductor substrate on corresponding sides of the gate electrode. Further, a processed form of the gate is evaluated by observing a form of the gate insulating film that remains on the semiconductor substrate, the gate insulating film that remains on the semiconductor substrate is removed by a wet process, and the impurities distribution under the gate is measured and evaluated.

Abstract: A communication parameter delivery server 50b has communication parameters necessary for making each of information terminals 13, 23 and 33 have a dial-up IP connection service. The server 50b delivers the communication parameters via each of networks 12, 22 and 33 responsively to a request from each of the information terminals 13, 23 and 33. The delivered communication terminals are set to Internet connection software installed in each of the information terminal 13, 23 and 33.

Abstract: The present invention realizes a heterobipolar transistor using a SiGeC base layer in order to improve its electric characteristics. Specifically, the distribution of carbon and boron within the base layer is controlled so that the concentration of boron is higher than the concentration of carbon on the side bordering on the emitter layer, and upon the formation of the emitter layer, both boron and carbon are dispersed into a portion of the emitter layer that comes into contact with the base layer.

Abstract: A multilayer inductor has a rectangular parallelepiped element body and its length in the lengthwise direction (L), length in the direction of height (H), and length in the direction of width (W) are L?0.6 mm, H?0.3 mm, and W?0.3 mm, respectively. Terminal electrodes are provided so as to cover the vertices of the element body and come round to the side face from the end faces on both sides. The radius of curvature R of the vertex of the terminal electrode is set to a value being 10% or more and 20% or less of H or W.

Abstract: A multilayer inductor is provided with a coil part including a coiled conductor and lead conductors, an outer sheath part covering the coil part and having an electrical isolation, and external electrodes electrically connected to the respective lead conductors. The lead conductors are located at both ends of the coiled conductor and have a width identical with that of the coiled conductor. The outer sheath part has two first side faces parallel to the axial direction of the coiled conductor and not adjacent to each other, and a second side face intersecting with the axial direction of the coiled conductor. Each external electrode has a first electrode portion formed throughout a direction perpendicular to the axial direction of the coiled conductor on the first side face. Each external electrode is not substantially formed on the second side face.

Abstract: A multilayer inductor is provided with a coil part including a coiled conductor and lead conductors, an outer sheath part covering the coil part and having an electrical isolation, and external electrodes electrically connected to the respective lead conductors. The lead conductors are located at both ends of the coiled conductor and have a width identical with that of the coiled conductor. The outer sheath part has two first side faces parallel to the axial direction of the coiled conductor and not adjacent to each other, and a second side face intersecting with the axial direction of the coiled conductor. Each external electrode has a first electrode portion formed throughout a direction perpendicular to the axial direction of the coiled conductor on the first side face. Each external electrode is not substantially formed on the second side face.

Abstract: A multilayer inductor has a rectangular parallelepiped element body and its length in the lengthwise direction (L), length in the direction of height (H), and length in the direction of width (W) are L?0.6 mm, H?0.3 mm, and W?0.3 mm, respectively Terminal electrodes are provided so as to cover the vertices of the element body and come round to the side face from the end faces on both sides. The radius of curvature R of the vertex of the terminal electrode is set to a value being 10% or more and 20% or less of H or W.

Abstract: A semiconductor device fabrication method includes the steps of (a) forming a dielectric film on a semiconductor substrate; (b) etching the dielectric film by a dry process; and (c) supplying thermally decomposed atomic hydrogen onto the semiconductor substrate under a prescribed temperature condition, to remove a damaged layer produced in the semiconductor substrate due to the dry process.

Abstract: By a non-selective epitaxial growth method, an SiGe film is grown on the whole surface of a silicon oxide film so as to cover an inner wall of a base opening. Here, such film forming conditions are selected that, inside the base opening, a bottom portion is formed of single crystal, other portions such as a sidewall portion are formed of polycrystalline, and a film thickness of the sidewall portion is less than or equal to 1.5 times the film thickness of the bottom portion. In this non-selective epitaxial growth, monosilane, hydrogen, diborane, and germane are used as source gases. Then, flow rates of monosilane and hydrogen are set to 20 sccm and 20 slm respectively. Also, a growth temperature is set to 650° C., a flow rate of diborane is set to 75 sccm, and a flow rate of germane is set to 35 sccm.