Abstract: A non-volatile memory device including a phase-change material, which has a low operating voltage and low power consumption, includes a lower electrode; a phase-change material layer formed on the lower electrode so as to be electrically connected to the lower electrode, wherein the phase-change material layer includes a phase-change material having a composition represented by SnXSbYTeZ or, alternatively with substitutions, in whole or in part, of silicon and/or indium for tin, arsenic and/or bismuth for antimony, and selenium for tellurium; and an upper electrode formed on the phase-change material layer so as to be electrically connected to the phase-change material layer. Here, 0.001?X?0.3, 0.001?Y?0.8, 0.1?Z?0.8, and X+Y+Z=1.

Abstract: An example embodiment relates to a method including forming a bottom electrode and an insulating layer on a substrate, the insulating layer defining a first opening that exposes a portion of the bottom electrode. The method includes forming a variable resistance material pattern, including a plurality of elements, to fill the first opening. The variable resistance material pattern may be doped with a dopant that includes at least one of the plurality of elements in the variable resistance material pattern. The method includes forming a top electrode on the variable resistance material pattern.

Abstract: A method of forming a resistance variable memory device, the method including forming a diode on a semiconductor substrate; forming a lower electrode on the diode; forming a first insulating film on the lower electrode, the first insulating film having an opening; forming a resistance variable film filling the opening such that the resistance variable film includes an amorphous region adjacent to a sidewall of the opening and a crystalline region adjacent to the lower electrode; and forming an upper electrode on the resistance variable film.

Abstract: Provided is a method for fabricating a phase change memory device. The method includes forming a plurality of bottom electrodes on a substrate, forming a first mold layer on the substrate to extend in a first direction where the bottom electrodes are exposed, forming a second mold layer on the substrate, the second mold layer extending in a second direction orthogonal to the first direction to expose parts of the bottom electrodes, forming a phase change material layer on the first and second mold layers to be connected to parts of the bottom electrodes dividing the phase change material layer as a plurality of phase change layers respectively connected to the parts of the bottom electrodes and forming a plurality of top electrodes on the phase change layers.

Abstract: A phase changeable memory cell array region includes a lower interlayer insulating layer disposed on a semiconductor substrate. The region also includes a plurality of conductive plugs disposed through the lower interlayer insulating layer. The region also includes a phase changeable material pattern operably disposed on the lower interlayer insulating layer, the phase changeable pattern covering at least two of the plurality of conductive plugs, wherein the phase changeable material pattern includes a plurality of first regions in contact with one or more of the plurality of conductive plugs and at least one second region interposed between the plurality of the first regions, wherein the at least one second region has a lower thermal conductivity than the plurality of first regions. The phase changeable memory cell array region also includes an upper interlayer insulating layer covering at least one of the phase changeable material pattern and the lower interlayer insulating layer.

Abstract: A semiconductor memory device includes a first electrode and a second electrode, a variable resistance material pattern including a first element disposed between the first and second electrode, and a first spacer including the first element, the first spacer disposed adjacent to the variable resistance material pattern.

Abstract: Provided are a variable resistance memory device and a method of forming the same. The variable resistance memory device may include a substrate, a plurality of bottom electrodes on the substrate, and a first interlayer insulating layer including a trench formed therein. The trench exposes the bottom electrodes and extends in a first direction. The variable resistance memory device further includes a top electrode provided on the first interlayer insulating layer and extending in a second direction crossing the first direction and a plurality of variable resistance patterns provided in the trench and having sidewalls aligned with a sidewall of the top electrode.

Abstract: A probe card and a test apparatus including the probe card for improving test reliability. The probe card may include a first input terminal Microelectromechanical Systems (MEMS) switch that connects a first input terminal and a first input probe pin, wherein the first input terminal MEMS switch comprises a control portion that receives an operation signal and a connection portion that connects the first input terminal and the first input probe pin. The probe card may further include a first output terminal MEMS switch that connects a first output terminal and a first output probe pin, wherein the first output terminal MEMS switch comprises a control portion that receives the operation signal and a connection portion that connects the first output terminal and the first output probe pin.

Abstract: A non-volatile memory device including a phase-change material, which has a low operating voltage and low power consumption, includes a lower electrode; a phase-change material layer formed on the lower electrode so as to be electrically connected to the lower electrode, wherein the phase-change material layer includes a phase-change material having a composition represented by SnXSbYTeZ or, alternatively with substitutions, in whole or in part, of silicon and/or indium for tin, arsenic and/or bismuth for antimony, and selenium for tellurium; and an upper electrode formed on the phase-change material layer so as to be electrically connected to the phase-change material layer. Here, 0.001?X?0.3, 0.001?Y?0.8, 0.1?Z?0.8, and X+Y+Z=1.

Abstract: A non-volatile memory device includes a lower electrode, a phase-change material layer formed on the lower electrode so as to be electrically connected to the lower electrode, and an upper electrode formed on the phase-change material layer so as to be electrically connected to the phase-change material layer. The phase-change material layer includes a phase-change material including a composition represented by the formula (I)A(IIXIIYIVZ)(1-A), where I is at least one of As and Se, II is at least one of Ge, Si and Sn, III is at least one of Sb and Bi, and IV is at least one of Te and Se, and where 0.001?A?0.3, 0.001?X?0.3, 0.001?Y?0.8, 0.1?Z?0.8, and X+Y+Z=1.

Abstract: Provided is a phase-change memory device including a phase-change material pattern of which strips are shared by neighboring cells. The phase-change memory device includes a plurality of bottom electrodes arranged in a matrix array. The phase-change material pattern is formed on the bottom electrodes, and the strips of the phase-change material pattern are electrically connected to the bottom electrodes. Each strip of the phase-change material pattern is connected to at least two diagonally neighboring bottom electrodes of the bottom electrodes.

Abstract: Provided is a resistance variable memory device and a method for operating same. The resistance variable memory device has a phase change material between a top electrode and a bottom electrode. In the method for operating a resistance variable memory, the write current is applied in a direction from the top electrode to the bottom electrode, and the read current is applied in a direction from the bottom electrode to the top electrode. The phase change material is programmed by applying the write current, and a resistance drift of the phase change material is restrained by applying the read current.

Abstract: Phase change memory devices include a heating electrode on a substrate and a phase change material pattern on the heating electrode. An adhesive pattern is disposed between the heating electrode and the phase change material pattern. The adhesive pattern contains carbon. Methods of fabricating phase change memory devices are also provided.

Abstract: Provided is a method of programming a resistance variable memory device. The resistance variable memory device includes a memory cell having multi states and a write driver outputting a program pulse for programming the memory cell into one of the multi states. The method of programming the resistance variable memory device includes applying a first program pulse to the resistance variable memory device and applying a second program pulse to a memory cell when the memory cell is programmed into an intermediate state. When the first program pulse is a reset pulse, the reset pulse is an over program pulse, that is, an over reset pulse. Therefore, the resistance variable memory device can secure a sufficient read margin as well as improve a resistance drift margin.

Abstract: A method of manufacturing a semiconductor device includes forming a phase change material pattern on a top surface of an insulating layer including an opening and in the opening, and forming a compressive layer compressing the phase change material pattern on the phase change material pattern.

Abstract: A phase change memory device and method of manufacturing the same is provided. A first electrode having a first surface is provided on a substrate. A second electrode having a second surface at a different level from the first surface is on the substrate. The second electrode may be spaced apart from the first electrode. A third electrode may be formed corresponding to the first electrode. A fourth electrode may be formed corresponding to the second electrode. A first phase change pattern may be interposed between the first surface and the third electrode. A second phase change pattern may be interposed between the second surface and the fourth electrode. Upper surfaces of the first and second phase change patterns may be on the same plane.

Abstract: A phase-changeable memory device may include a substrate, an insulating layer on the substrate, first and second electrodes, and a pattern of a phase-changeable material between the first and second electrodes. More particularly, the insulating layer may have a hole therein, and the first electrode may be in the hole in the insulating layer. Moreover, portions of the second electrode may extend beyond an edge of the pattern of phase-changeable material. Related methods are also discussed.

Abstract: A method of manufacturing a semiconductor device includes forming a phase change material pattern on a top surface of an insulating layer including an opening and in the opening, and forming a compressive layer compressing the phase change material pattern on the phase change material pattern.

Abstract: A phase changeable memory cell array region includes a lower interlayer insulating layer disposed on a semiconductor substrate. The region also includes a plurality of conductive plugs disposed through the lower interlayer insulating layer. The region also includes a phase changeable material pattern operably disposed on the lower interlayer insulating layer, the phase changeable pattern covering at least two of the plurality of conductive plugs, wherein the phase changeable material pattern includes a plurality of first regions in contact with one or more of the plurality of conductive plugs and at least one second region interposed between the plurality of the first regions, wherein the at least one second region has a lower thermal conductivity than the plurality of first regions. The phase changeable memory cell array region also includes an upper interlayer insulating layer covering at least one of the phase changeable material pattern and the lower interlayer insulating layer.

Abstract: Provided are a phase change memory device and a method of forming the same. According to the phase change memory, a first plug electrode and a second plug electrode are spaced apart from each other in a mold insulating layer. A phase change pattern is disposed on the mold insulating layer. The phase change pattern contacts a top of the first plug electrode and a first potion of a top of the second plug electrode. An interconnection is electrically connected to a second portion of the top of the second plug electrode.