Patents by Inventor Hideki Mizuhara

Hideki Mizuhara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060267189
    Abstract: A circuit device of the present invention includes a first element which is placed parallel to a first reference plane and which senses a physical quantity, and a second element placed parallel to a second reference plane which intersects the first reference plane at a predetermined angle. The circuit device further includes a sealing resin for integrally sealing the first and second elements, a first conductive pattern which is electrically connected to the first element and placed parallel to the first reference plane and which has a back surface exposed from the sealing resin, and a second conductive pattern which is electrically connected to the second element and placed parallel to the second reference plane and which has a back surface exposed from the sealing resin.
    Type: Application
    Filed: May 1, 2006
    Publication date: November 30, 2006
    Inventors: Ryosuke Usui, Hideki Mizuhara, Yasunori Inoue
  • Publication number: 20060252232
    Abstract: A circuit device of preferred embodiments of the present invention includes: a circuit element with electrodes formed in a peripheral part thereof; connecting portions connected to surfaces of the electrodes; and redistribution lines which are continuous to the respective connecting portions and extended in parallel to the main surface of the circuit element. In preferred embodiments of the present invention, the connecting portions and the redistribution lines are integrally formed of one piece of metal. Accordingly, there is no place where different materials are connected in a portion between the connecting portions and the redistribution lines, thus improving a joint reliability of the entire device against a thermal stress or the like.
    Type: Application
    Filed: April 24, 2006
    Publication date: November 9, 2006
    Inventors: Ryosuke Usui, Yasunori Inoue, Hideki Mizuhara
  • Publication number: 20060219432
    Abstract: A circuit device capable of suppressing reduction of reliability resulting from heat generated in a circuit element is obtained. This circuit device comprises a first insulating layer having a first opening and a second opening, a first conductor filling up the first opening of the first insulating layer, a second conductor, formed along the inner side surface of the second opening of the first insulating layer, having a concave upper surface and a circuit element arranged above a region of the first insulating layer formed with the first opening.
    Type: Application
    Filed: March 30, 2006
    Publication date: October 5, 2006
    Inventors: Ryosuke Usui, Hideki Mizuhara, Yasunori Inoue, Katsunori Kobayashi
  • Patent number: 7105384
    Abstract: A circuit device manufacturing method is provided, wherein contaminants attached to the top surfaces of conductive patterns 21 are removed using plasma to thereby improve the adhesion of conductive patterns 21 to a sealing resin 28. By selective etching of a conductive foil 10, separation grooves 11 are formed, thereby forming conductive patterns 21. A semiconductor element 22A and other circuit elements are mounted onto desired locations of conductive patterns 21 and electrically connected with conductive patterns 21. By irradiating plasma onto conductive foil 10 from above, contaminants attached to the surfaces of separation grooves 11 are removed.
    Type: Grant
    Filed: December 1, 2003
    Date of Patent: September 12, 2006
    Assignees: Sanyo Electric Co., Ltd, Kanto Sanyo Semiconductors Co., Ltd.
    Inventors: Ryosuke Usui, Hideki Mizuhara, Yusuke Igarashi, Noriaki Sakamoto
  • Publication number: 20060199371
    Abstract: A semiconductor device includes a substrate and wirings located on the substrate. A passivation film including a first insulating film containing an impurity is located on the wirings. The first insulating film is formed from silicon oxide film materials containing greater than one percent carbon.
    Type: Application
    Filed: May 19, 2006
    Publication date: September 7, 2006
    Applicant: SANYO ELECTRIC CO., LTD.
    Inventors: Hideki Mizuhara, Yasunori Inoue, Hiroyuki Watanabe, Masaki Hirase, Kaori Misawa, Hiroyuki Aoe, Kimihide Saito, Hiroyasu Ishihara
  • Publication number: 20060191894
    Abstract: In a heat radiation structure for an electronic appliance in which heat generated in a heat generating member inside a flap of the electronic appliance is radiated to a space outside the flap, a heat radiation plate integrally formed with a circuit element is thermally coupled to the heat generating member and is exposed outside the flap. Heat generated in the heat generating member is conducted to the heat radiation plate via a contact portion and is radiated to a space outside the flap from an exposed surface along with heat generated in the circuit element.
    Type: Application
    Filed: February 27, 2006
    Publication date: August 31, 2006
    Inventors: Ryosuke Usui, Hideki Mizuhara, Yasunori Inoue, Noriaki Kojima, Hiroyuki Watanabe, Shinya Nakano
  • Publication number: 20060193108
    Abstract: A thin circuit device that can operate at a high speed is provided. The circuit device includes a first circuit element and a circuit element portion formed on a substrate. The first circuit element and the circuit element portion are arranged in such a manner that element surfaces thereof are opposed to each other. A terminal formed on the element surface of the first circuit element and a terminal formed on the element surface of the circuit element portion are electrically connected to each other via conductive particles in a binder forming an anisotropic conductive film and a via. The anisotropic conductive film and a third insulating resin film are bonded by thermocompression bonding in the same step, thereby simplifying manufacturing steps of the circuit device.
    Type: Application
    Filed: February 23, 2006
    Publication date: August 31, 2006
    Inventors: Ryosuke Usui, Hideki Mizuhara, Yasunori Inoue, Makoto Murai
  • Publication number: 20060131746
    Abstract: A circuit device in which highly reliable sealing with a resin can be achieved is provided. A semiconductor chip is provided on one surface of an insulating resin film and a conductive layer that is electrically connected to the semiconductor chip is provided on another surface of the insulating resin film. A solder ball (electrode) for the connection to a circuit board is provided on the conductive layer. An insulating resin layer is further provided between the conductive layer and the circuit board to embed the electrode therein. In this manner, the circuit device is formed. A side face of the semiconductor chip is covered with the insulating resin film.
    Type: Application
    Filed: December 22, 2005
    Publication date: June 22, 2006
    Inventors: Yasuhiro Kohara, Ryosuke Usui, Hideki Mizuhara, Yasunori Inoue
  • Patent number: 7030033
    Abstract: Priorly, semiconductor devices wherein a flexible sheet with a conductive pattern was employed as a supporting substrate, a semiconductor element was mounted thereon, and the ensemble was molded have been developed. In this case, problems occur that a multilayer wiring structure cannot be formed and warping of the insulating resin sheet in the manufacturing process is prominent. In order to solve these problems, a laminated plate 10 in which a thin first conductive film 11 and a thick second conductive film 12 have been laminated via a third conductive film 13 is used.
    Type: Grant
    Filed: September 16, 2003
    Date of Patent: April 18, 2006
    Assignees: Sanyo Electric Co., Ltd., Kanto Sanyo Semiconductors Co., Ltd.
    Inventors: Yusuke Igarashi, Hideki Mizuhara, Noriaki Sakamoto
  • Publication number: 20060032049
    Abstract: A circuit device manufacturing method is provided, wherein the adhesion of an overcoat resin, formed on a conductive wiring layer, to a sealing resin layer is improved by irradiating plasma onto the overcoat resin. A first conductive film 23A and a second conductive film 23B, which are laminated with an interlayer insulating layer 22 interposed in between, are formed. By selectively removing the first conductive film, a first conductive wiring layer 12A is formed and the first conductive wiring layer is covered with an overcoat resin 18. Overcoat resin 18 is irradiated with plasma to roughen its top surface. A sealing resin layer 17 is formed so as to cover the top surface of the roughened overcoat resin 18 and circuit elements 13.
    Type: Application
    Filed: August 19, 2005
    Publication date: February 16, 2006
    Applicant: Sanyo Electric Co. Ltd.
    Inventors: Ryosuke Usui, Hideki Mizuhara, Yusuke Igarashi, Noriaki Sakamoto
  • Patent number: 6989291
    Abstract: Priorly, semiconductor devices wherein a flexible sheet with a conductive pattern was employed as a supporting substrate, a semiconductor element was mounted thereon, and the ensemble was molded have been developed. In this case, problems occur that a multilayer wiring structure cannot be formed and warping of the insulating resin sheet in the manufacturing process is prominent. In order to solve these problems, a laminated plate 10 in which a first conductive film 11 and a second conductive film 12 have been laminated via a third conductive film 13 is used. After forming a conductive pattern layer 11A by etching the first conductive film 11, anchor portions 15 are formed by overetching the third conductive film 13 by use of the conductive pattern layer 11A as a mask, and a sealing resin layer 22 is made to bite into the anchor portions 15 so as to strengthen bonding of the sealing resin layer 22 with the conductive pattern layer 11A.
    Type: Grant
    Filed: September 17, 2003
    Date of Patent: January 24, 2006
    Assignees: Sanyo Electric Co., Ltd., Kanto Sanyo Semiconductor Co., Ltd.
    Inventors: Yusuke Igarashi, Hideki Mizuhara, Noriaki Sakamoto
  • Publication number: 20060012028
    Abstract: A device mounting board on which a device is mounted is provided with a substrate and an insulating film provided on one surface of the substrate. The substrate and the insulating film include glass fiber impregnated with epoxy resin. The epoxy resin impregnation ratio of the glass fiber included in the insulating resin film is higher than that of the glass fiber included in the substrate.
    Type: Application
    Filed: June 7, 2005
    Publication date: January 19, 2006
    Inventors: Ryosuke Usui, Hideki Mizuhara, Yasunori Inoue, Yusuke Igarashi, Takeshi Nakamura
  • Publication number: 20060001166
    Abstract: A circuit device including a multilayer wiring structure having an improved heat radiation performance, and a manufacturing method thereof is provided. A circuit device of the invention includes a first wiring layer and a second wiring layer laminated while interposing a first insulating layer. The first wiring layer is connected to the second wiring layer in a desired position through a connecting portion formed so as to penetrate the first insulating layer. The connecting portion includes a first connecting portion protruding in a thickness direction from the first wiring layer, and a second connecting portion protruding in the thickness direction from the second wiring layer. The first connecting portion and the second connecting portion contact each other at an intermediate portion in the thickness direction of the insulating layer.
    Type: Application
    Filed: June 24, 2005
    Publication date: January 5, 2006
    Inventors: Yusuke Igarashi, Takeshi Nakamura, Yasunori Inoue, Ryosuke Usui, Hideki Mizuhara
  • Publication number: 20050285147
    Abstract: Circuit elements including a plurality of semiconductor devices and passive elements embedded in an insulating resin film are formed on a metal substrate having a surface roughness Ra of 0.3 to 10 ?m. This produces an anchoring effect occurs between the substrate and the insulating film, thereby improving the adhesiveness between the substrate and the insulating resin film.
    Type: Application
    Filed: June 29, 2005
    Publication date: December 29, 2005
    Inventors: Ryosuke Usui, Hideki Mizuhara, Yasunori Inoue
  • Publication number: 20050272252
    Abstract: Provided is a circuit device capable of inhibiting an insulating layer from separating from a substrate. This circuit device comprises a substrate mainly constituted of metal including a first metal layer having a first thermal expansion coefficient, a second metal layer, formed on the first metal layer, having a second thermal expansion coefficient different from the first thermal expansion coefficient of the first metal layer and a third metal layer, formed on the second metal layer, having a third thermal expansion coefficient different from the second thermal expansion coefficient of the second metal layer, an insulating layer formed on the substrate, a conductive layer formed on the insulating layer and a circuit element electrically connected to the conductive layer.
    Type: Application
    Filed: May 27, 2005
    Publication date: December 8, 2005
    Inventors: Ryosuke Usui, Hideki Mizuhara, Yasunori Inoue, Yusuke Igarashi, Takeshi Nakamura
  • Publication number: 20050263911
    Abstract: A circuit device suitable for connecting a plurality of laminated wiring layers to each other through an insulating layer, and a manufacturing method thereof are provided. According to a hybrid integrated circuit device of the present invention and a manufacturing method thereof, a first conductive film is laminated on a first insulating layer, and a first wiring layer is formed by patterning the first conductive film. Next, a second conductive film is laminated on a second insulating layer. Thereafter, by partially removing the second insulating layer and the second conductive film in a desired spot, a connection part for connecting the wiring layers to each other is formed.
    Type: Application
    Filed: May 31, 2005
    Publication date: December 1, 2005
    Inventors: Yusuke Igarashi, Takeshi Nakamura, Yasunori Inoue, Hideki Mizuhara, Ryosuke Usui
  • Publication number: 20050263880
    Abstract: A circuit device having a multilayered wiring structure and an excellent heat dissipation property, and a method of manufacturing the circuit device are provided. In a circuit device, a multilayered wiring structure including a first conductive pattern and a second conductive pattern is formed on a surface of a circuit substrate. A first insulating layer is formed entirely on the surface of the circuit substrate. The first conductive pattern and the second conductive pattern are mutually insulated by a second insulating layer. An amount and grain sizes of filler included in the second insulating layer are smaller than an amount and grain sizes of filler included in the first insulating layer. Therefore, it is easier to connect the above two conductive patterns by way of penetrating the second insulating layer.
    Type: Application
    Filed: May 27, 2005
    Publication date: December 1, 2005
    Inventors: Yusuke Igarashi, Sadamichi Takakusaki, Hideki Mizuhara, Ryosuke Usui
  • Publication number: 20050263905
    Abstract: A method for manufacturing a circuit device, which is suitable for connecting a plurality of laminated wiring layers to each other through an insulating layer, is provided. In a method for manufacturing a hybrid integrated circuit device of the present invention, a first wring layer is formed by laminating a first conductive film on a first insulating layer, and patterning the first conductive film. In the first wiring layer, a first connection part which is protruded in a thickness direction is formed. Moreover, the first wiring layer including the first connection part is covered with a second insulating layer. The second insulating layer is formed of a first resin film and a second resin film. The second resin film contains fewer inorganic fillers than the first resin film. Thus, there is an advantage that a through-hole can be easily formed.
    Type: Application
    Filed: May 25, 2005
    Publication date: December 1, 2005
    Inventors: Ryosuke Usul, Hideki Mizuhara, Yusuke Igarashi, Nobuhisa Takakusaki, Hayato Abe, Takeshi Nakamura
  • Patent number: 6953712
    Abstract: A circuit device manufacturing method is provided, wherein the adhesion of an overcoat resin, formed on a conductive wiring layer, to a sealing resin layer is improved by irradiating plasma onto the overcoat resin. A first conductive film 23A and a second conductive film 23B, which are laminated with an interlayer insulating layer 22 interposed in between, are formed. By selectively removing the first conductive film, a first conductive wiring layer 12A is formed and the first conductive wiring layer is covered with an overcoat resin 18. Overcoat resin 18 is irradiated with plasma to roughen its top surface. A sealing resin layer 17 is formed so as to cover the top surface of the roughened overcoat resin 18 and circuit elements 13.
    Type: Grant
    Filed: December 1, 2003
    Date of Patent: October 11, 2005
    Assignees: Sanyo Electric Co., Ltd., Kanto Sanyo Semiconductors Co., Ltd.
    Inventors: Ryosuke Usui, Hideki Mizuhara, Yusuke Igarashi, Noriaki Sakamoto
  • Publication number: 20050218480
    Abstract: The device mounting board according to the first embodiment has the structure in which an dielectric resin film and a photoimageable solder resist film are sequentially laminated on an upper surface of a base material. The device mounting board also has the structure in which the dielectric resin film and the photoimageable solder resist film are sequentially laminated on a lower surface of the base material. The photoimageable solder resist film contains the cardo type polymer.
    Type: Application
    Filed: March 23, 2005
    Publication date: October 6, 2005
    Inventors: Ryosuke Usui, Takeshi Nakamura, Hideki Mizuhara