Patents by Inventor Hideki Sugiyama

Hideki Sugiyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11961909
    Abstract: Semiconductor device includes a well region formed in an active region of a semiconductor substrate, a gate electrode formed on the well region via a gate dielectric film, and a source region and a drain region formed in the well region. At the vicinity of both end portions of the active region in the first direction, a first region and a second region having the same conductivity type as the well region and having impurity concentration higher than that of the well region are formed in the well region. The first region and the second region are spaced from each other in a second direction perpendicular to the first direction, and at least a portion of each of them is located under the gate electrode. The first region and the second region are not formed at the center portion of the active region in the first direction.
    Type: Grant
    Filed: March 3, 2022
    Date of Patent: April 16, 2024
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventor: Hideki Sugiyama
  • Patent number: 11955256
    Abstract: A signal transmission cable is provided with a conductor, an insulator covering around the conductor, a shield layer covering around the insulator, a sheath covering around the shield layer, and a plating base layer is provided between the insulator and the shield layer to cover around the insulator. The shield layer has a plating layer provided to cover the plating base layer to be in contact with an outer peripheral surface of the plating base layer. A surface roughness of an outer peripheral surface of the plating layer is less than a surface roughness of an inner peripheral surface of the plating layer.
    Type: Grant
    Filed: July 7, 2022
    Date of Patent: April 9, 2024
    Assignee: PROTERIAL, LTD.
    Inventors: Hideyuki Sagawa, Detian Huang, Takahiro Sugiyama, Hideki Nonen, Masashi Arai, Hiroshi Ishikawa, Xinweilong Li
  • Publication number: 20240105563
    Abstract: A semiconductor device includes a nitride semiconductor element, a first diode, and a second diode; the nitride semiconductor element includes a conductive mounting bed, a semiconductor substrate formed on the mounting bed, a first nitride semiconductor layer, a second nitride semiconductor layer, a first major electrode, a second major electrode, a first gate electrode, and a second gate electrode; the first diode includes a first anode electrode electrically connected to the mounting bed, and a first cathode electrode electrically connected to the first major electrode; and the second diode includes a second anode electrode electrically connected to the mounting bed, and a second cathode electrode electrically connected to the second major electrode.
    Type: Application
    Filed: March 9, 2023
    Publication date: March 28, 2024
    Inventors: Toru SUGIYAMA, Akira YOSHIOKA, Hitoshi KOBAYASHI, Hung HUNG, Yasuhiro ISOBE, Hideki SEKIGUCHI, Tetsuya OHNO, Masaaki ONOMURA
  • Publication number: 20240105826
    Abstract: A semiconductor device of an embodiment includes a semiconductor layer, a first insulating film provided on the semiconductor layer, a first electrode film provided on the first insulating film, a second electrode film provided on the first electrode film, and a first field plate electrode provided on the second electrode film. A lower end of the first field plate electrode is located on a second surface of the first electrode film, the second surface being in contact with the second electrode film, rather than a first surface of the first electrode film, the first surface being in contact with the first insulating film.
    Type: Application
    Filed: March 1, 2023
    Publication date: March 28, 2024
    Inventors: Hitoshi KOBAYASHI, Masaaki ONOMURA, Toru SUGIYAMA, Akira YOSHIOKA, Hung HUNG, Hideki SEKIGUCHI, Tetsuya OHNO, Yasuhiro ISOBE
  • Patent number: 11943233
    Abstract: An electronic control unit is connected to a network in an in-vehicle network system. The electronic control unit includes a first control circuit and a second control circuit. The first control circuit is connected to the network via the second control circuit. The second control circuit performs a first determination process on a frame to determine conformity of the frame with a first rule. Upon determining that the frame conforms to the first rule, the second control circuit transmits the frame to the first control circuit. The first control circuit performs a second determination process on the frame to determine conformity of the frame with a second rule. The second rule is different from the first rule.
    Type: Grant
    Filed: December 22, 2021
    Date of Patent: March 26, 2024
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Yoshihiro Ujiie, Jun Anzai, Yoshihiko Kitamura, Masato Tanabe, Hideki Matsushima, Tomoyuki Haga, Takeshi Kishikawa, Ryota Sugiyama
  • Publication number: 20240097671
    Abstract: A semiconductor device includes a first transistor, a first drive circuit including a second transistor, and a second drive circuit including a third transistor. The second transistor and the third transistor are connected in series; and a connection node of the second and third transistors is connected to a gate electrode of the first transistor. The first transistor, the second transistor, and the third transistor are normally-off MOS HEMTs formed in a first substrate that includes GaN. The first drive circuit charges a parasitic capacitance of the first transistor. The second drive circuit discharges the parasitic capacitance of the first transistor.
    Type: Application
    Filed: February 10, 2023
    Publication date: March 21, 2024
    Inventors: Toru SUGIYAMA, Noriaki YOSHIKAWA, Yasuhiko KURIYAMA, Akira YOSHIOKA, Hitoshi KOBAYASHI, Hung HUNG, Yasuhiro ISOBE, Tetsuya OHNO, Hideki SEKIGUCHI, Masaaki ONOMURA
  • Publication number: 20230282745
    Abstract: Semiconductor device includes a well region formed in an active region of a semiconductor substrate, a gate electrode formed on the well region via a gate dielectric film, and a source region and a drain region formed in the well region. At the vicinity of both end portions of the active region in the first direction, a first region and a second region having the same conductivity type as the well region and having impurity concentration higher than that of the well region are formed in the well region. The first region and the second region are spaced from each other in a second direction perpendicular to the first direction, and at least a portion of each of them is located under the gate electrode. The first region and the second region are not formed at the center portion of the active region in the first direction.
    Type: Application
    Filed: March 3, 2022
    Publication date: September 7, 2023
    Inventor: Hideki SUGIYAMA
  • Publication number: 20230268164
    Abstract: There is provided a substrate processing apparatus including: a processing chamber; a substrate support that is disposed in the processing chamber and holds a substrate; and a shower head facing the substrate support, the shower head including a shower plate formed with a gas flow path through which a gas is discharged, and a cooling plate holding and cooling the shower plate, and the cooling plate including a first plate having a gas distribution layer through which the gas is distributed, a second plate having a coolant passage through which a coolant is supplied and a gas diffusion space into which the gas distributed by the gas distribution layer is supplied, and a fastening member fastening the first plate and the second plate.
    Type: Application
    Filed: February 24, 2023
    Publication date: August 24, 2023
    Applicant: Tokyo Electron Limited
    Inventors: Hideki SUGIYAMA, Shojiro YAHATA, Shinya YAMANAKA
  • Publication number: 20230260757
    Abstract: A plasma processing apparatus includes a plasma processing chamber, a substrate support provided inside the plasma processing chamber and configured to hold a substrate, and a shower head facing the substrate support, wherein the shower head includes a shower plate formed with a gas flow path for discharging a gas, the shower plate includes a base member having a recessed portion, and an embedded member inserted into the recessed portion and bonded to the recessed portion, and the gas flow path includes a first flow path formed in the base member and communicating with the recessed portion, a second flow path formed in the embedded member, and a communication path formed in at least one of the base member and the embedded member and communicating the first flow path and the second flow path.
    Type: Application
    Filed: February 14, 2023
    Publication date: August 17, 2023
    Applicant: Tokyo Electron Limited
    Inventors: Hideki SUGIYAMA, Hiroshi IKARI, Nobuyuki NAGAYAMA
  • Publication number: 20210020408
    Abstract: There is provision of a substrate support assembly including an edge ring, a substrate support, and a thermal conductivity adjuster. The substrate support has a central portion that supports a substrate, and an outer peripheral portion that supports the edge ring arranged around the substrate. The thermal conductivity adjuster is in contact with a part of the edge ring in a circumferential direction, and a thermal conductivity of the thermal conductivity adjuster is different from a thermal conductivity of the edge ring.
    Type: Application
    Filed: July 10, 2020
    Publication date: January 21, 2021
    Inventors: Hideki SUGIYAMA, Shunsuke KANEKO, Akihiro OGASAWARA
  • Patent number: 10051154
    Abstract: When a request for a service is made from a Web browser to a Web application, the Web application requests the service from a service provider of an MFP in accordance with the request. The service provider obtains a destination URL from the Web browser, and compares the destination URL with the URL of a service host written in a manifest file of a cooperation permission application. If those URLs match, the service provision is permitted.
    Type: Grant
    Filed: December 21, 2016
    Date of Patent: August 14, 2018
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hideki Sugiyama, Fumitoshi Ito, Masayuki Sato, Satoki Watariuchi
  • Patent number: 10002768
    Abstract: In a semiconductor device, a memory cell is formed of a control gate electrode and a memory gate electrode adjacent to each other, a gate insulating film formed below the control gate electrode and an insulating film formed below the memory gate electrode and having a charge accumulating part therein. Also, in this semiconductor device, a capacitive element is formed of a lower electrode, an upper electrode and a capacitive insulating film formed between the upper electrode and the lower electrode. A thickness of the lower electrode is smaller than a thickness of the control gate electrode.
    Type: Grant
    Filed: October 27, 2017
    Date of Patent: June 19, 2018
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Kentaro Saito, Hideki Sugiyama, Hiraku Chakihara, Yoshiyuki Kawashima
  • Publication number: 20180053658
    Abstract: In a semiconductor device, a memory cell is formed of a control gate electrode and a memory gate electrode adjacent to each other, a gate insulating film formed below the control gate electrode and an insulating film formed below the memory gate electrode and having a charge accumulating part therein. Also, in this semiconductor device, a capacitive element is formed of a lower electrode, an upper electrode and a capacitive insulating film formed between the upper electrode and the lower electrode. A thickness of the lower electrode is smaller than a thickness of the control gate electrode.
    Type: Application
    Filed: October 27, 2017
    Publication date: February 22, 2018
    Inventors: Kentaro SAITO, Hideki SUGIYAMA, Hiraku CHAKIHARA, Yoshiyuki KAWASHIMA
  • Patent number: 9831093
    Abstract: In a semiconductor device, a memory cell is formed of a control gate electrode and a memory gate electrode adjacent to each other, a gate insulating film formed below the control gate electrode and an insulating film formed below the memory gate electrode and having a charge accumulating part therein. Also, in this semiconductor device, a capacitive element is formed of a lower electrode, an upper electrode and a capacitive insulating film formed between the upper electrode and the lower electrode. A thickness of the lower electrode is smaller than a thickness of the control gate electrode.
    Type: Grant
    Filed: August 14, 2016
    Date of Patent: November 28, 2017
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Kentaro Saito, Hideki Sugiyama, Hiraku Chakihara, Yoshiyuki Kawashima
  • Publication number: 20170201651
    Abstract: When a request for a service is made from a Web browser to a Web application, the Web application requests the service from a service provider of an MFP in accordance with the request. The service provider obtains a destination URL from the Web browser, and compares the destination URL with the URL of a service host written in a manifest file of a cooperation permission application. If those URLs match, the service provision is permitted.
    Type: Application
    Filed: December 21, 2016
    Publication date: July 13, 2017
    Inventors: Hideki Sugiyama, Fumitoshi Ito, Masayuki Sato, Satoki Watariuchi
  • Patent number: 9699345
    Abstract: A processing apparatus capable of registering applications which periodically execute processes manages one of a plurality of applications registered with the processing apparatus, as a reference application. When registering a new application, the processing apparatus sets an execution cycle of the new application based on an execution cycle of the reference application if the execution cycle of the new application is modifiable, but changes the reference application to be managed to the new application if the execution cycle of the new application is not modifiable.
    Type: Grant
    Filed: June 11, 2015
    Date of Patent: July 4, 2017
    Assignee: Canon Kabushiki Kaisha
    Inventor: Hideki Sugiyama
  • Publication number: 20170053922
    Abstract: In a semiconductor device, a memory cell is formed of a control gate electrode and a memory gate electrode adjacent to each other, a gate insulating film formed below the control gate electrode and an insulating film formed below the memory gate electrode and having a charge accumulating part therein. Also, in this semiconductor device, a capacitive element is formed of a lower electrode, an upper electrode and a capacitive insulating film formed between the upper electrode and the lower electrode. A thickness of the lower electrode is smaller than a thickness of the control gate electrode.
    Type: Application
    Filed: August 14, 2016
    Publication date: February 23, 2017
    Inventors: Kentaro SAITO, Hideki SUGIYAMA, Hiraku CHAKIHARA, Yoshiyuki KAWASHIMA
  • Patent number: 9516185
    Abstract: A first application installed on a multifunction peripheral (MFP) request a network communication unit to check a second application installed on the MFP to use an external service. The first application controls, according to a result of checking of the second application, registration processing for registering function information (intent element) used to cooperate with the external service by a relay function using a mechanism of Web Intents, or invocation processing by the relay function for invoking the external service using the registered function information.
    Type: Grant
    Filed: June 3, 2015
    Date of Patent: December 6, 2016
    Assignee: Canon Kabushiki Kaisha
    Inventor: Hideki Sugiyama
  • Publication number: 20150373221
    Abstract: A processing apparatus capable of registering applications which periodically execute processes manages one of a plurality of applications registered with the processing apparatus, as a reference application. When registering a new application, the processing apparatus sets an execution cycle of the new application based on an execution cycle of the reference application if the execution cycle of the new application is modifiable, but changes the reference application to be managed to the new application if the execution cycle of the new application is not modifiable.
    Type: Application
    Filed: June 11, 2015
    Publication date: December 24, 2015
    Inventor: Hideki Sugiyama
  • Publication number: 20150358487
    Abstract: A first application installed on a multifunction peripheral (MFP) request a network communication unit to check a second application installed on the MFP to use an external service. The first application controls, according to a result of checking of the second application, registration processing for registering function information (intent element) used to cooperate with the external service by a relay function using a mechanism of Web Intents, or invocation processing by the relay function for invoking the external service using the registered function information.
    Type: Application
    Filed: June 3, 2015
    Publication date: December 10, 2015
    Inventor: Hideki Sugiyama