Patents by Inventor Hideki Yoshida
Hideki Yoshida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20250147691Abstract: According to one embodiment, a memory system includes a nonvolatile memory and a controller. The controller acquires, from a host, write data having the same first size as a data write unit of the nonvolatile memory and obtained by dividing write data associated with one write command having a first identifier indicating a first write destination block in a plurality of write destination blocks into a plurality of write data or combining write data associated with two or more write commands having the first identifier. The controller writes the acquired write data having the first size to the first write destination block by a first write operation.Type: ApplicationFiled: January 9, 2025Publication date: May 8, 2025Applicant: KIOXIA CORPORATIONInventors: Shinichi KANNO, Hideki YOSHIDA, Naoki ESAKA, Hiroshi NISHIMURA
-
Publication number: 20250068354Abstract: A controller manages a plurality of block groups each including one or more blocks among a plurality of blocks provided in a non-volatile memory. The controller assigns one of the plurality of block groups to each of plurality of zones. The controller writes write data which is to be written to a first zone to a shared write buffer and writes write data which is to be written to a second zone to the shared write buffer. When a total size of the write data in the first zone stored in the shared write buffer reaches a capacity of the first zone, the controller copies the write data in the first zone stored in the shared write buffer to the first block group assigned to the first zone.Type: ApplicationFiled: November 6, 2024Publication date: February 27, 2025Applicant: Kioxia CorporationInventors: Hideki YOSHIDA, Shinichi KANNO, Naoki ESAKA
-
Patent number: 12229441Abstract: According to one embodiment, a memory system includes a nonvolatile memory and a controller. The controller acquires, from a host, write data having the same first size as a data write unit of the nonvolatile memory and obtained by dividing write data associated with one write command having a first identifier indicating a first write destination block in a plurality of write destination blocks into a plurality of write data or combining write data associated with two or more write commands having the first identifier. The controller writes the acquired write data having the first size to the first write destination block by a first write operation.Type: GrantFiled: November 1, 2023Date of Patent: February 18, 2025Assignee: KIOXIA CORPORATIONInventors: Shinichi Kanno, Hideki Yoshida, Naoki Esaka, Hiroshi Nishimura
-
Publication number: 20250045202Abstract: According to one embodiment, a memory system determine both of a first block to which data from a host is to be written and a first location of the first block, when receiving a write request to designate a first logical address from the host. The memory system writes the data from the host to the first location of the first block. The memory system notifies the host of the first logical address, a first block number designating the first block, and a first in-block offset indicating an offset from a leading part of the first block to the first location by a multiple of grain having a size different from a page size.Type: ApplicationFiled: October 24, 2024Publication date: February 6, 2025Applicant: Kioxia CorporationInventors: Shinichi KANNO, Hideki YOSHIDA
-
Publication number: 20250036283Abstract: According to one embodiment, when receiving a write request to designate a first block number and a first logical address from a host, a memory system determines a first location in a first block having the first block number, to which data from the host is to be written, and writes the data from the host to the first location of the first block. The memory system updates a first address translation table managing mapping between logical addresses and in-block physical addresses of the first block, and maps a first in-block physical address indicative of the first location to the first logical address.Type: ApplicationFiled: October 10, 2024Publication date: January 30, 2025Applicant: Kioxia CorporationInventors: Hideki YOSHIDA, Shinichi KANNO
-
Publication number: 20250021224Abstract: According to one embodiment, a memory system includes a nonvolatile memory and a controller which controls the nonvolatile memory. The controller notifies to an outside an extensive signal which indicates a predetermined state of the nonvolatile memory or the controller.Type: ApplicationFiled: September 25, 2024Publication date: January 16, 2025Applicant: Kioxia CorporationInventors: Shinichi KANNO, Hiroshi NISHIMURA, Hideki YOSHIDA, Hiroshi MURAYAMA
-
Publication number: 20250013385Abstract: According to one embodiment, a memory system receives from a host a first write request including a first block identifier designating a first write destination block to which first write data is to be written. The memory system acquires the first write data from a write buffer temporarily holding write data corresponding to each of the write requests, and writes the first write data to a write destination page in the first write destination block. The memory system releases a region in the write buffer, storing data which is made readable from the first write destination block by writing the first write data to the write destination page. The data made readable is a data of a page in the first write destination block preceding the write destination page.Type: ApplicationFiled: September 23, 2024Publication date: January 9, 2025Applicant: KIOXIA CORPORATIONInventors: Shinichi KANNO, Hideki YOSHIDA, Naoki ESAKA
-
Patent number: 12175121Abstract: A controller manages a plurality of block groups each including one or more blocks among a plurality of blocks provided in a non-volatile memory. The controller assigns one of the plurality of block groups to each of plurality of zones. The controller writes write data which is to be written to a first zone to a shared write buffer and writes write data which is to be written to a second zone to the shared write buffer. When a total size of the write data in the first zone stored in the shared write buffer reaches a capacity of the first zone, the controller copies the write data in the first zone stored in the shared write buffer to the first block group assigned to the first zone.Type: GrantFiled: August 4, 2023Date of Patent: December 24, 2024Assignee: KIOXIA CORPORATIONInventors: Hideki Yoshida, Shinichi Kanno, Naoki Esaka
-
Patent number: 12153516Abstract: According to one embodiment, a memory system determine both of a first block to which data from a host is to be written and a first location of the first block, when receiving a write request to designate a first logical address from the host. The memory system writes the data from the host to the first location of the first block. The memory system notifies the host of the first logical address, a first block number designating the first block, and a first in-block offset indicating an offset from a leading part of the first block to the first location by a multiple of grain having a size different from a page size.Type: GrantFiled: September 13, 2023Date of Patent: November 26, 2024Assignee: Kioxia CorporationInventors: Shinichi Kanno, Hideki Yoshida
-
Patent number: 12147673Abstract: According to one embodiment, when receiving a write request to designate a first block number and a first logical address from a host, a memory system determines a first location in a first block having the first block number, to which data from the host is to be written, and writes the data from the host to the first location of the first block. The memory system updates a first address translation table managing mapping between logical addresses and in-block physical addresses of the first block, and maps a first in-block physical address indicative of the first location to the first logical address.Type: GrantFiled: June 5, 2023Date of Patent: November 19, 2024Assignee: Kioxia CorporationInventors: Hideki Yoshida, Shinichi Kanno
-
Publication number: 20240362162Abstract: According to one embodiment, a memory system includes a nonvolatile memory including plural blocks each including plural pages, and a controller. When receiving a write request designating a first logical address and a first block number from the host, the controller determines a first location in a first block having the first block number to which data from the host should be written, and writes the data from the host to the first location in the first block. The controller notifies the host of either an in-block physical address indicative of the first location, or a group of the first logical address, the first block number and the first in-block physical address.Type: ApplicationFiled: July 10, 2024Publication date: October 31, 2024Applicant: Kioxia CorporationInventors: Hideki YOSHIDA, Shinichi KANNO
-
Patent number: 12131024Abstract: A memory system including: a nonvolatile memory; first and second decoders configured to execute first and second error correction for correcting data read from the nonvolatile memory; and a controller configured to receive a first command issued by a host device, the first command being a command that requests neither reading nor writing data from or to the nonvolatile memory and that includes information indicative of acceptable latency of error correction, in response to receiving the first command, select one of the first decoder and the second decoder based on the received first command, and after receiving the first command, output data read from the nonvolatile memory through the selected one of the first decoder and the second decoder to the host device.Type: GrantFiled: June 1, 2023Date of Patent: October 29, 2024Assignee: Kioxia CorporationInventors: Shinichi Kanno, Hiroshi Nishimura, Hideki Yoshida, Hiroshi Murayama
-
Patent number: 12124735Abstract: According to one embodiment, a memory system receives from a host a first write request including a first block identifier designating a first write destination block to which first write data is to be written. The memory system acquires the first write data from a write buffer temporarily holding write data corresponding to each of the write requests, and writes the first write data to a write destination page in the first write destination block. The memory system releases a region in the write buffer, storing data which is made readable from the first write destination block by writing the first write data to the write destination page. The data made readable is a data of a page in the first write destination block preceding the write destination page.Type: GrantFiled: June 13, 2023Date of Patent: October 22, 2024Assignee: KIOXIA CORPORATIONInventors: Shinichi Kanno, Hideki Yoshida, Naoki Esaka
-
Publication number: 20240304788Abstract: Provided is a carbon material having a large specific surface area and good filling properties. The carbon material has a circularity of more than 0.83 and a specific surface area of not less than 400 m2/g. The carbon material is produced by a production method includes: providing a suspension containing first carbon particles having a specific surface area of not less than 50 m2/g, a water-soluble binder, and water; obtaining granular bodies from the suspension; and subjecting the granular bodies to heat treatment to obtain second carbon particles.Type: ApplicationFiled: February 17, 2022Publication date: September 12, 2024Applicant: NICHIA CORPORATIONInventors: Takashi SUGIMOTO, Hideki YOSHIDA
-
Patent number: 12067298Abstract: A memory system includes a nonvolatile memory including memory dies, and a controller. The controller is configured to create a first virtual storage with a first part of the memory dies and a second virtual storage with a second part of the memory dies, and create a redundant logical domain spanning one or more memory dies corresponding to the first virtual storage and one or more memory dies corresponding to the second virtual storage. The memory controller is configured to, in response to a write command, store write data corresponding to the write command in a first region of the first virtual storage and in a second region of the second virtual storage, and return to the host a response including a first physical address of the first region and a second physical address of the second region.Type: GrantFiled: August 29, 2022Date of Patent: August 20, 2024Assignee: Kioxia CorporationInventors: Hideki Yoshida, Shinichi Kanno
-
Patent number: 12066931Abstract: According to one embodiment, a memory system includes a nonvolatile memory including plural blocks each including plural pages, and a controller. When receiving a write request designating a first logical address and a first block number from the host, the controller determines a first location in a first block having the first block number to which data from the host should be written, and writes the data from the host to the first location in the first block. The controller notifies the host of either an in-block physical address indicative of the first location, or a group of the first logical address, the first block number and the first in-block physical address.Type: GrantFiled: June 28, 2023Date of Patent: August 20, 2024Assignee: Kioxia CorporationInventors: Hideki Yoshida, Shinichi Kanno
-
Publication number: 20240270932Abstract: A method of producing a modified fibrous wollastonite is provided. The method includes hydrothermally treating a fibrous wollastonite.Type: ApplicationFiled: April 23, 2024Publication date: August 15, 2024Applicant: NICHIA CORPORATIONInventors: Hideki YOSHIDA, Hirofumi OOGURI, Yuji AKAZAWA
-
Publication number: 20240256184Abstract: According to one embodiment, a memory system receives, from a host, a write request including a first identifier associated with one write destination block and storage location information indicating a location in a write buffer on a memory of the host in which first data to be written is stored. When the first data is to be written to a nonvolatile memory, the memory system obtains the first data from the write buffer by transmitting a transfer request including the storage location information to the host, transfers the first data to the nonvolatile memory, and writes the first data to the one write destination block.Type: ApplicationFiled: February 29, 2024Publication date: August 1, 2024Inventors: Shinichi KANNO, Hideki Yoshida
-
Publication number: 20240202135Abstract: According to one embodiment, when a read request received from a host includes a first identifier indicative of a first region, a memory system obtains a logical address from the received read request, obtains a physical address corresponding to the obtained logical address from a logical-to-physical address translation table which manages mapping between logical addresses and physical addresses of the first region, and reads data from the first region, based on the obtained physical address. When the received read request includes a second identifier indicative of a second region, the memory system obtains physical address information from the read request, and reads data from the second region, based on the obtained physical address information.Type: ApplicationFiled: March 1, 2024Publication date: June 20, 2024Inventors: Hideki Yoshida, Shinichi Kanno
-
Patent number: 11993696Abstract: A method of producing a modified fibrous wollastonite is provided. The method includes hydrothermally treating a fibrous wollastonite.Type: GrantFiled: May 24, 2018Date of Patent: May 28, 2024Assignee: NICHIA CORPORATIONInventors: Hideki Yoshida, Hirofumi Ooguri, Yuji Akazawa