Patents by Inventor Hideki Yoshida

Hideki Yoshida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12675235
    Abstract: According to one embodiment, a memory system receives from a host a first write request including a first block identifier designating a first write destination block to which first write data is to be written. The memory system acquires the first write data from a write buffer temporarily holding write data corresponding to each of the write requests, and writes the first write data to a write destination page in the first write destination block. The memory system releases a region in the write buffer, storing data which is made readable from the first write destination block by writing the first write data to the write destination page. The data made readable is a data of a page in the first write destination block preceding the write destination page.
    Type: Grant
    Filed: September 23, 2024
    Date of Patent: July 7, 2026
    Assignee: KIOXIA CORPORATION
    Inventors: Shinichi Kanno, Hideki Yoshida, Naoki Esaka
  • Patent number: 12638970
    Abstract: According to one embodiment, when receiving a write request to designate a first block number and a first logical address from a host, a memory system determines a first location in a first block having the first block number, to which data from the host is to be written, and writes the data from the host to the first location of the first block. The memory system updates a first address translation table managing mapping between logical addresses and in-block physical addresses of the first block, and maps a first in-block physical address indicative of the first location to the first logical address.
    Type: Grant
    Filed: October 10, 2024
    Date of Patent: May 26, 2026
    Assignee: Kioxia Corporation
    Inventors: Hideki Yoshida, Shinichi Kanno
  • Publication number: 20260072826
    Abstract: According to one embodiment, a memory system. includes a nonvolatile memory including plural blocks each including plural pages, and a controller. When receiving a write request designating a first logical address and a first block number from the host, the controller determines a first location in a first block having the first block number to which data from the host should be written, and writes the data from the host to the first location in the first block. The controller notifies the host of either an in-block physical address indicative of the first location, or a group of the first logical address, the first block number and the first in-block physical address.
    Type: Application
    Filed: September 15, 2025
    Publication date: March 12, 2026
    Applicant: Kioxia Corporation
    Inventors: Hideki YOSHIDA, Shinichi KANNO
  • Patent number: 12535969
    Abstract: According to one embodiment, a memory system receives, from a host, a write request including a first identifier associated with one write destination block and storage location information indicating a location in a write buffer on a memory of the host in which first data to be written is stored. When the first data is to be written to a nonvolatile memory, the memory system obtains the first data from the write buffer by transmitting a transfer request including the storage location information to the host, transfers the first data to the nonvolatile memory, and writes the first data to the one write destination block.
    Type: Grant
    Filed: February 29, 2024
    Date of Patent: January 27, 2026
    Assignee: Kioxia Corporation
    Inventors: Shinichi Kanno, Hideki Yoshida
  • Patent number: 12530294
    Abstract: According to one embodiment, a processor of a cache server delivers content acquired from an origin server to a client, using a storage device as a cache of the contents. When an error occurs in reading the content from the storage device, the processor determines whether or not to recover the content based on a recovery amount of a delivery capability of the cache server as a result of recovering the content and a cost of writing data to the storage device associated with recovery of the content. When determined to recover the content, the processor selects a content recovery method based on a first remaining retention period during which the content should be retained and a second remaining retention period until the content is to be erased from the storage device.
    Type: Grant
    Filed: September 10, 2024
    Date of Patent: January 20, 2026
    Assignee: Kioxia Corporation
    Inventors: Kohei Okuda, Shinichi Kanno, Tatsuki Izumi, Toru Watabe, Hideki Yoshida
  • Publication number: 20250388467
    Abstract: A method of manufacturing hexagonal boron nitride fibers includes: providing amorphous fibrous boron nitride; performing heat treatment on the amorphous fibrous boron nitride at a first temperature of 500° C. or greater and less than 900° C. in an oxygen-containing atmosphere to obtain a first heat-treated product; and performing heat treatment on the first heat-treated product at a second temperature in a range of 1000° C. to 1800° C. in a nitrogen-containing atmosphere to obtain a second heat-treated product containing hexagonal boron nitride.
    Type: Application
    Filed: August 25, 2025
    Publication date: December 25, 2025
    Applicant: NICHIA CORPORATION
    Inventor: Hideki YOSHIDA
  • Patent number: 12449248
    Abstract: A wall thinning detection system includes a polarized magnetic charge distribution computing unit configured to compute a spatial distribution of polarized magnetic charges, which is an aggregate of a plurality of magnetic dipoles in a monitoring area, based on a magnetic field distribution in the monitoring area of a metal instrument measured by a magnetic field sensor array comprising a plurality of magnetic field sensors, and a wall thinning distribution computing unit configured to compute a wall thinning distribution in the monitoring area based on the spatial distribution of the polarized magnetic charges calculated by the polarized magnetic charge distribution computing unit.
    Type: Grant
    Filed: March 7, 2022
    Date of Patent: October 21, 2025
    Assignee: YOKOGAWA ELECTRIC CORPORATION
    Inventor: Hideki Yoshida
  • Patent number: 12443524
    Abstract: According to one embodiment, a memory system includes a nonvolatile memory including plural blocks each including plural pages, and a controller. When receiving a write request designating a first logical address and a first block number from the host, the controller determines a first location in a first block having the first block number to which data from the host should be written, and writes the data from the host to the first location in the first block. The controller notifies the host of either an in-block physical address indicative of the first location, or a group of the first logical address, the first block number and the first in-block physical address.
    Type: Grant
    Filed: July 10, 2024
    Date of Patent: October 14, 2025
    Assignee: Kioxia Corporation
    Inventors: Hideki Yoshida, Shinichi Kanno
  • Patent number: 12428538
    Abstract: A method of producing a modified fibrous wollastonite is provided. The method includes hydrothermally treating a fibrous wollastonite.
    Type: Grant
    Filed: April 23, 2024
    Date of Patent: September 30, 2025
    Assignee: NICHIA CORPORATION
    Inventors: Hideki Yoshida, Hirofumi Ooguri, Yuji Akazawa
  • Patent number: 12421113
    Abstract: A method of manufacturing hexagonal boron nitride fibers includes: providing amorphous fibrous boron nitride; performing heat treatment on the amorphous fibrous boron nitride at a first temperature of 500° C. or greater and less than 900° C. in an oxygen-containing atmosphere to obtain a first heat-treated product; and performing heat treatment on the first heat-treated product at a second temperature in a range of 1000° C. to 1800° C. in a nitrogen-containing atmosphere to obtain a second heat-treated product containing hexagonal boron nitride.
    Type: Grant
    Filed: March 25, 2020
    Date of Patent: September 23, 2025
    Assignee: NICHIA CORPORATION
    Inventor: Hideki Yoshida
  • Publication number: 20250278363
    Abstract: According to one embodiment, a processor of a cache server delivers content acquired from an origin server to a client, using a storage device as a cache of the contents. When an error occurs in reading the content from the storage device, the processor determines whether or not to recover the content based on a recovery amount of a delivery capability of the cache server as a result of recovering the content and a cost of writing data to the storage device associated with recovery of the content. When determined to recover the content, the processor selects a content recovery method based on a first remaining retention period during which the content should be retained and a second remaining retention period until the content is to be erased from the storage device.
    Type: Application
    Filed: September 10, 2024
    Publication date: September 4, 2025
    Applicant: Kioxia Corporation
    Inventors: Kohei OKUDA, Shinichi KANNO, Tatsuki IZUMI, Toru WATABE, Hideki YOSHIDA
  • Publication number: 20250258777
    Abstract: According to one embodiment, when a read request received from a host includes a first identifier indicative of a first region, a memory system obtains a logical address from the received read request, obtains a physical address corresponding to the obtained logical address from a logical-to-physical address translation table which manages mapping between logical addresses and physical addresses of the first region, and reads data from the first region, based on the obtained physical address. When the received read request includes a second identifier indicative of a second region, the memory system obtains physical address information from the read request, and reads data from the second region, based on the obtained physical address information.
    Type: Application
    Filed: April 28, 2025
    Publication date: August 14, 2025
    Applicant: Kioxia Corporation
    Inventors: Hideki YOSHIDA, Shinichi KANNO
  • Patent number: 12321283
    Abstract: According to one embodiment, when a read request received from a host includes a first identifier indicative of a first region, a memory system obtains a logical address from the received read request, obtains a physical address corresponding to the obtained logical address from a logical-to-physical address translation table which manages mapping between logical addresses and physical addresses of the first region, and reads data from the first region, based on the obtained physical address. When the received read request includes a second identifier indicative of a second region, the memory system obtains physical address information from the read request, and reads data from the second region, based on the obtained physical address information.
    Type: Grant
    Filed: March 1, 2024
    Date of Patent: June 3, 2025
    Assignee: Kioxia Corporation
    Inventors: Hideki Yoshida, Shinichi Kanno
  • Publication number: 20250147691
    Abstract: According to one embodiment, a memory system includes a nonvolatile memory and a controller. The controller acquires, from a host, write data having the same first size as a data write unit of the nonvolatile memory and obtained by dividing write data associated with one write command having a first identifier indicating a first write destination block in a plurality of write destination blocks into a plurality of write data or combining write data associated with two or more write commands having the first identifier. The controller writes the acquired write data having the first size to the first write destination block by a first write operation.
    Type: Application
    Filed: January 9, 2025
    Publication date: May 8, 2025
    Applicant: KIOXIA CORPORATION
    Inventors: Shinichi KANNO, Hideki YOSHIDA, Naoki ESAKA, Hiroshi NISHIMURA
  • Publication number: 20250068354
    Abstract: A controller manages a plurality of block groups each including one or more blocks among a plurality of blocks provided in a non-volatile memory. The controller assigns one of the plurality of block groups to each of plurality of zones. The controller writes write data which is to be written to a first zone to a shared write buffer and writes write data which is to be written to a second zone to the shared write buffer. When a total size of the write data in the first zone stored in the shared write buffer reaches a capacity of the first zone, the controller copies the write data in the first zone stored in the shared write buffer to the first block group assigned to the first zone.
    Type: Application
    Filed: November 6, 2024
    Publication date: February 27, 2025
    Applicant: Kioxia Corporation
    Inventors: Hideki YOSHIDA, Shinichi KANNO, Naoki ESAKA
  • Patent number: 12229441
    Abstract: According to one embodiment, a memory system includes a nonvolatile memory and a controller. The controller acquires, from a host, write data having the same first size as a data write unit of the nonvolatile memory and obtained by dividing write data associated with one write command having a first identifier indicating a first write destination block in a plurality of write destination blocks into a plurality of write data or combining write data associated with two or more write commands having the first identifier. The controller writes the acquired write data having the first size to the first write destination block by a first write operation.
    Type: Grant
    Filed: November 1, 2023
    Date of Patent: February 18, 2025
    Assignee: KIOXIA CORPORATION
    Inventors: Shinichi Kanno, Hideki Yoshida, Naoki Esaka, Hiroshi Nishimura
  • Publication number: 20250045202
    Abstract: According to one embodiment, a memory system determine both of a first block to which data from a host is to be written and a first location of the first block, when receiving a write request to designate a first logical address from the host. The memory system writes the data from the host to the first location of the first block. The memory system notifies the host of the first logical address, a first block number designating the first block, and a first in-block offset indicating an offset from a leading part of the first block to the first location by a multiple of grain having a size different from a page size.
    Type: Application
    Filed: October 24, 2024
    Publication date: February 6, 2025
    Applicant: Kioxia Corporation
    Inventors: Shinichi KANNO, Hideki YOSHIDA
  • Publication number: 20250036283
    Abstract: According to one embodiment, when receiving a write request to designate a first block number and a first logical address from a host, a memory system determines a first location in a first block having the first block number, to which data from the host is to be written, and writes the data from the host to the first location of the first block. The memory system updates a first address translation table managing mapping between logical addresses and in-block physical addresses of the first block, and maps a first in-block physical address indicative of the first location to the first logical address.
    Type: Application
    Filed: October 10, 2024
    Publication date: January 30, 2025
    Applicant: Kioxia Corporation
    Inventors: Hideki YOSHIDA, Shinichi KANNO
  • Publication number: 20250021224
    Abstract: According to one embodiment, a memory system includes a nonvolatile memory and a controller which controls the nonvolatile memory. The controller notifies to an outside an extensive signal which indicates a predetermined state of the nonvolatile memory or the controller.
    Type: Application
    Filed: September 25, 2024
    Publication date: January 16, 2025
    Applicant: Kioxia Corporation
    Inventors: Shinichi KANNO, Hiroshi NISHIMURA, Hideki YOSHIDA, Hiroshi MURAYAMA
  • Publication number: 20250013385
    Abstract: According to one embodiment, a memory system receives from a host a first write request including a first block identifier designating a first write destination block to which first write data is to be written. The memory system acquires the first write data from a write buffer temporarily holding write data corresponding to each of the write requests, and writes the first write data to a write destination page in the first write destination block. The memory system releases a region in the write buffer, storing data which is made readable from the first write destination block by writing the first write data to the write destination page. The data made readable is a data of a page in the first write destination block preceding the write destination page.
    Type: Application
    Filed: September 23, 2024
    Publication date: January 9, 2025
    Applicant: KIOXIA CORPORATION
    Inventors: Shinichi KANNO, Hideki YOSHIDA, Naoki ESAKA