Patents by Inventor Hideki Yoshida

Hideki Yoshida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11747989
    Abstract: According to one embodiment, a memory system manages wear of each of a plurality of blocks in a nonvolatile memory. The memory system receives, from a host, a write request including a parameter specifying a data retention term required for first data to be written. The memory system selects, from the blocks, a first block in which a data retention term estimated from the wear of the first block is longer than or equal to the specified data retention term. The memory system writes the first data to the first block.
    Type: Grant
    Filed: May 26, 2021
    Date of Patent: September 5, 2023
    Assignee: Kioxia Corporation
    Inventors: Shinichi Kanno, Hideki Yoshida
  • Patent number: 11748256
    Abstract: According to one embodiment, a memory system includes a nonvolatile memory including plural blocks each including plural pages, and a controller. When receiving a write request designating a first logical address and a first block number from the host, the controller determines a first location in a first block having the first block number to which data from the host should be written, and writes the data from the host to the first location in the first block. The controller notifies the host of either an in-block physical address indicative of the first location, or a group of the first logical address, the first block number and the first in-block physical address.
    Type: Grant
    Filed: July 7, 2022
    Date of Patent: September 5, 2023
    Assignee: Kioxia Corporation
    Inventors: Hideki Yoshida, Shinichi Kanno
  • Patent number: 11726707
    Abstract: According to one embodiment, a memory system receives from a host a first write request including a first block identifier designating a first write destination block to which first write data is to be written. The memory system acquires the first write data from a write buffer temporarily holding write data corresponding to each of the write requests, and writes the first write data to a write destination page in the first write destination block. The memory system releases a region in the write buffer, storing data which is made readable from the first write destination block by writ the first write data to the write destination page. The data made readable is a data of a page in the first write destination block preceding the write destination page.
    Type: Grant
    Filed: November 10, 2021
    Date of Patent: August 15, 2023
    Assignee: KIOXIA CORPORATION
    Inventors: Shinichi Kanno, Hideki Yoshida, Naoki Esaka
  • Patent number: 11709597
    Abstract: According to one embodiment, when receiving a write request to designate a first block number and a first logical address from a host, a memory system determines a first location in a first block having the first block number, to which data from the host is to be written, and writes the data from the host to the first location of the first block. The memory system updates a first address translation table managing mapping between logical addresses and in-block physical addresses of the first block, and maps a first in-block physical address indicative of the first location to the first logical address.
    Type: Grant
    Filed: July 19, 2021
    Date of Patent: July 25, 2023
    Assignee: Kioxia Corporation
    Inventors: Hideki Yoshida, Shinichi Kanno
  • Patent number: 11704019
    Abstract: According to one embodiment, a memory system includes a nonvolatile memory and a controller which controls the nonvolatile memory. The controller notifies to an outside an extensive signal which indicates a predetermined state of the nonvolatile memory or the controller.
    Type: Grant
    Filed: October 23, 2020
    Date of Patent: July 18, 2023
    Assignee: Kioxia Corporation
    Inventors: Shinichi Kanno, Hiroshi Nishimura, Hideki Yoshida, Hiroshi Murayama
  • Publication number: 20230187609
    Abstract: Provided is a positive electrode composition with which a lithium sulfur battery may achieve a high cycle capacity retention. The positive electrode composition for lithium sulfur batteries includes a sulfur-carbon composite including a carbon material having void spaces and an elemental sulfur containing material disposed in the void spaces of the carbon material, and a lithium transition metal composite oxide.
    Type: Application
    Filed: March 31, 2021
    Publication date: June 15, 2023
    Applicant: NICHIA CORPORATION
    Inventors: Takashi SUGIMOTO, Hideki YOSHIDA, Toru KOIZUKA, Shoma HATA
  • Publication number: 20230076210
    Abstract: According to one embodiment, a memory system includes a nonvolatile memory and a controller. The controller acquires, from a host, write data having the same first size as a data write unit of the nonvolatile memory and obtained by dividing write data associated with one write command having a first identifier indicating a first write destination block in a plurality of write destination blocks into a plurality of write data or combining write data associated with two or more write commands having the first identifier. The controller writes the acquired write data having the first size to the first write destination block by a first write operation.
    Type: Application
    Filed: November 7, 2022
    Publication date: March 9, 2023
    Applicant: KIOXIA CORPORATION
    Inventors: Shinichi KANNO, Hideki YOSHIDA, Naoki ESAKA, Hiroshi NISHIMURA
  • Patent number: 11543997
    Abstract: According to one embodiment, a memory system includes a nonvolatile memory and a controller. The controller acquires, from a host, write data having the same first size as a data write unit of the nonvolatile memory and obtained by dividing write data associated with one write command having a first identifier indicating a first write destination block in a plurality of write destination blocks into a plurality of write data or combining write data associated with two or more write commands having the first identifier. The controller writes the acquired write data having the first size to the first write destination block by a first write operation.
    Type: Grant
    Filed: August 19, 2021
    Date of Patent: January 3, 2023
    Assignee: Kioxia Corporation
    Inventors: Shinichi Kanno, Hideki Yoshida, Naoki Esaka, Hiroshi Nishimura
  • Publication number: 20220350530
    Abstract: A controller manages a plurality of block groups each including one or more blocks among a plurality of blocks provided in a non-volatile memory. The controller assigns one of the plurality of block groups to each of plurality of zones. The controller writes write data which is to be written to a first zone to a shared write buffer and writes write data which is to be written to a second zone to the shared write buffer. When a total size of the write data in the first zone stored in the shared write buffer reaches a capacity of the first zone, the controller copies the write data in the first zone stored in the shared write buffer to the first block group assigned to the first zone.
    Type: Application
    Filed: March 2, 2022
    Publication date: November 3, 2022
    Applicant: Kioxia Corporation
    Inventors: Hideki YOSHIDA, Shinichi KANNO, Naoki ESAKA
  • Publication number: 20220342809
    Abstract: According to one embodiment, a memory system includes a nonvolatile memory including plural blocks each including plural pages, and a controller. When receiving a write request designating a first logical address and a first block number from the host, the controller determines a first location in a first block having the first block number to which data from the host should be written, and writes the data from the host to the first location in the first block. The controller notifies the host of either an in-block physical address indicative of the first location, or a group of the first logical address, the first block number and the first in-block physical address.
    Type: Application
    Filed: July 7, 2022
    Publication date: October 27, 2022
    Inventors: Hideki Yoshida, Shinichi Kanno
  • Publication number: 20220308971
    Abstract: According to one embodiment, a storage system includes a first storage including first nonvolatile memories storing data which is corrupted when data is read from the first nonvolatile memories, and a controller which controls the first storage. The controller reads data from a first nonvolatile memory at a first address, and determines that whether the read data is to be written back to the first storage or not.
    Type: Application
    Filed: June 14, 2022
    Publication date: September 29, 2022
    Inventors: Shinichi Kanno, Hideki Yoshida
  • Publication number: 20220290966
    Abstract: A wall thinning detection system includes a polarized magnetic charge distribution computing unit configured to compute a spatial distribution of polarized magnetic charges, which is an aggregate of a plurality of magnetic dipoles in a monitoring area, based on a magnetic field distribution in the monitoring area of a metal instrument measured by a magnetic field sensor array comprising a plurality of magnetic field sensors, and a wall thinning distribution computing unit configured to compute a wall thinning distribution in the monitoring area based on the spatial distribution of the polarized magnetic charges calculated by the polarized magnetic charge distribution computing unit.
    Type: Application
    Filed: March 7, 2022
    Publication date: September 15, 2022
    Applicant: Yokogawa Electric Corporation
    Inventor: Hideki Yoshida
  • Patent number: 11416387
    Abstract: According to one embodiment, a memory system includes a nonvolatile memory including plural blocks each including plural pages, and a controller. When receiving a write request designating a first logical address and a first block number from the host, the controller determines a first location in a first block having the first block number to which data from the host should be written, and writes the data from the host to the first location in the first block. The controller notifies the host of either an in-block physical address indicative of the first location, or a group of the first logical address, the first block number and the first in-block physical address.
    Type: Grant
    Filed: June 12, 2020
    Date of Patent: August 16, 2022
    Assignee: Kioxia Corporation
    Inventors: Hideki Yoshida, Shinichi Kanno
  • Patent number: 11392466
    Abstract: According to one embodiment, a storage system includes a first storage including first nonvolatile memories storing data which is corrupted when data is read from the first nonvolatile memories, and a controller which controls the first storage. The controller reads data from a first nonvolatile memory at a first address, and determines that whether the read data is to be written back to the first storage or not.
    Type: Grant
    Filed: June 5, 2018
    Date of Patent: July 19, 2022
    Assignee: Kioxia Corporation
    Inventors: Shinichi Kanno, Hideki Yoshida
  • Publication number: 20220197817
    Abstract: According to one embodiment, when a read request received from a host includes a first identifier indicative of a first region, a memory system obtains a logical address from the received read request, obtains a physical address corresponding to the obtained logical address from a logical-to-physical address translation table which manages mapping between logical addresses and physical addresses of the first region, and reads data from the first region, based on the obtained physical address. When the received read request includes a second identifier indicative of a second region, the memory system obtains physical address information from the read request, and reads data from the second region, based on the obtained physical address information.
    Type: Application
    Filed: March 8, 2022
    Publication date: June 23, 2022
    Inventors: Hideki Yoshida, Shinichi Kanno
  • Patent number: 11347655
    Abstract: According to one embodiment, when a read request received from a host includes a first identifier indicative of a first region, a memory system obtains a logical address from the received read request, obtains a physical address corresponding to the obtained logical address from a logical-to-physical address translation table which manages mapping between logical addresses and physical addresses of the first region, and reads data from the first region, based on the obtained physical address. When the received read request includes a second identifier indicative of a second region, the memory system obtains physical address information from the read request, and reads data from the second region, based on the obtained physical address information.
    Type: Grant
    Filed: December 23, 2019
    Date of Patent: May 31, 2022
    Assignee: Kioxia Corporation
    Inventors: Hideki Yoshida, Shinichi Kanno
  • Patent number: 11307994
    Abstract: According to one embodiment, when a read request received from a host includes a first identifier indicative of a first region, a memory system obtains a logical address from the received read request, obtains a physical address corresponding to the obtained logical address from a logical-to-physical address translation table which manages mapping between logical addresses and physical addresses of the first region, and reads data from the first region, based on the obtained physical address. When the received read request includes a second identifier indicative of a second region, the memory system obtains physical address information from the read request, and reads data from the second region, based on the obtained physical address information.
    Type: Grant
    Filed: December 23, 2019
    Date of Patent: April 19, 2022
    Assignee: Kioxia Corporation
    Inventors: Hideki Yoshida, Shinichi Kanno
  • Publication number: 20220089457
    Abstract: A method for producing a nickel cobalt complex hydroxide includes first crystallization of supplying a solution containing Ni, Co and Mn, a complex ion forming agent and a basic solution separately and simultaneously to one reaction vessel to obtain nickel cobalt complex hydroxide particles, and a second crystallization of, after the first crystallization, further supplying a solution containing nickel, cobalt, and manganese, a solution of a complex ion forming agent, a basic solution, and a solution containing said element M separately and simultaneously to the reaction vessel to crystallize a complex hydroxide particles containing nickel, cobalt, manganese and said element M on the nickel cobalt complex hydroxide particles crystallizing a complex hydroxide particles comprising Ni, Co, Mn and the element M on the nickel cobalt complex hydroxide particles.
    Type: Application
    Filed: December 3, 2021
    Publication date: March 24, 2022
    Applicant: NICHIA CORPORATION
    Inventors: Hideki YOSHIDA, Masato SONOO, Takahiro KITAGAWA
  • Patent number: 11283071
    Abstract: A cathode active material with high durability and a lithium ion secondary battery. The cathode active material is a cathode active material represented by a general formula Li(1+a)NixCoyMnzWtO2 (?0.05?a?0.2, x=1?y?z?t, 0?y<1, 0?t<1, 0<t?0.03), wherein the cathode active material satisfies the following formula (1): ?1/t1?0.92??(1) where t1 is an element concentration average of insides and grain boundaries of primary particles of a W element, and ?1 is an element concentration standard deviation of the insides and grain boundaries of the primary particles of the W element.
    Type: Grant
    Filed: May 5, 2017
    Date of Patent: March 22, 2022
    Assignees: TOYOTA JIDOSHA KABUSHIKI KAISHA, Nichia Corporation
    Inventors: Hajime Hasegawa, Keisuke Omori, Masato Hozumi, Masashi Kodama, Takumi Tanaka, Hideki Yoshida, Masato Sonoo, Yuuki Maeda
  • Publication number: 20220066693
    Abstract: According to one embodiment, a memory system receives from a host a first write request including a first block identifier designating a first write destination block to which first write data is to be written. The memory system acquires the first write data from a write buffer temporarily holding write data corresponding to each of the write requests, and writes the first write data to a write destination page in the first write destination block. The memory system releases a region in the write buffer, storing data which is made readable from the first write destination block by writ the first write data to the write destination page. The data made readable is a data of a page in the first write destination block preceding the write destination page.
    Type: Application
    Filed: November 10, 2021
    Publication date: March 3, 2022
    Applicant: Toshiba Memory Corporation
    Inventors: Shinichi KANNO, Hideki YOSHIDA, Naoki ESAKA