Patents by Inventor Hideo Hara

Hideo Hara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120092897
    Abstract: An electronic device (100) includes a power supply system (1) and a load circuit (2) connected to the power supply system (1). The load circuit (2) mutually switches between the first mode and the second mode. In the first mode, the load circuit (2) operates with electric power supplied from the power supply system (1). On the other hand, in the second mode, the load circuit (2) is brought into the state where the electric power does not need to be supplied from the power supply system (1). In response to the fact that the mode of the load circuit (2) is switched from the first mode to the second mode, a power supply control device (4) causes an AC/DC converter (7) to stop.
    Type: Application
    Filed: July 1, 2010
    Publication date: April 19, 2012
    Applicant: ROHM CO., LTD.
    Inventors: Hideo Hara, Hiroaki Goda, Takashi Naiki
  • Publication number: 20120049821
    Abstract: The switching regulator according to the present invention comprises an oscillation circuit for generating a clock signal having a predetermined oscillation frequency; and a switching signal generation circuit for generating a switching signal for driving a switching element connected to an output circuit; wherein the switching signal generation circuit varies the ON time of the switching signal so that the frequency of the switching signal approaches the frequency of the clock signal; and varies the timing at which the switching signal is ON so that an output voltage outputted from the output circuit approaches a predetermined reference voltage.
    Type: Application
    Filed: August 18, 2011
    Publication date: March 1, 2012
    Applicant: Rohm Co., Ltd.
    Inventors: Shingo Hashiguchi, Hideo Hara, Kiyotaka Umemoto
  • Publication number: 20120033208
    Abstract: It is an object of the present invention to test a device under test including an optical interface. Provided is a device interface apparatus on which is loaded a device under test including an optical interface. The device interface apparatus comprises a device loading section on which the device under test is loaded; an optical connector that is to be connected to the optical interface of the device under test; and an optical connector moving section that moves the optical connector toward the optical interface of the device under test loaded on the device loading section, to optically connect the optical connector and the optical interface.
    Type: Application
    Filed: August 2, 2011
    Publication date: February 9, 2012
    Applicant: ADVANTEST CORPORATION
    Inventors: Hideo HARA, Shin MASUDA
  • Publication number: 20110254515
    Abstract: A charge control device of the disclosure including a charger to perform a constant current charge control to maintain a charge current to an electric double-layer capacitor as a predetermined charge current value for a constant current charge period after a beginning of a charge of the electric double-layer capacitor.
    Type: Application
    Filed: April 19, 2011
    Publication date: October 20, 2011
    Applicant: ROHM CO., LTD.
    Inventor: Hideo Hara
  • Publication number: 20100244779
    Abstract: A charging control device (1) of the present invention monitors a charging current (I3) for a secondary battery (3) and controls the charging of the secondary battery (3) such that the current value of the charging current is equal to which of a target value preset within the device and a target value freely set from an outside of the device is smaller.
    Type: Application
    Filed: September 30, 2008
    Publication date: September 30, 2010
    Applicant: Rohm Co., Ltd.
    Inventor: Hideo Hara
  • Patent number: 7557864
    Abstract: A video signal judgment circuit for judging the condition of a video signal compounded of a picture signal and a synchronization signal is provided. The video signal judgment circuit is adapted to first filter the video signal by a low-pass filter (LPF) having an adjustable cutoff frequency and then separate the synchronization signal from the filtered signal to provide a pulsed synchronization detection signal. Upon comparison of a detection signal formed on the basis of the synchronization detection signal with an adjustable judgment reference value, the video signal judgment circuit outputs a video signal judgment signal indicative of the condition of the video signal as to whether or not the video signal is nullified or deteriorated.
    Type: Grant
    Filed: March 2, 2005
    Date of Patent: July 7, 2009
    Assignee: Rohm Co., Ltd.
    Inventors: Hideo Hara, Takumi Katoh
  • Publication number: 20090170798
    Abstract: An objective of the present invention is to provide a safe and effective vaccine therapy for Alzheimer's disease. A minus strand RNA viral vector carrying amyloid gene was constructed, and administered intranasally to 24- to 25-months-old APP transgenic mice. The level of serum anti-A 42 antibody was determined and showed to be markedly higher than the control. The results of histological investigation showed that the administration of a vector of the present invention markedly reduced senile plaques in all of the frontal lobe, parietal lobe, and hippocampus. The brain A level was also markedly reduced. Furthermore, the administration of a vector of the present invention did not result in lymphocyte infiltration in the central nervous system.
    Type: Application
    Filed: April 20, 2006
    Publication date: July 2, 2009
    Applicants: JAPAN AS REPRESENTED BY PRESIDENT OF NATIONAL CENTER FOR GERIATRICS AND GERONTOLOGY, DNAVEC CORPORATION
    Inventors: Hideo Hara, Takeshi Tabira, Yoshikazu Yonemitsu, Makoto Inoue, Yumiko Tokusumi, Mamoru Hasegawa
  • Publication number: 20090091397
    Abstract: An oscillating apparatus for outputting an oscillating signal includes a resonant circuit that generates the oscillating signal, an amplifier circuit that amplifies the oscillating signal generated by the resonant circuit, and feeds the amplified oscillating signal back to the resonant circuit, and an output circuit that receives the oscillating signal which is supplied to the amplifier circuit, and outputs the received oscillating signal to outside.
    Type: Application
    Filed: October 8, 2007
    Publication date: April 9, 2009
    Applicant: ADVANTEST CORPORATION
    Inventors: HARUKI NAGAMI, HIDEO HARA
  • Publication number: 20090004144
    Abstract: Disclosed is an adeno-associated virus vector capable of expressing a peptide fragment containing a humoral immunity induction site of the ?-amyloid peptide, comprising DNA encoding the peptide fragment in an operative form.
    Type: Application
    Filed: June 11, 2004
    Publication date: January 1, 2009
    Applicants: Japan as Represented by President of Natinal Center of Geriatrics and Gerontology, National Institute of Biomedical Innovation
    Inventors: Takeshi Tabira, Hideo Hara
  • Publication number: 20080254249
    Abstract: A work subject material comprising a metal plate for use in punching and/or bending and, attached thereto, a surface protection sheet, characterized in that the surface protection sheet comprises a support base material and an adhesive layer superimposed on one surface of the support base material and that the surface protection sheet exhibits a coefficient (I) not more than 21.0, a coefficient (II) not less than 4.0 and a coefficient (III) not more than 1.5, which are calculated by the following formulae: (I) thickness of support base material (mm)×elongation at break of surface protection sheet (%); (II)=thickness of support base material (mm)×strength at break of surface protection sheet (N/20 mm); and (III)=coefficient (I)/coefficient (II).
    Type: Application
    Filed: August 2, 2005
    Publication date: October 16, 2008
    Applicant: NITTO DENKO CORPORATION
    Inventors: Keiji Hayashi, Kazuhito Okumura, Yoshikazu Tanaka, Hideo Hara, Toru Inamasu
  • Publication number: 20080055480
    Abstract: A video signal judgment circuit for judging the condition of a video signal compounded of a picture signal and a synchronization signal is provided. The video signal judgment circuit is adapted to first filter the video signal by a low-pass filter (LPF) having an adjustable cutoff frequency and then separate the synchronization signal from the filtered signal to provide a pulsed synchronization detection signal. Upon comparison of a detection signal formed on the basis of the synchronization detection signal with an adjustable judgment reference value, the video signal judgment circuit outputs a video signal judgment signal indicative of the condition of the video signal as to whether or not the video signal is nullified or deteriorated.
    Type: Application
    Filed: March 2, 2005
    Publication date: March 6, 2008
    Inventors: Hideo Hara, Takumi Katoh
  • Publication number: 20070158817
    Abstract: A semiconductor device includes, in first and second power source systems, electrostatic discharge (ESD) protective bonding pads connected by bonding wires to first and second power supply terminals and first and second ground terminals, first and second signal ESD protective element sections that are each connected to first and second signal bonding pads and the ESD protective bonding pads and protect first and second I/O circuits, respectively, and a power source ESD protective element section connected to first and second ESD protective bonding pads. The semiconductor device is capable of minimizing an increase in the chip size while implementing ESD damage countermeasures in which the power supply (or ground) terminal of one power source system serves as the reference potential terminal for the signal terminal of the other power source system.
    Type: Application
    Filed: March 11, 2005
    Publication date: July 12, 2007
    Applicant: ROHM CO., LTD.
    Inventors: Takumi Katoh, Hideo Hara
  • Patent number: 6972903
    Abstract: A vision assisting apparatus includes a casing for forming an inversely U-shaped optical path, a light entry, provided at one end of the optical path, through which light enters, a light exit, provided at another end of the optical path, through which light exits in an opposite direction to the light entry, an optical system for processing an image entered via the light entry by using the optical pass and outputting a processed image via the light exit, and attaching structure for attaching the casing to a wearer so that the light exit is positioned close to an eye of the wearer. By forming the inversely U-shaped optical path with the casing, it is possible to provide a sufficiently long optical path in a compact form.
    Type: Grant
    Filed: April 12, 2002
    Date of Patent: December 6, 2005
    Assignees: Nittoh Kogaku K.K.
    Inventors: Hideo Hara, Kazunaga Shimizu, Fumiaki Koizumi, Yasuhiro Sakai
  • Publication number: 20040179261
    Abstract: The vision assisting apparatus of the present invention includes a casing for forming an inversely U-shaped optical path, a light entry, provided at one end of the optical path, through which light enters, a light exit, provided at another end of the optical path, through which light exits in an opposite direction to the light entry, an optical system for processing an image entered via the light entry by using the optical pass and outputting a processed image via the light exit, and means for attaching the casing to a wearer so that the light exit is positioned close to an eye of the wearer. By forming the inversely U-shaped optical path with the casing, it is possible to provide a sufficiently long optical path in a compact form.
    Type: Application
    Filed: April 26, 2004
    Publication date: September 16, 2004
    Inventors: Hideo Hara, Kazunaga Shimizu, Fumiaki Koizumi, Yasuhiro Sakai
  • Patent number: 6657459
    Abstract: A semiconductor integrated circuit device, responsive to an input signal having a low amplitude and short transition time, operates with low power consumption and prevents the flow of breakthrough current. In an example circuit thereof, the input signal is transmitted through an NMOS pass transistor to the gate of a first NMOS transistor and is applied, through a second NMOS transistor, to the gate of a first PMOS transistor, the first PMOS transistor performing complementary operation with the first NMOS transistor through the second NMOS transistor; the gate of the first PMOS transistor is connected to the power supply potential through the second PMOS transistor; the gate of the second NMOS transistor is connected to the power supply potential; and the gate of the second PMOS transistor is controlled by the signal at a common drain connection of the first NMOS and first PMOS transistors.
    Type: Grant
    Filed: May 14, 2002
    Date of Patent: December 2, 2003
    Assignees: Hitachi, Ltd., Hitachi Engineering Co., Ltd.
    Inventors: Yoji Nishio, Kosaku Hirose, Hideo Hara, Katsunori Koike, Kayoko Nemoto, Tatsumi Yamauchi, Fumio Murabayashi, Hiromichi Yamada
  • Patent number: 6594992
    Abstract: In a rotary servo valve (1) provided with at least two kinds of pump port (33, 39) for high and low pressures, a spool (11) that is free to rotate and free to reciprocate linearly is installed into a spool guide hole (7) of the valve main body (9), a servo motor (15) that rotates and drives the spool and a linear type actuator (13) that reciprocatedly travels are disposed, and the pump ports are selectively changed over by the reciprocation of the spool, and cylinder ports are selectively changed over by the rotation and at the same time the flow rate is controlled.
    Type: Grant
    Filed: March 29, 2001
    Date of Patent: July 22, 2003
    Assignees: Amada Engineering Center Company, Limited, Amada Company, Limited
    Inventors: Kinshiro Naito, Masayuki Shimizu, Hideo Hara, Osamu Takahashi
  • Patent number: 6462580
    Abstract: The object of the present invention to provide a semiconductor integrated circuit device wherein the input signal is made to have a low amplitude to shorten transition time of the input signal, said integrated circuit device operating at a low power consumption, without flowing of breakthrough current, despite entry of the input signal featuring low-amplitude operations, and said integrated circuit device comprising a gate circuit, memory and processor.
    Type: Grant
    Filed: December 28, 2000
    Date of Patent: October 8, 2002
    Assignees: Hitachi, Ltd., Hitachi Engineering Co., Ltd.
    Inventors: Yoji Nishio, Kosaku Hirose, Hideo Hara, Katsunori Koike, Kayoko Nemoto, Tatsumi Yamauchi, Fumio Murabayashi, Hiromichi Yamada
  • Publication number: 20020130683
    Abstract: A semiconductor integrated circuit device, responsive to an input signal having a low amplitude and short transition time, operates with low power consumption and prevents the flow of breakthrough current. In an example circuit thereof, the input signal is transmitted through an NMOS pass transistor to the gate of a first NMOS transistor and is applied, through a second NMOS transistor, to the gate of a first PMOS transistor, the first PMOS transistor performing complementary operation with the first NMOS transistor through the second NMOS transistor; the gate of the first PMOS transistor is connected to the power supply potential through the second PMOS transistor; the gate of the second NMOS transistor is connected to the power supply potential; and the gate of the second PMOS transistor is controlled by the signal at a common drain connection of the first NMOS and first PMOS transistors.
    Type: Application
    Filed: May 14, 2002
    Publication date: September 19, 2002
    Inventors: Yoji Nishio, Kosaku Hirose, Hideo Hara, Katsunori Koike, Kayoko Nemoto, Tatsumi Yamauchi, Fumio Murabayashi, Hiromichi Yamada
  • Publication number: 20010000653
    Abstract: The object of the present invention is to provide a semiconductor integrated circuit device wherein the input signal is made to have a low amplitude to shorten transition time of the input signal, said integrated circuit device operating at a low power consumption, without flowing of breakthrough current, despite entry of the input signal featuring low-amplitude operations, and said integrated circuit device comprising a gate circuit, memory and processor.
    Type: Application
    Filed: December 28, 2000
    Publication date: May 3, 2001
    Inventors: Yoji Nishio, Kosaku Hirose, Hideo Hara, Katsunori Koike, Kayoko Nemoto, Tatsumi Yamauchi, Fumio Murabayashi, Hiromichi Yamada
  • Patent number: 6172532
    Abstract: The object of the present invention is to provide a semiconductor integrated circuit device wherein the input signal is made to have a low amplitude to shorten transition time of the input signal, said integrated circuit device operating at a low power consumption, without flowing of breakthrough current, despite entry of the input signal featuring low-amplitude operations, and said integrated circuit device comprising a gate circuit, memory and processor.
    Type: Grant
    Filed: September 8, 1997
    Date of Patent: January 9, 2001
    Assignees: Hitachi, Ltd., Hitachi Engineering Co., Ltd.
    Inventors: Yoji Nishio, Kosaku Hirose, Hideo Hara, Katsunori Koike, Kayoko Nemoto, Tatsumi Yamauchi, Fumio Murabayashi, Hiromichi Yamada