Patents by Inventor Hideyuki Hara

Hideyuki Hara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160188016
    Abstract: A position pointer includes a signal generation circuit, which generates at least one signal. The position pointer in operation transmits the at least one signal to a sensor of a position detector. The position pointer includes a first electrode arranged to protrude from one end portion of a pen-shaped housing along an axial center direction and a second electrode including at least three electrode pieces disposed near the first electrode in such a manner as to surround a central axis of the housing. The at least three electrode pieces are electrically isolated from each other. The position pointer has a signal supply control circuit, which, in operation, controls supply of signals to selectively supply the at least one signal to the second electrode that includes the at least three electrode pieces and to the first electrode.
    Type: Application
    Filed: October 21, 2015
    Publication date: June 30, 2016
    Inventors: Hiroshi Munakata, Takashi Suzuki, Hideyuki Hara, Yoshihisa Sugiyama
  • Publication number: 20150338930
    Abstract: A position detector includes a position pointer having an AC signal generation circuit that is disposed in a housing and that transmits an AC signal, and a sensor that receives the AC signal. The position detector detects the position pointed to by the position pointer on the sensor. The position pointer includes at least three electrodes electrically isolated from each other, and a control circuit that controls so that the AC signal is selectively supplied to the electrodes, and so that identification information identifying the electrode to which the AC signal is selectively supplied is generated and transmitted to the sensor. The position detector further includes a position detection circuit that detects the position based on the AC signal, and an angular information calculation circuit that calculates the rotation angle and/or the tilt angle of the position pointer based on the AC signal and the identification information.
    Type: Application
    Filed: March 24, 2015
    Publication date: November 26, 2015
    Inventor: Hideyuki HARA
  • Publication number: 20150317009
    Abstract: The invention allows size reduction of a sensor of a position detecting device of a capacitive system, which detects a position indicated by an indicator. The sensor has plural electrode conductors that are disposed adjacent to each other and are configured to receive a signal from the indicator on a first surface of a substrate having the first surface and a second surface opposed to each other. The position detecting device includes a signal processing circuit including a differential amplifier circuit that calculates a difference between signals from at least two of the plural electrode conductors. Plural connecting lines are formed on the second surface of the substrate. The plural connecting lines each have one end connected to one of the plural electrode conductors disposed on the first surface by a through-hole or a via formed through the substrate, and the other end connected to a line-concentrated part.
    Type: Application
    Filed: February 20, 2015
    Publication date: November 5, 2015
    Inventor: Hideyuki Hara
  • Publication number: 20140231011
    Abstract: A flattening method, by utilizing the advantages of the CARE method and making up for the disadvantages, can perform removal processing of a surface of a workpiece at a sufficient processing rate and can provide a processed surface having enhanced flatness without leaving damage in the processed surface. A flattening method comprises at least two surface removal steps and at least two cleaning steps, the final surface removal step being a catalyst-referred etching step comprising immersing a workpiece in a processing solution containing at least one of hydrohalic acid, hydrogen peroxide water and ozone water, and bringing a surface of a catalyst platen into contact with or close proximity to a surface to be processed of the workpiece to process the surface, said catalyst platen having in a surface a catalyst selected from the group consisting of platinum, gold, a ceramic solid catalyst, a transition metal, glass, and an acidic or basic solid catalyst.
    Type: Application
    Filed: April 10, 2014
    Publication date: August 21, 2014
    Applicant: Ebara Corporation
    Inventors: Kazuto YAMAUCHI, Yasuhisa SANO, Hideyuki HARA, Junji MURATA, Keita YAGI
  • Patent number: 8734661
    Abstract: A flattening method, by utilizing the advantages of the CARE method and making up for the disadvantages, can perform removal processing of a surface of a workpiece at a sufficient processing rate and can provide a processed surface having enhanced flatness without leaving damage in the processed surface. A flattening method comprises at least two surface removal steps and at least two cleaning steps, the final surface removal step being a catalyst-referred etching step comprising immersing a workpiece in a processing solution containing at least one of hydrohalic acid, hydrogen peroxide water and ozone water, and bringing a surface of a catalyst platen into contact with or close proximity to a surface to be processed of the workpiece to process the surface, said catalyst platen having in a surface a catalyst selected from the group consisting of platinum, gold, a ceramic solid catalyst, a transition metal, glass, and an acidic or basic solid catalyst.
    Type: Grant
    Filed: October 14, 2008
    Date of Patent: May 27, 2014
    Assignee: Ebara Corporation
    Inventors: Kazuto Yamauchi, Yasuhisa Sano, Hideyuki Hara, Junji Murata, Keita Yagi
  • Patent number: 7769511
    Abstract: In a vehicle control apparatus having an arithmetic processing unit including an arithmetic unit, a storage unit and a communication unit, and an input/output unit including an signal input unit or a signal output unit and a communication unit, the arithmetic processing unit is connected to the input/output unit via a serial communication line, the input/output unit is equipped with an event management unit for detecting an event of a signal input or a signal output and notifying the event to the arithmetic processing unit; and the arithmetic processing unit is, equipped with an input/output management unit for performing data exchange between the signal input unit or the signal output unit and the storage unit via the communication units, in accordance with a request from the arithmetic unit and an event notice from the event management unit.
    Type: Grant
    Filed: January 19, 2007
    Date of Patent: August 3, 2010
    Assignee: Hitachi, Ltd.
    Inventors: Yuichiro Morita, Fumio Narisawa, Koji Hashimoto, Nobuhisa Motoyama, Junji Miyake, Hideyuki Hara
  • Publication number: 20100147463
    Abstract: A catalyst-aided chemical processing method can process hard-to-process materials, especially SiC, GaN, etc. whose importance as electronic device materials is increasing these days, with high processing efficiency and high precision even for a space wavelength range of not less than several tens of ?m. The catalyst-aided chemical processing method comprises: putting a workpiece in a processing liquid in which halogen-containing molecules are dissolved; and moving the workpiece and a catalyst composed of molybdenum or a molybdenum compound relative to each other while keeping the catalyst in contact with or close proximity to a surface to be processed of the workpiece, thereby processing the surface of the workpiece.
    Type: Application
    Filed: December 11, 2009
    Publication date: June 17, 2010
    Inventors: Kazuto YAMAUCHI, Yasuhisa SANO, Hideyuki HARA, Junji MURATA, Keita YAGI
  • Patent number: 7651625
    Abstract: A catalyst-aided chemical processing method can process hard-to-process materials, especially SiC, GaN, etc. whose importance as electronic device materials is increasing these days, with high processing efficiency and high precision even for a space wavelength range of not less than several tens of ?m. The catalyst-aided chemical processing method comprises: putting a workpiece in a processing liquid in which halogen-containing molecules are dissolved; and moving the workpiece and a catalyst composed of molybdenum or a molybdenum compound relative to each other while keeping the catalyst in contact with or close proximity to a surface to be processed of the workpiece, thereby processing the surface of the workpiece.
    Type: Grant
    Filed: August 27, 2007
    Date of Patent: January 26, 2010
    Assignees: Osaka University, Ebara Corporation
    Inventors: Kazuto Yamauchi, Yasuhisa Sano, Hideyuki Hara, Junji Murata, Keita Yagi
  • Publication number: 20090095712
    Abstract: A flattening method, by utilizing the advantages of the CARE method and making up for the disadvantages, can perform removal processing of a surface of a workpiece at a sufficient processing rate and can provide a processed surface having enhanced flatness without leaving damage in the processed surface. A flattening method comprises at least two surface removal steps and at least two cleaning steps, the final surface removal step being a catalyst-referred etching step comprising immersing a workpiece in a processing solution containing at least one of hydrohalic acid, hydrogen peroxide water and ozone water, and bringing a surface of a catalyst platen into contact with or close proximity to a surface to be processed of the workpiece to process the surface, said catalyst platen having in a surface a catalyst selected from the group consisting of platinum, gold, a ceramic solid catalyst, a transition metal, glass, and an acidic or basic solid catalyst.
    Type: Application
    Filed: October 14, 2008
    Publication date: April 16, 2009
    Inventors: Kazuto Yamauchi, Yasuhisa Sano, Hideyuki Hara, Junji Murata, Keita Yagi
  • Publication number: 20080073222
    Abstract: A catalyst-aided chemical processing method can process hard-to-process materials, especially SiC, GaN, etc. whose importance as electronic device materials is increasing these days, with high processing efficiency and high precision even for a space wavelength range of not less than several tens of ?m. The catalyst-aided chemical processing method comprises: putting a workpiece in a processing liquid in which halogen-containing molecules are dissolved; and moving the workpiece and a catalyst composed of molybdenum or a molybdenum compound relative to each other while keeping the catalyst in contact with or close proximity to a surface to be processed of the workpiece, thereby processing the surface of the workpiece.
    Type: Application
    Filed: August 27, 2007
    Publication date: March 27, 2008
    Inventors: Kazuto Yamauchi, Yasuhisa Sano, Hideyuki Hara, Junji Murata, Keita Yagi
  • Publication number: 20070174373
    Abstract: In a vehicle control apparatus having an arithmetic processing unit including an arithmetic unit, a storage unit and a communication unit, and an input/output unit including an signal input unit or a signal output unit and a communication unit, the arithmetic processing unit is connected to the input/output unit via a serial communication line, the input/output unit is equipped with an event management unit for detecting an event of a signal input or a signal output and notifying the event to the arithmetic processing unit; and the arithmetic processing unit is, equipped with an input/output management unit for performing data exchange between the signal input unit or the signal output unit and the storage unit via the communication units, in accordance with a request from the arithmetic unit and an event notice from the event management unit.
    Type: Application
    Filed: January 19, 2007
    Publication date: July 26, 2007
    Applicant: Hitachi, Ltd.
    Inventors: Yuichiro Morita, Fumio Narisawa, Koji Hashimoto, Nobuhisa Motoyama, Junji Miyake, Hideyuki Hara
  • Publication number: 20020174272
    Abstract: In a DMA controller having such a structure capable of readily changing a total channel number, a channel number depending unit for handling a signal related to the total channel number; an instance capable unit which can be repeatedly used plural times equal to the total channel number; and also a channel number not-depending unit are extracted from the respective functions of the DAM controller. Then, these extracted units are combined with each other so as to constitute a functional block of the DMA controller circuit. In such a case that a total device number is changed, since only the channel number depending unit may be merely corrected, a total number of correcting stages can be reduced. The reuse rate of the channel number not-depending unit may be increased.
    Type: Application
    Filed: September 24, 2001
    Publication date: November 21, 2002
    Inventors: Dai Fujii, Ryo Fujita, Hiromichi Yamada, Koutarou Shimamura, Teppei Hirotsu, Kesami Hagiwara, Hideyuki Hara, Takashi Hotta
  • Patent number: 5581796
    Abstract: In a case where a graphic image segment of which positional information is defined in a world coordinate system and of which size information is defined in a device coordinate system is developed to be displayed on a multi-window screen, the development processing performance is improved in peripheral portions of the window. A rectangular development area (first development area) associated with the window is expanded with consideration of a size information of a graphic segment so as to obtain a second development area. The second development area is compared with a rectangular area (an existence area) circumscribing a graphic image represented only with positional information of the graphic segment. As a result, whether or not the graphic segment is to be developed is determined. The first development area is reduced with consideration of size information of the graphic segment to produce a third development area.
    Type: Grant
    Filed: December 10, 1993
    Date of Patent: December 3, 1996
    Assignee: Hitachi, Ltd.
    Inventors: Kazuyoshi Koga, Ryo Fujita, Koyo Katsura, Yasushi Fukunaga, Hideyuki Hara
  • Patent number: 5485559
    Abstract: A main processor sends to a command distribution device a series of graphic commands including an attribute command updating the state of the attribute which designates a display mode, and a primitive command defining graphics to be displayed. The command distribution device sequentially distributes the series of graphic commands to a plurality of geometry processors which process the graphics according to the type of command. The primitive command is sent to any one of plurality of geometry processors. At least those of the attribute commands which relate to the attributes of display used by the geometry processors are sent to all the geometry processors. The pixel commands comprising the outputs of those geometry processors are sent to a pixel processor which generates an image corresponding to the pixel commands.
    Type: Grant
    Filed: June 10, 1991
    Date of Patent: January 16, 1996
    Assignee: Hitachi, Ltd.
    Inventors: Toru Sakaibara, Ryoichi Takamatsu, Hideyuki Hara
  • Patent number: 5204945
    Abstract: The display system and a thick line display method realizes a high-speed and accurate display of a thick line without any disorder even if a display range is to be processed by two or more clip frames when the thick line is to be displayed by parallel setting a reference line component and at least one additional line component which is obtained by parallel moving the reference line component in a display system such as an information processing unit that displays graphs. For this purpose, a clip frame showing a display range is expanded by a predetermined width equal to or larger than the total width of additional line components to be set at least at one side of the reference line component and the additional line component is obtained in that expanded frame, and the line component within the clip frame of the additional line component and the reference line component within the clip frame are displayed.
    Type: Grant
    Filed: November 6, 1990
    Date of Patent: April 20, 1993
    Assignee: Hitachi, Ltd.
    Inventors: Toru Sakaibara, Hideyuki Hara, Ryo Fujita
  • Patent number: 4644490
    Abstract: A pipelined adder for adding or subtracting two floating point input data each expressed by a sign data, an exponent data and a mantissa expressed in a sign-magnitude format, in accordance with an external operation mode designation signal to produce a floating point sum or difference data in a sign-magnitude format. In a first stage of the adder, the magnitudes of the exponent data of the input data are compared by a subtractor or a comparator and the magnitudes of the mantissa data of the input data are compared by a subtractor or a comparator. An actual operation mode for the mantissa data of the input data is determined, on the basis of the compare results of the exponent data and the mantissa data and the external operation mode designation signals, so that the operation result data is always expressed in a sign-magnitude format.
    Type: Grant
    Filed: April 11, 1984
    Date of Patent: February 17, 1987
    Assignees: Hitachi, Ltd., Hitachi Engineering Co., Ltd.
    Inventors: Takao Kobayashi, Shigeo Abe, Tadaaki Bandoh, Masao Takatoo, Hidekazu Matsumoto, Hideyuki Hara
  • Patent number: 4468733
    Abstract: A multi-computer system includes a plurality of data processors and at least one I/O device which is commonly accessible by the data processors. A plurality of serial bus loops are configurated in hierarchy with interbus linkage devices disposed between adjacent layers of the hierarchy. The data processors are connected to a plurality of first layer serial bus loops and the I/O device which is commonly accessible by the data processors is connected to a second layer of serial bus loop. The interbus linkage devices control linkage among the plurality of serial bus loops and carry out routing control for a start command from the data processor to the I/O device, routing control for an interruption to report the end of I/O device operation, routing control for data transfer, routing control for a request interruption and exclusive use control of the shared I/O device.
    Type: Grant
    Filed: June 4, 1981
    Date of Patent: August 28, 1984
    Assignee: Hitachi, Ltd.
    Inventors: Toshihisa Oka, Hiroaki Nakanishi, Ryoichi Takamatsu, Takayuki Morioka, Masakazu Okada, Hideyuki Hara, Hirokazu Kasashima