Patents by Inventor Hideyuki Kishida

Hideyuki Kishida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9035305
    Abstract: Reducing hydrogen concentration in a channel formation region of an oxide semiconductor is important in stabilizing threshold voltage of a transistor including an oxide semiconductor and improving reliability. Hence, hydrogen is attracted from the oxide semiconductor and trapped in a region of an insulating film which overlaps with a source region and a drain region of the oxide semiconductor. Impurities such as argon, nitrogen, carbon, phosphorus, or boron are added to the region of the insulating film which overlaps with the source region and the drain region of the oxide semiconductor, thereby generating a defect. Hydrogen in the oxide semiconductor is attracted to the defect in the insulating film. The defect in the insulating film is stabilized by the presence of hydrogen.
    Type: Grant
    Filed: September 25, 2014
    Date of Patent: May 19, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Masashi Tsubuku, Yusuke Nonaka, Noritaka Ishihara, Masashi Oota, Hideyuki Kishida
  • Publication number: 20150104901
    Abstract: It is an object to provide a highly reliable semiconductor device with good electrical characteristics and a display device including the semiconductor device as a switching element. In a transistor including an oxide semiconductor layer, a needle crystal group provided on at least one surface side of the oxide semiconductor layer grows in a c-axis direction perpendicular to the surface and includes an a-b plane parallel to the surface, and a portion except for the needle crystal group is an amorphous region or a region in which amorphousness and microcrystals are mixed. Accordingly, a highly reliable semiconductor device with good electrical characteristics can be formed.
    Type: Application
    Filed: December 18, 2014
    Publication date: April 16, 2015
    Inventors: Shunpei YAMAZAKI, Masayuki SAKAKURA, Ryosuke WATANABE, Junichiro SAKATA, Kengo AKIMOTO, Akiharu MIYANAGA, Takuya HIROHASHI, Hideyuki KISHIDA
  • Patent number: 8987822
    Abstract: In a thin film transistor, an increase in off current or negative shift of the threshold voltage is prevented. In the thin film transistor, a buffer layer is provided between an oxide semiconductor layer and each of a source electrode layer and a drain electrode layer. The buffer layer includes a metal oxide layer which is an insulator or a semiconductor over a middle portion of the oxide semiconductor layer. The metal oxide layer functions as a protective layer for suppressing incorporation of impurities into the oxide semiconductor layer. Therefore, in the thin film transistor, an increase in off current or negative shift of the threshold voltage can be prevented.
    Type: Grant
    Filed: January 6, 2014
    Date of Patent: March 24, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Toshikazu Kondo, Hideyuki Kishida
  • Patent number: 8963149
    Abstract: A thin film transistor including an oxide semiconductor with favorable electrical characteristics is provided. The thin film transistor includes a gate electrode provided over a substrate, a gate insulating film provided over the gate electrode, an oxide semiconductor film provided over the gate electrode and on the gate insulating film, a metal oxide film provided on the oxide semiconductor film, and a metal film provided on the metal oxide film. The oxide semiconductor film is in contact with the metal oxide film, and includes a region whose concentration of metal is higher than that of any other region in the oxide semiconductor film (a high metal concentration region). In the high metal concentration region, the metal contained in the oxide semiconductor film may be present as a crystal grain or a microcrystal.
    Type: Grant
    Filed: June 6, 2014
    Date of Patent: February 24, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Akiharu Miyanaga, Junichiro Sakata, Masayuki Sakakura, Masahiro Takahashi, Hideyuki Kishida, Shunpei Yamazaki
  • Publication number: 20150048365
    Abstract: Reducing hydrogen concentration in a channel formation region of an oxide semiconductor is important in stabilizing threshold voltage of a transistor including an oxide semiconductor and improving reliability. Hence, hydrogen is attracted from the oxide semiconductor and trapped in a region of an insulating film which overlaps with a source region and a drain region of the oxide semiconductor. Impurities such as argon, nitrogen, carbon, phosphorus, or boron are added to the region of the insulating film which overlaps with the source region and the drain region of the oxide semiconductor, thereby generating a defect. Hydrogen in the oxide semiconductor is attracted to the defect in the insulating film. The defect in the insulating film is stabilized by the presence of hydrogen.
    Type: Application
    Filed: September 25, 2014
    Publication date: February 19, 2015
    Inventors: Masashi TSUBUKU, Yusuke NONAKA, Noritaka ISHIHARA, Masashi OOTA, Hideyuki KISHIDA
  • Publication number: 20150004746
    Abstract: An object is to provide a transistor including an oxide layer which includes Zn and does not include a rare metal such as In or Ga. Another object is to reduce an off current and stabilize electric characteristics in the transistor including an oxide layer which includes Zn. A transistor including an oxide layer including Zn is formed by stacking an oxide semiconductor layer including insulating oxide over an oxide layer so that the oxide layer is in contact with a source electrode layer or a drain electrode layer with the oxide semiconductor layer including insulating oxide interposed therebetween, whereby variation in the threshold voltage of the transistor can be reduced and electric characteristics can be stabilized.
    Type: Application
    Filed: September 18, 2014
    Publication date: January 1, 2015
    Inventors: Shunpei YAMAZAKI, Hiromichi GODO, Hideyuki KISHIDA
  • Patent number: 8916870
    Abstract: It is an object to provide a highly reliable semiconductor device including a thin film transistor with stable electric characteristics. In a semiconductor device including an inverted staggered thin film transistor whose semiconductor layer is an oxide semiconductor layer, a buffer layer is provided over the oxide semiconductor layer. The buffer layer is in contact with a channel formation region of the semiconductor layer and source and drain electrode layers. A film of the buffer layer has resistance distribution. A region provided over the channel formation region of the semiconductor layer has lower electrical conductivity than the channel formation region of the semiconductor layer, and a region in contact with the source and drain electrode layers has higher electrical conductivity than the channel formation region of the semiconductor layer.
    Type: Grant
    Filed: June 16, 2014
    Date of Patent: December 23, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Junichiro Sakata, Takuya Hirohashi, Hideyuki Kishida
  • Publication number: 20140367682
    Abstract: An object is to provide a semiconductor device including an oxide semiconductor with stable electric characteristics can be provided. An insulating layer having many defects typified by dangling bonds is formed over an oxide semiconductor layer with an oxygen-excess mixed region or an oxygen-excess oxide insulating layer interposed therebetween, whereby impurities in the oxide semiconductor layer, such as hydrogen or moisture (a hydrogen atom or a compound including a hydrogen atom such as H2O), are moved through the oxygen-excess mixed region or oxygen-excess oxide insulating layer and diffused into the insulating layer. Thus, the impurity concentration of the oxide semiconductor layer is reduced.
    Type: Application
    Filed: September 2, 2014
    Publication date: December 18, 2014
    Inventors: Shunpei YAMAZAKI, Akiharu MIYANAGA, Masahiro TAKAHASHI, Hideyuki KISHIDA, Junichiro SAKATA
  • Publication number: 20140370706
    Abstract: By using a conductive layer including Cu as a long lead wiring, increase in wiring resistance is suppressed. Further, the conductive layer including Cu is provided in such a manner that it does not overlap with the oxide semiconductor layer in which a channel region of a TFT is formed, and is surrounded by insulating layers including silicon nitride, whereby diffusion of Cu can be prevented; thus, a highly reliable semiconductor device can be manufactured. Specifically, a display device which is one embodiment of a semiconductor device can have high display quality and operate stably even when the size or definition thereof is increased.
    Type: Application
    Filed: August 25, 2014
    Publication date: December 18, 2014
    Inventors: Shunpei Yamazaki, Jun Koyama, Masahiro Takahashi, Hideyuki Kishida, Akiharu Miyanaga, Junpei Sugao, Hideki Uochi, Yasuo Nakamura
  • Patent number: 8872175
    Abstract: It is an object to provide a highly reliable semiconductor device including a thin film transistor with stable electric characteristics. In a semiconductor device including an inverted staggered thin film transistor whose semiconductor layer is an oxide semiconductor layer, a buffer layer is provided over the oxide semiconductor layer. The buffer layer is in contact with a channel formation region of the semiconductor layer and source and drain electrode layers. A film of the buffer layer has resistance distribution. A region provided over the channel formation region of the semiconductor layer has lower electrical conductivity than the channel formation region of the semiconductor layer, and a region in contact with the source and drain electrode layers has higher electrical conductivity than the channel formation region of the semiconductor layer.
    Type: Grant
    Filed: July 18, 2013
    Date of Patent: October 28, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Junichiro Sakata, Takuya Hirohashi, Hideyuki Kishida
  • Publication number: 20140312345
    Abstract: An object is to provide a thin film transistor having favorable electric characteristics and a semiconductor device including the thin film transistor as a switching element. The thin film transistor includes a gate electrode formed over an insulating surface, a gate insulating film over the gate electrode, an oxide semiconductor film which overlaps with the gate electrode over the gate insulating film and which includes a layer where the concentration of one or a plurality of metals contained in the oxide semiconductor is higher than that in other regions, a pair of metal oxide films formed over the oxide semiconductor film and in contact with the layer, and a source electrode and a drain electrode in contact with the metal oxide films. The metal oxide films are formed by oxidation of a metal contained in the source electrode and the drain electrode.
    Type: Application
    Filed: July 1, 2014
    Publication date: October 23, 2014
    Inventors: Akiharu Miyanaga, Junichiro Sakata, Masayuki Sakakura, Masahiro Takahashi, Hideyuki Kishida, Shunpei Yamazaki
  • Patent number: 8860023
    Abstract: Reducing hydrogen concentration in a channel formation region of an oxide semiconductor is important in stabilizing threshold voltage of a transistor including an oxide semiconductor and improving reliability. Hence, hydrogen is attracted from the oxide semiconductor and trapped in a region of an insulating film which overlaps with a source region and a drain region of the oxide semiconductor. Impurities such as argon, nitrogen, carbon, phosphorus, or boron are added to the region of the insulating film which overlaps with the source region and the drain region of the oxide semiconductor, thereby generating a defect. Hydrogen in the oxide semiconductor is attracted to the defect in the insulating film. The defect in the insulating film is stabilized by the presence of hydrogen.
    Type: Grant
    Filed: April 25, 2013
    Date of Patent: October 14, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Masashi Tsubuku, Yusuke Nonaka, Noritaka Ishihara, Masashi Oota, Hideyuki Kishida
  • Patent number: 8853690
    Abstract: An object is to provide a transistor including an oxide layer which includes Zn and does not include a rare metal such as In or Ga. Another object is to reduce an off current and stabilize electric characteristics in the transistor including an oxide layer which includes Zn. A transistor including an oxide layer including Zn is formed by stacking an oxide semiconductor layer including insulating oxide over an oxide layer so that the oxide layer is in contact with a source electrode layer or a drain electrode layer with the oxide semiconductor layer including insulating oxide interposed therebetween, whereby variation in the threshold voltage of the transistor can be reduced and electric characteristics can be stabilized.
    Type: Grant
    Filed: January 17, 2013
    Date of Patent: October 7, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hiromichi Godo, Hideyuki Kishida
  • Publication number: 20140291675
    Abstract: It is an object to provide a highly reliable semiconductor device including a thin film transistor with stable electric characteristics. In a semiconductor device including an inverted staggered thin film transistor whose semiconductor layer is an oxide semiconductor layer, a buffer layer is provided over the oxide semiconductor layer. The buffer layer is in contact with a channel formation region of the semiconductor layer and source and drain electrode layers. A film of the buffer layer has resistance distribution. A region provided over the channel formation region of the semiconductor layer has lower electrical conductivity than the channel formation region of the semiconductor layer, and a region in contact with the source and drain electrode layers has higher electrical conductivity than the channel formation region of the semiconductor layer.
    Type: Application
    Filed: June 16, 2014
    Publication date: October 2, 2014
    Inventors: Junichiro SAKATA, Takuya HIROHASHI, Hideyuki KISHIDA
  • Publication number: 20140284601
    Abstract: A thin film transistor including an oxide semiconductor with favorable electrical characteristics is provided. The thin film transistor includes a gate electrode provided over a substrate, a gate insulating film provided over the gate electrode, an oxide semiconductor film provided over the gate electrode and on the gate insulating film, a metal oxide film provided on the oxide semiconductor film, and a metal film provided on the metal oxide film. The oxide semiconductor film is in contact with the metal oxide film, and includes a region whose concentration of metal is higher than that of any other region in the oxide semiconductor film (a high metal concentration region). In the high metal concentration region, the metal contained in the oxide semiconductor film may be present as a crystal grain or a microcrystal.
    Type: Application
    Filed: June 6, 2014
    Publication date: September 25, 2014
    Inventors: Akiharu Miyanaga, Junichiro Sakata, Masayuki Sakakura, Masahiro Takahashi, Hideyuki Kishida, Shunpei Yamazaki
  • Patent number: 8816349
    Abstract: By using a conductive layer including Cu as a long lead wiring, increase in wiring resistance is suppressed. Further, the conductive layer including Cu is provided in such a manner that it does not overlap with the oxide semiconductor layer in which a channel region of a TFT is formed, and is surrounded by insulating layers including silicon nitride, whereby diffusion of Cu can be prevented; thus, a highly reliable semiconductor device can be manufactured. Specifically, a display device which is one embodiment of a semiconductor device can have high display quality and operate stably even when the size or definition thereof is increased.
    Type: Grant
    Filed: October 5, 2010
    Date of Patent: August 26, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Jun Koyama, Masahiro Takahashi, Hideyuki Kishida, Akiharu Miyanaga, Junpei Sugao, Hideki Uochi, Yasuo Nakamura
  • Patent number: 8779418
    Abstract: An object is to provide a thin film transistor having favorable electric characteristics and a semiconductor device including the thin film transistor as a switching element. The thin film transistor includes a gate electrode formed over an insulating surface, a gate insulating film over the gate electrode, an oxide semiconductor film which overlaps with the gate electrode over the gate insulating film and which includes a layer where the concentration of one or a plurality of metals contained in the oxide semiconductor is higher than that in other regions, a pair of metal oxide films formed over the oxide semiconductor film and in contact with the layer, and a source electrode and a drain electrode in contact with the metal oxide films. The metal oxide films are formed by oxidation of a metal contained in the source electrode and the drain electrode.
    Type: Grant
    Filed: October 7, 2010
    Date of Patent: July 15, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Akiharu Miyanaga, Junichiro Sakata, Masayuki Sakakura, Masahiro Takahashi, Hideyuki Kishida, Shunpei Yamazaki
  • Patent number: 8779421
    Abstract: It is an object to provide a highly reliable semiconductor device including a thin film transistor with stable electric characteristics. In a semiconductor device including an inverted staggered thin film transistor whose semiconductor layer is an oxide semiconductor layer, a buffer layer is provided over the oxide semiconductor layer. The buffer layer is in contact with a channel formation region of the semiconductor layer and source and drain electrode layers. A film of the buffer layer has resistance distribution. A region provided over the channel formation region of the semiconductor layer has lower electrical conductivity than the channel formation region of the semiconductor layer, and a region in contact with the source and drain electrode layers has higher electrical conductivity than the channel formation region of the semiconductor layer.
    Type: Grant
    Filed: July 18, 2013
    Date of Patent: July 15, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Junichiro Sakata, Takuya Hirohashi, Hideyuki Kishida
  • Patent number: 8766250
    Abstract: A thin film transistor including an oxide semiconductor with favorable electrical characteristics is provided. The thin film transistor includes a gate electrode provided over a substrate, a gate insulating film provided over the gate electrode, an oxide semiconductor film provided over the gate electrode and on the gate insulating film, a metal oxide film provided on the oxide semiconductor film, and a metal film provided on the metal oxide film. The oxide semiconductor film is in contact with the metal oxide film, and includes a region whose concentration of metal is higher than that of any other region in the oxide semiconductor film (a high metal concentration region). In the high metal concentration region, the metal contained in the oxide semiconductor film may be present as a crystal grain or a microcrystal.
    Type: Grant
    Filed: November 19, 2010
    Date of Patent: July 1, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Akiharu Miyanaga, Junichiro Sakata, Masayuki Sakakura, Masahiro Takahashi, Hideyuki Kishida, Shunpei Yamazaki
  • Publication number: 20140142036
    Abstract: The present invention aims to provide a DPP-4 inhibitor that is obtained by using a food as a raw material and that is suitable for oral ingestion from the viewpoints of flavor and absorbability, and a composition for the prevention and/or amelioration of diabetes which contains the DPP-4 inhibitor. The present invention provides a DPP-4 inhibitor obtained by treating an azuki bean or a kidney bean with a microorganism or a proteolytic enzyme produced by the microorganism. In particular, a preferable DPP-4 inhibitor can be obtained by hydrolyzing an azuki bean with a koji mold or a proteolytic enzyme derived from the koji mold to fragment a protein in the azuki bean.
    Type: Application
    Filed: February 3, 2014
    Publication date: May 22, 2014
    Applicant: Kaneka Corporation
    Inventors: Yuji Tominaga, Shinichi Yokota, Hozumi Tanaka, Hideyuki Kishida, Masayasu Kitagawa, Hiroshi Tachi, Toru Ota