Patents by Inventor Hideyuki Kishida

Hideyuki Kishida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120228606
    Abstract: The semiconductor device includes an oxide semiconductor film having a first region and a pair of second regions facing each other with the first region provided therebetween, a gate insulating film over the oxide semiconductor film, and a first electrode overlapping with the first region, over the gate insulating film. The first region is a non-single-crystal oxide semiconductor region including a c-axis-aligned crystal portion. The pair of second regions is an oxide semiconductor region containing dopant and including a plurality of crystal portions.
    Type: Application
    Filed: March 7, 2012
    Publication date: September 13, 2012
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Junichi KOEZUKA, Shinji OHNO, Yuichi SATO, Masahiro TAKAHASHI, Hideyuki KISHIDA
  • Patent number: 8247276
    Abstract: In a thin film transistor, an increase in off current or negative shift of the threshold voltage is prevented. In the thin film transistor, a buffer layer is provided between an oxide semiconductor layer and each of a source electrode layer and a drain electrode layer. The buffer layer includes a metal oxide layer which is an insulator or a semiconductor over a middle portion of the oxide semiconductor layer. The metal oxide layer functions as a protective layer for suppressing incorporation of impurities into the oxide semiconductor layer. Therefore, in the thin film transistor, an increase in off current or negative shift of the threshold voltage can be prevented.
    Type: Grant
    Filed: February 3, 2010
    Date of Patent: August 21, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Toshikazu Kondo, Hideyuki Kishida
  • Publication number: 20120189611
    Abstract: The present invention aims to provide a DPP-4 inhibitor that is obtained by using a food as a raw material and that is suitable for oral ingestion from the viewpoints of flavor and absorbability, and a composition for the prevention and/or amelioration of diabetes which contains the DPP-4 inhibitor. The present invention provides a DPP-4 inhibitor obtained by treating an azuki bean or a kidney bean with a microorganism or a proteolytic enzyme produced by the microorganism. In particular, a preferable DPP-4 inhibitor can be obtained by hydrolyzing an azuki bean with a koji mold or a proteolytic enzyme derived from the koji mold to fragment a protein in the azuki bean.
    Type: Application
    Filed: August 3, 2010
    Publication date: July 26, 2012
    Applicant: Kaneka Corporation
    Inventors: Yuji Tominaga, Shinichi Yokota, Hozumi Tanaka, Hideyuki Kishida, Masayasu Kitagawa, Hiroshi Tachi, Toru Ota
  • Patent number: 8071141
    Abstract: A composition for preventing or ameliorating multiple risk factor syndrome involving visceral fat-type obesity, diabetes mellitus, hyperlipemia and hypertension, which comprises at least one member selected from the group consisting of a licorice hydrophobic extract, a turmeric extract, a clove extract, and a cinnamon extract.
    Type: Grant
    Filed: August 18, 2005
    Date of Patent: December 6, 2011
    Assignee: Kaneka Corporation
    Inventors: Tatsumasa Mae, Misuzu Tsukagawa, Hideyuki Kishida, Mitsuaki Kitano, Mikio Kitahara, Kaku Nakagawa
  • Publication number: 20110215331
    Abstract: An object of the present invention to provide a highly reliable semiconductor device. Another object is to provide a manufacturing method of a highly reliable semiconductor device. Still another object is to provide a semiconductor device having low power consumption. Yet another object is to provide a manufacturing method of a semiconductor device having low power consumption. Furthermore, another object is to provide a semiconductor device which can be manufactured with high mass productivity. Another object is to provide a manufacturing method of a semiconductor device which can be manufactured with high mass productivity. An impurity remaining in an oxide semiconductor layer is removed so that the oxide semiconductor layer is purified to have an extremely high purity. Specifically, after adding a halogen element into the oxide semiconductor layer, heat treatment is performed to remove an impurity from the oxide semiconductor layer. The halogen element is preferably fluorine.
    Type: Application
    Filed: February 25, 2011
    Publication date: September 8, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei YAMAZAKI, Hideyuki KISHIDA
  • Publication number: 20110121289
    Abstract: A thin film transistor including an oxide semiconductor with favorable electrical characteristics is provided. The thin film transistor includes a gate electrode provided over a substrate, a gate insulating film provided over the gate electrode, an oxide semiconductor film provided over the gate electrode and on the gate insulating film, a metal oxide film provided on the oxide semiconductor film, and a metal film provided on the metal oxide film. The oxide semiconductor film is in contact with the metal oxide film, and includes a region whose concentration of metal is higher than that of any other region in the oxide semiconductor film (a high metal concentration region). In the high metal concentration region, the metal contained in the oxide semiconductor film may be present as a crystal grain or a microcrystal.
    Type: Application
    Filed: November 19, 2010
    Publication date: May 26, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Akiharu MIYANAGA, Junichiro SAKATA, Masayuki SAKAKURA, Masahiro TAKAHASHI, Hideyuki KISHIDA, Shunpei YAMAZAKI
  • Publication number: 20110101335
    Abstract: An object is to provide a semiconductor device including an oxide semiconductor with stable electric characteristics can be provided. An insulating layer having many defects typified by dangling bonds is formed over an oxide semiconductor layer with an oxygen-excess mixed region or an oxygen-excess oxide insulating layer interposed therebetween, whereby impurities in the oxide semiconductor layer, such as hydrogen or moisture (a hydrogen atom or a compound including a hydrogen atom such as H2O), are moved through the oxygen-excess mixed region or oxygen-excess oxide insulating layer and diffused into the insulating layer. Thus, the impurity concentration of the oxide semiconductor layer is reduced.
    Type: Application
    Filed: October 26, 2010
    Publication date: May 5, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei YAMAZAKI, Akiharu MIYANAGA, Masahiro TAKAHASHI, Hideyuki KISHIDA, Junichiro SAKATA
  • Publication number: 20110084267
    Abstract: By using a conductive layer including Cu as a long lead wiring, increase in wiring resistance is suppressed. Further, the conductive layer including Cu is provided in such a manner that it does not overlap with the oxide semiconductor layer in which a channel region of a TFT is formed, and is surrounded by insulating layers including silicon nitride, whereby diffusion of Cu can be prevented; thus, a highly reliable semiconductor device can be manufactured. Specifically, a display device which is one embodiment of a semiconductor device can have high display quality and operate stably even when the size or definition thereof is increased.
    Type: Application
    Filed: October 5, 2010
    Publication date: April 14, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei Yamazaki, Jun Koyama, Masahiro Takahashi, Hideyuki Kishida, Akiharu Miyanaga, Junpei Sugao, Hideki Uochi, Yasuo Nakamura
  • Publication number: 20110084266
    Abstract: In a channel protected thin film transistor in which a channel formation region is formed using an oxide semiconductor, an oxide semiconductor layer which is dehydrated or dehydrogenated by a heat treatment is used as an active layer, a crystal region including nanocrystals is included in a superficial portion in the channel formation region, and the rest portion is amorphous or is formed of a mixture of amorphousness/non-crystals and microcrystals, where an amorphous region is dotted with microcrystals. By using an oxide semiconductor layer having such a structure, a change to an n-type caused by entry of moisture or elimination of oxygen to or from the superficial portion and generation of a parasitic channel can be prevented and a contact resistance with a source and drain electrodes can be reduced.
    Type: Application
    Filed: October 4, 2010
    Publication date: April 14, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei Yamazaki, Masayuki Sakakura, Ryosuke Watanabe, Junichiro Sakata, Kengo Akimoto, Akiharu Miyanaga, Takuya Hirohashi, Hideyuki Kishida
  • Publication number: 20110084268
    Abstract: It is an object to provide a semiconductor device typified by a display device having a favorable display quality, in which parasitic resistance generated in a connection portion between a semiconductor layer and an electrode is suppressed and an adverse effect such as voltage drop, a defect in signal wiring to a pixel, a defect in grayscale, and the like due to wiring resistance are prevented. In order to achieve the above object, a semiconductor device according to the present invention may have a structure where a wiring with low resistance is connected to a thin film transistor in which a source electrode and a drain electrode that include metal with high oxygen affinity are connected to an oxide semiconductor layer with a suppressed impurity concentration. In addition, the thin film transistor including the oxide semiconductor may be surrounded by insulating films to be sealed.
    Type: Application
    Filed: October 5, 2010
    Publication date: April 14, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei Yamazaki, Jun Koyama, Masahiro Takahashi, Hideyuki Kishida, Akiharu Miyanaga, Yasuo Nakamura, Junpei Sugao, Hideki Uochi
  • Publication number: 20110084272
    Abstract: An object is to provide a thin film transistor having favorable electric characteristics and a semiconductor device including the thin film transistor as a switching element. The thin film transistor includes a gate electrode formed over an insulating surface, a gate insulating film over the gate electrode, an oxide semiconductor film which overlaps with the gate electrode over the gate insulating film and which includes a layer where the concentration of one or a plurality of metals contained in the oxide semiconductor is higher than that in other regions, a pair of metal oxide films formed over the oxide semiconductor film and in contact with the layer, and a source electrode and a drain electrode in contact with the metal oxide films. The metal oxide films are formed by oxidation of a metal contained in the source electrode and the drain electrode.
    Type: Application
    Filed: October 7, 2010
    Publication date: April 14, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Akiharu Miyanaga, Junichiro Sakata, Masayuki Sakakura, Masahiro Takahashi, Hideyuki Kishida, Shunpei Yamazaki
  • Publication number: 20110084273
    Abstract: One of objects is to provide a semiconductor device with stable electric characteristics, in which an oxide semiconductor is used. The semiconductor device includes a thin film transistor including an oxide semiconductor layer, and a silicon oxide layer over the thin film transistor. The thin film transistor includes a gate electrode layer, a gate insulating layer whose thickness is equal to or larger than 100 nm and equal to or smaller than 350 nm, the oxide semiconductor layer, a source electrode layer and a drain electrode layer. In the thin film transistor, the difference of the threshold voltage value is 1 V or less between before and after performance of a measurement in which the voltage of 30 V or ?30 V is applied to the gate electrode layer at a temperature of 85° C. for 12 hours.
    Type: Application
    Filed: October 7, 2010
    Publication date: April 14, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei Yamazaki, Akiharu Miyanaga, Masahiro Takahashi, Hideyuki Kishida, Junichiro Sakata
  • Publication number: 20110079778
    Abstract: An object is to provide a semiconductor device with stable electric characteristics in which an oxide semiconductor is used. The impurity concentration in the oxide semiconductor layer is reduced in the following manner: a silicon oxide layer including many defects typified by dangling bonds is formed in contact with the oxide semiconductor layer, and an impurity such as hydrogen or moisture (a hydrogen atom or a compound including a hydrogen atom such as H2O) included in the oxide semiconductor layer is diffused into the silicon oxide layer. Further, a mixed region is provided between the oxide semiconductor layer and the silicon oxide layer. The mixed region includes oxygen, silicon, and at least one kind of metal element that is included in the oxide semiconductor.
    Type: Application
    Filed: September 30, 2010
    Publication date: April 7, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei YAMAZAKI, Akiharu MIYANAGA, Masahiro TAKAHASHI, Hideyuki KISHIDA, Junichiro SAKATA
  • Publication number: 20110068335
    Abstract: It is an object to provide a highly reliable semiconductor device with good electrical characteristics and a display device including the semiconductor device as a switching element. In a transistor including an oxide semiconductor layer, a needle crystal group provided on at least one surface side of the oxide semiconductor layer grows in a c-axis direction perpendicular to the surface and includes an a-b plane parallel to the surface, and a portion except for the needle crystal group is an amorphous region or a region in which amorphousness and microcrystals are mixed. Accordingly, a highly reliable semiconductor device with good electrical characteristics can be formed.
    Type: Application
    Filed: September 22, 2010
    Publication date: March 24, 2011
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei YAMAZAKI, Masayuki SAKAKURA, Ryosuke WATANABE, Junichiro SAKATA, Kengo AKIMOTO, Akiharu MIYANAGA, Takuya HIROHASHI, Hideyuki KISHIDA
  • Publication number: 20110062436
    Abstract: To provide a transistor having a favorable electric characteristics and high reliability and a display device including the transistor. The transistor is a bottom-gate transistor formed using an oxide semiconductor for a channel region. An oxide semiconductor layer subjected to dehydration or dehydrogenation through heat treatment is used as an active layer. The active layer includes a first region of a superficial portion microcrystallized and a second region of the rest portion. By using the oxide semiconductor layer having such a structure, a change to an n-type, which is attributed to entry of moisture to the superficial portion or elimination of oxygen from the superficial portion, and generation of a parasitic channel can be suppressed. In addition, contact resistance between the oxide semiconductor layer and source and drain electrodes can be reduced.
    Type: Application
    Filed: September 13, 2010
    Publication date: March 17, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei YAMAZAKI, Masayuki SAKAKURA, Ryosuke WATANABE, Junichiro SAKATA, Kengo AKIMOTO, Akiharu MIYANAGA, Takuya HIROHASHI, Hideyuki KISHIDA
  • Publication number: 20110038959
    Abstract: This invention provides an agent for preventing or ameliorating hyperuricemia comprising, as an active ingredient, an extract of at least one type of plant raw material selected from the group consisting of Artemisia, Saussurea involucrate, chrysanthemum, guava, cudweed (Gnaphalium affine), blue mallow, oregano, Glechoma hederacea, mint, Millettia reticulata, and peanuts obtained with the use of an organic solvent or aqueous organic solvent, Pycnogenol, and/or a chalcone derivative or a glycoside thereof.
    Type: Application
    Filed: January 21, 2009
    Publication date: February 17, 2011
    Inventors: Shinichi Honda, Hozumi Tanaka, Hideyuki Kishida, Masayasu Kitagawa
  • Publication number: 20100284983
    Abstract: A coenzyme Q10-containing water soluble composition comprises coenzyme Q10, a hydrophilic polyglycerol fatty acid ester, a lipophilic sucrose fatty acid ester and an aqueous phase component and a process for producing the same are disclosed. A coenzyme Q10-containing water-soluble dry powder can be obtained by drying the above-mentioned coenzyme Q10-containing water soluble composition. A food, functional food, beverage, pharmaceutical product, quasi drug, cosmetic, or animal food can be obtained by using the above-mentioned coenzyme Q10-containing water soluble composition or the above-mentioned coenzyme Q10-containing water-soluble dry powder. The coenzyme Q10-containing water soluble composition has a high bioavailability, and maintains a stable emulsion form for a long period of time from refrigeration temperature to room temperature and allows efficient supply.
    Type: Application
    Filed: June 14, 2006
    Publication date: November 11, 2010
    Applicant: Kaneka Coerporation
    Inventors: Toshinori Ikehara, Hideyuki Kishida
  • Publication number: 20100264412
    Abstract: An object is to provide a transistor including an oxide layer which includes Zn and does not include a rare metal such as In or Ga. Another object is to reduce an off current and stabilize electric characteristics in the transistor including an oxide layer which includes Zn. A transistor including an oxide layer including Zn is formed by stacking an oxide semiconductor layer including insulating oxide over an oxide layer so that the oxide layer is in contact with a source electrode layer or a drain electrode layer with the oxide semiconductor layer including insulating oxide interposed therebetween, whereby variation in the threshold voltage of the transistor can be reduced and electric characteristics can be stabilized.
    Type: Application
    Filed: April 13, 2010
    Publication date: October 21, 2010
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei YAMAZAKI, Hiromichi GODO, Hideyuki KISHIDA
  • Publication number: 20100244020
    Abstract: An object of an embodiment of the present invention is to provide a semiconductor device provided with a thin film transistor which includes an oxide semiconductor layer and has high electric characteristics. The semiconductor device includes a gate electrode over an insulating surface, an oxide semiconductor layer including silicon oxide, an insulating layer between the gate electrode and the oxide semiconductor layer, and source and drain regions between the oxide semiconductor layer including silicon oxide and source and drain electrode layers. The source and drain regions are formed using a degenerate oxide semiconductor material or a degenerate oxynitride material.
    Type: Application
    Filed: March 12, 2010
    Publication date: September 30, 2010
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Junichiro SAKATA, Hideyuki KISHIDA, Hiroki OHARA, Toshinari SASAKI, Shunpei YAMAZAKI
  • Publication number: 20100224873
    Abstract: It is an object to provide a highly reliable semiconductor device including a thin film transistor with stable electric characteristics. In a semiconductor device including an inverted staggered thin film transistor whose semiconductor layer is an oxide semiconductor layer, a buffer layer is provided over the oxide semiconductor layer. The buffer layer is in contact with a channel formation region of the semiconductor layer and source and drain electrode layers. A film of the buffer layer has resistance distribution. A region provided over the channel formation region of the semiconductor layer has lower electrical conductivity than the channel formation region of the semiconductor layer, and a region in contact with the source and drain electrode layers has higher electrical conductivity than the channel formation region of the semiconductor layer.
    Type: Application
    Filed: March 4, 2010
    Publication date: September 9, 2010
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Junichiro SAKATA, Takuya HIROHASHI, Hideyuki KISHIDA