Patents by Inventor Hideyuki Nishizawa

Hideyuki Nishizawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230171972
    Abstract: An organic molecular memory of embodiments includes: a first electrode; a second electrode; an organic molecular layer provided between the first electrode and the second electrode, extending in a first direction from the first electrode toward the second electrode, and containing a first molecule and a second molecule provided between the first molecule and the second electrode; and a third electrode facing the second molecule.
    Type: Application
    Filed: June 14, 2022
    Publication date: June 1, 2023
    Applicant: Kioxia Corporation
    Inventors: Kenji NAKAMURA, Hideyuki NISHIZAWA
  • Patent number: 10559627
    Abstract: A memory device according to an embodiment includes a first conductive layer, a second conductive layer, a variable resistance layer disposed between the first conductive layer and the second conductive layer, and an organic molecular layer disposed between the variable resistance layer and the second conductive layer and containing organic molecules. Each of the organic molecules includes a first fused polycyclic unit having a first HOMO level, a second fused polycyclic unit having a second HOMO level higher in energy than the first HOMO level, and a third fused polycyclic unit disposed between the first fused polycyclic unit and the second fused polycyclic unit. The third fused polycyclic unit has a third HOMO level higher in energy than the first HOMO level and the second HOMO level.
    Type: Grant
    Filed: September 18, 2017
    Date of Patent: February 11, 2020
    Assignee: Toshiba Memory Corporation
    Inventors: Kenji Nakamura, Hideyuki Nishizawa
  • Publication number: 20190293596
    Abstract: The gas sensing method of an embodiment includes: a step of supplying measured gas to a capacitor including a first electrode, a dielectric formed to be electrically connected to the first electrode, a graphene formed on the dielectric, and a second electrode formed to be electrically connected to the graphene; and a step of measuring a capacitance of the capacitor after the measured gas is brought into contact with the graphene.
    Type: Application
    Filed: September 14, 2018
    Publication date: September 26, 2019
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Hiroko NAKAMURA, Hideyuki NISHIZAWA, Kenji NAKAMURA
  • Publication number: 20180277603
    Abstract: A memory device according to an embodiment includes a first conductive layer, a second conductive layer, a variable resistance layer disposed between the first conductive layer and the second conductive layer, and an organic molecular layer disposed between the variable resistance layer and the second conductive layer and containing organic molecules. Each of the organic molecules includes a first fused polycyclic unit having a first HOMO level, a second fused polycyclic unit having a second HOMO level higher in energy than the first HOMO level, and a third fused polycyclic unit disposed between the first fused polycyclic unit and the second fused polycyclic unit. The third fused polycyclic unit has a third HOMO level higher in energy than the first HOMO level and the second HOMO level.
    Type: Application
    Filed: September 18, 2017
    Publication date: September 27, 2018
    Applicant: Toshiba Memory Corporation
    Inventors: Kenji NAKAMURA, Hideyuki NISHIZAWA
  • Patent number: 10032788
    Abstract: A semiconductor memory device according to an embodiment includes a semiconductor layer, a control gate electrode, and an organic molecular layer provided between the semiconductor layer and the control gate electrode, and the organic molecular layer having an organic molecule that includes a molecular structure described by a molecular formula (1):
    Type: Grant
    Filed: March 9, 2016
    Date of Patent: July 24, 2018
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Shigeki Hattori, Masaya Terai, Hideyuki Nishizawa, Koji Asakawa
  • Publication number: 20170271603
    Abstract: A semiconductor memory device of an embodiment includes a semiconductor layer, a gate electrode, and a charge storing layer provided between the semiconductor layer and the gate electrode. The charge storing layer includes polyoxometalates that contain copper (Cu) and tungsten (W).
    Type: Application
    Filed: December 14, 2016
    Publication date: September 21, 2017
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Shigeki HATTORI, Masaya TERAI, Hideyuki NISHIZAWA, Koji ASAKAWA
  • Patent number: 9685321
    Abstract: A semiconductor memory device in an embodiment includes a semiconductor layer, a control gate electrode, an organic molecular layer provided between the semiconductor layer and the control gate electrode, and a first insulating layer provided between the organic molecular layer and the semiconductor layer, the first insulating layer having a first layer containing alkyl chains and a second layer containing siloxane, the second layer being provided between the first layer and the organic molecular layer.
    Type: Grant
    Filed: March 9, 2016
    Date of Patent: June 20, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masaya Terai, Shigeki Hattori, Hideyuki Nishizawa, Koji Asakawa
  • Patent number: 9548373
    Abstract: A nonvolatile semiconductor memory device according to an embodiment includes: a semiconductor layer; a control gate electrode; and an organic molecular layer, which is provided between the semiconductor layer and the control gate electrode, and has organic molecules including a molecular structure described by a molecular formula (1).
    Type: Grant
    Filed: September 1, 2015
    Date of Patent: January 17, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shigeki Hattori, Tsukasa Tada, Masaya Terai, Hideyuki Nishizawa, Koji Asakawa, Yoshiaki Fukuzumi
  • Patent number: 9543536
    Abstract: An organic molecular memory in an embodiment includes a first conducive layer, a second conductive layer, and an organic molecular layer provided between the first conductive layer and the second conductive layer, the organic molecular layer having an organic molecule, the organic molecule having a linker group bonded to the first conductive layer, a ? conjugated chain bonded to the linker group, and a phenyl group bonded to the ? conjugated chain opposite to the linker group and facing the second conductive layer, the ? conjugated chain including electron-accepting groups or electron-donating groups arranged in line asymmetry with respect to a bonding direction of the ? conjugate chain, the phenyl group having substituents R0, R1, R2, R3, and R4 as shown in the following formula, the substituent R0 being an electron-accepting group or an electron-donating group.
    Type: Grant
    Filed: January 5, 2016
    Date of Patent: January 10, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yusuke Tanaka, Hideyuki Nishizawa, Shigeki Hattori, Koji Asakawa
  • Patent number: 9536898
    Abstract: A nonvolatile semiconductor memory device of an embodiment includes: a semiconductor layer; a tunnel insulating film that is formed on the semiconductor layer and includes a first organic molecular film including first organic molecules each having an alkyl molecular chain as the main chain; a charge storage layer formed on the tunnel insulating film, the charge storage layer being made of an inorganic material; a block insulating film formed on the charge storage layer; and a control gate electrode formed on the block insulating film.
    Type: Grant
    Filed: April 28, 2016
    Date of Patent: January 3, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Misako Morota, Hideyuki Nishizawa, Masaya Terai, Shigeki Hattori, Koji Asakawa
  • Patent number: 9515195
    Abstract: An organic molecular memory of an embodiment includes a first conductive layer, a second conductive layer, and an organic molecular layer interposed between the first conductive layer and the second conductive layer, the organic molecular layer including variable-resistance molecular chains or charge-storage molecular chains, the variable-resistance molecular chains or the charge-storage molecular chains having electron-withdrawing substituents.
    Type: Grant
    Filed: May 4, 2015
    Date of Patent: December 6, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hideyuki Nishizawa, Shigeki Hattori, Masaya Terai, Satoshi Mikoshiba, Koji Asakawa, Tsukasa Tada
  • Publication number: 20160284868
    Abstract: A semiconductor memory device in an embodiment includes a semiconductor layer, a control gate electrode, an organic molecular layer provided between the semiconductor layer and the control gate electrode, and a first insulating layer provided between the organic molecular layer and the semiconductor layer, the first insulating layer having a first layer containing alkyl chains and a second layer containing siloxane, the second layer being provided between the first layer and the organic molecular layer.
    Type: Application
    Filed: March 9, 2016
    Publication date: September 29, 2016
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Masaya TERAI, Shigeki HATTORI, Hideyuki NISHIZAWA, Koji ASAKAWA
  • Publication number: 20160284869
    Abstract: A semiconductor memory device according to an embodiment includes a semiconductor layer, a control gate electrode, and an organic molecular layer provided between the semiconductor layer and the control gate electrode, and the organic molecular layer having an organic molecule that includes a molecular structure described by a molecular formula (1):
    Type: Application
    Filed: March 9, 2016
    Publication date: September 29, 2016
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: SHIGEKI HATTORI, MASAYA TERAI, HIDEYUKI NISHIZAWA, KOJI ASAKAWA
  • Patent number: 9450065
    Abstract: According to one embodiment, a nonvolatile semiconductor memory device includes a first stacked structure body, a first semiconductor layer, a first organic film, a first semiconductor-side insulating film, and a first electrode-side insulating film. The first stacked structure body includes a plurality of first electrode films stacked along a first direction and a first inter-electrode insulating film provided between the first electrode films. The first semiconductor layer is opposed to side faces of the first electrode films. The first organic film is provided between the side faces of the first electrode films and the first semiconductor layer and containing an organic compound. The first semiconductor-side insulating film is provided between the first organic film and the first semiconductor layer. The first electrode-side insulating film provided between the first organic film and the side faces of the first electrode films.
    Type: Grant
    Filed: September 25, 2014
    Date of Patent: September 20, 2016
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Shigeki Hattori, Reika Ichihara, Masaya Terai, Hideyuki Nishizawa, Tsukasa Tada, Koji Asakawa, Hiroyuki Fuke, Satoshi Mikoshiba, Yoshiaki Fukuzumi, Hideaki Aochi
  • Publication number: 20160240556
    Abstract: A nonvolatile semiconductor memory device of an embodiment includes: a semiconductor layer; a tunnel insulating film that is formed on the semiconductor layer and includes a first organic molecular film including first organic molecules each having an alkyl molecular chain as the main chain; a charge storage layer formed on the tunnel insulating film, the charge storage layer being made of an inorganic material; a block insulating film formed on the charge storage layer; and a control gate electrode formed on the block insulating film.
    Type: Application
    Filed: April 28, 2016
    Publication date: August 18, 2016
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Misako Morota, Hideyuki Nishizawa, Masaya Terai, Shigeki Hattori, Koji Asakawa
  • Patent number: 9412944
    Abstract: An organic molecular memory in an embodiment includes a first electrode having a first work function; a second electrode having a second work function; and an organic molecular layer provided between the first electrode and the second electrode, the organic molecular layer containing a first organic molecule chemically bonded to the first electrode, the first organic molecule having a resistance-change type molecular chain, and the first organic molecule having a first energy level higher than the first work function, and a second organic molecule chemically bonded to the second electrode and the second organic molecule having a second energy level higher than the second work function and lower than the first energy level.
    Type: Grant
    Filed: September 2, 2015
    Date of Patent: August 9, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hideyuki Nishizawa, Yusuke Tanaka, Koji Asakawa, Yutaka Majima
  • Patent number: 9412943
    Abstract: An organic molecular memory in an embodiment includes a first conductive layer; a second conductive layer; and an organic molecular layer provided between the first conductive layer and the second conductive layer, the organic molecular layer including an organic molecule having an oligophenylene ethynylene backbone, the oligophenylene ethynylene backbone including three or more benzene rings, and the oligophenylene ethynylene backbone including two fluorine atoms added in ortho positions or meta positions of one of the benzene rings other than benzene rings at both ends.
    Type: Grant
    Filed: September 1, 2015
    Date of Patent: August 9, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Koji Asakawa, Yutaka Majima, Hideyuki Nishizawa, Yusuke Tanaka, Shigeki Hattori
  • Patent number: 9378962
    Abstract: A nonvolatile semiconductor storage device includes a semiconductor layer, a first insulating film formed on the semiconductor layer, a charge storage layer formed on the first insulating film and having fine metal grains, a second insulating film formed on the charge storage layer, and a gate electrode formed on the second insulating film. During a write operation, a differential voltage is applied across the gate electrode and the semiconductor layer to place the gate electrode at a lower voltage than the semiconductor layer and cause a positive electric charge to be stored in the charge storage layer.
    Type: Grant
    Filed: August 31, 2012
    Date of Patent: June 28, 2016
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Shigeki Hattori, Masakazu Yamagiwa, Masaya Terai, Hideyuki Nishizawa, Koji Asakawa, Yoshiaki Fukuzumi
  • Publication number: 20160164015
    Abstract: An organic molecular memory in an embodiment includes a first conducive layer, a second conductive layer, and an organic molecular layer provided between the first conductive layer and the second conductive layer, the organic molecular layer having an organic molecule, the organic molecule having a linker group bonded to the first conductive layer, a ? conjugated chain bonded to the linker group, and a phenyl group bonded to the ? conjugated chain opposite to the linker group and facing the second conductive layer, the ? conjugated chain including electron-accepting groups or electron-donating groups arranged in line asymmetry with respect to a bonding direction of the ? conjugate chain, the phenyl group having substituents R0, R1, R2, R3, and R4 as shown in the following formula, the substituent R0 being an electron-accepting group or an electron-donating group.
    Type: Application
    Filed: January 5, 2016
    Publication date: June 9, 2016
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Yusuke Tanaka, Hideyuki Nishizawa, Shigeki Hattori, Koji Asakawa
  • Patent number: 9356111
    Abstract: A nonvolatile semiconductor memory device of an embodiment includes: a semiconductor layer; a tunnel insulating film that is formed on the semiconductor layer and includes a first organic molecular film including first organic molecules each having an alkyl molecular chain as the main chain; a charge storage layer formed on the tunnel insulating film, the charge storage layer being made of an inorganic material; a block insulating film formed on the charge storage layer; and a control gate electrode formed on the block insulating film.
    Type: Grant
    Filed: October 20, 2014
    Date of Patent: May 31, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Misako Morota, Hideyuki Nishizawa, Masaya Terai, Shigeki Hattori, Koji Asakawa