Patents by Inventor Hideyuki Nishizawa

Hideyuki Nishizawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20130242670
    Abstract: A nonvolatile semiconductor storage device includes a semiconductor layer, a first insulating film formed on the semiconductor layer, a charge storage layer formed on the first insulating film and having fine metal grains, a second insulating film formed on the charge storage layer, and a gate electrode formed on the second insulating film. During a write operation, a differential voltage is applied across the gate electrode and the semiconductor layer to place the gate electrode at a lower voltage than the semiconductor layer and cause a positive electric charge to be stored in the charge storage layer.
    Type: Application
    Filed: August 31, 2012
    Publication date: September 19, 2013
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Shigeki Hattori, Masakazu Yamagiwa, Masaya Terai, Hideyuki Nishizawa, Koji Asakawa, Yoshiaki Fukuzumi
  • Publication number: 20130234089
    Abstract: An organic molecular memory of an embodiment includes: a first conductive layer; a second conductive layer; and an organic molecular layer that is provided between the first conductive layer and the second conductive layer, and contains an organic molecule selected from a group of molecules that simultaneously satisfy the following conditions (I) and (II) in a molecular system having a molecular frame with a ?-electron system spreading along the molecular axis: (I) one of the highest occupied molecular orbital (HOMO) and the lowest unoccupied molecular orbital (LUMO) is delocalized along the molecular axis, and the other one is localized with respect to the molecular axis; and (II) the value of the energy level of the highest occupied molecular orbital (HOMO) is ?5.75 eV or higher.
    Type: Application
    Filed: September 4, 2012
    Publication date: September 12, 2013
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Tsukasa TADA, Hideyuki Nishizawa
  • Publication number: 20130081683
    Abstract: The present invention provides a photoelectric conversion element having high efficiency in propagating carrier excitation by use of enhanced electric fields. The photoelectric conversion element comprises a photoelectric conversion layer including two or more laminated semiconductor layers placed between two electrode layers, and is characterized by having an electric field enhancing layer placed between the semiconductor layers in the photoelectric conversion layer. The electric field enhancing layer is provided with a metal-made minute structure, and the minute structure is, for example, a porous membrane or a group of nano-objects such as very small spheres.
    Type: Application
    Filed: September 27, 2012
    Publication date: April 4, 2013
    Inventors: Kumi MASUNAGA, Akira FUJIMOTO, Eishi TSUTSUMI, Koji ASAKAWA, Tsutomu NAKANISHI, Hideyuki NISHIZAWA, Ryota KITAGAWA
  • Patent number: 8390066
    Abstract: According to an embodiment, a semiconductor memory device capable of stably operating even when an element is shrunk is provided. The semiconductor memory device of the embodiment includes: first and second diodes serially connected between power sources of two different potentials, formed by nanowires, and exhibiting negative differential resistances; and a select transistor connected between the first diode and the second diode. The nanowires are preferably silicon nanowires. The thickness of the silicon nanowires is preferably 8 nm or less.
    Type: Grant
    Filed: September 14, 2010
    Date of Patent: March 5, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hideyuki Nishizawa, Satoshi Itoh
  • Publication number: 20120241713
    Abstract: An organic molecular memory of an embodiment includes a first conductive layer, a second conductive layer, and an organic molecular layer interposed between the first conductive layer and the second conductive layer, the organic molecular layer including charge-storage molecular chains or variable-resistance molecular chains, the charge-storage molecular chains or the variable-resistance molecular chains including fused polycyclic groups.
    Type: Application
    Filed: March 21, 2012
    Publication date: September 27, 2012
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Hideyuki NISHIZAWA, Reiko YOSHIMURA, Tsukasa TADA, Shigeki HATTORI, Masaya TERAI, Satoshi MIKOSHIBA, Koji ASAKAWA
  • Publication number: 20120228576
    Abstract: A storage device includes: a plurality of first electrode wirings; a plurality of second electrode wirings which cross the first electrode wirings; a via plug which is formed between the second electrode wiring and the two adjacent first electrode wirings, and in which a maximum diameter of a bottom surface opposing the first electrode wirings in a direction vertical to a direction in which the first electrode wirings stretch is smaller than a length corresponding to a pitch of the first electrode wiring plus a width of the first electrode wirings; a first storage element which is formed between the via plug and one of the two first electrode wirings; and a second storage element which is formed between the via plug and the other one of the two first electrode wirings.
    Type: Application
    Filed: September 20, 2011
    Publication date: September 13, 2012
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Koji Asakawa, Shigeki Hattori, Hideyuki Nishizawa, Satoshi Mikoshiba, Reika Ichihara, Masaya Terai
  • Publication number: 20120228694
    Abstract: A semiconductor device according to an embodiment, includes a dielectric film and an Si semiconductor part. The dielectric film is formed by using one of oxide, nitride and oxynitride. The Si semiconductor part is arranged below the dielectric film, having at least one element of sulfur (S), selenium (Se), and tellurium (Te) present in an interface with the dielectric film, and formed by using silicon (Si).
    Type: Application
    Filed: August 23, 2011
    Publication date: September 13, 2012
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Tatsuo SHIMIZU, Satoshi Itoh, Hideyuki Nishizawa
  • Publication number: 20120112171
    Abstract: According to one embodiment, a nonvolatile semiconductor memory device includes a first stacked structure body, a first semiconductor layer, a first organic film, a first semiconductor-side insulating film, and a first electrode-side insulating film. The first stacked structure body includes a plurality of first electrode films stacked along a first direction and a first inter-electrode insulating film provided between the first electrode films. The first semiconductor layer is opposed to side faces of the first electrode films. The first organic film is provided between the side faces of the first electrode films and the first semiconductor layer and containing an organic compound. The first semiconductor-side insulating film is provided between the first organic film and the first semiconductor layer. The first electrode-side insulating film provided between the first organic film and the side faces of the first electrode films.
    Type: Application
    Filed: September 16, 2011
    Publication date: May 10, 2012
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Shigeki Hattori, Reika Ichihara, Masaya Terai, Hideyuki Nishizawa, Tsukasa Tada, Koji Asakawa, Hiroyuki Fuke, Satoshi Mikoshiba, Yoshiaki Fukuzumi, Hideaki Aochi
  • Publication number: 20120042946
    Abstract: The embodiment provides a solar cell and a manufacturing process thereof. The solar cell is equipped with an electrode on the light incident surface side; and the electrode has both low resistivity and high transparency, can efficiently utilize solar light for excitation of carriers, and can be made of inexpensive materials. The solar cell comprises a photoelectric conversion layer, a first electrode layer arranged on the light incident surface side, and a second electrode layer arranged opposed to the first electrode layer. The first electrode layer has a thickness in the range of 10 to 200 nm, and has plural penetrating openings. Each of the individual openings occupies an area in the range of 80 nm2 to 0.8 ?m2, and the aperture ratio thereof is in the range 10 to 66%.
    Type: Application
    Filed: August 24, 2011
    Publication date: February 23, 2012
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Kumi Masunaga, Akira Fujimoto, Tsutomu Nakanishi, Eishi Tsutsumi, Ryota Kitagawa, Koji Asakawa, Hideyuki Nishizawa
  • Publication number: 20110220876
    Abstract: According to an embodiment, a semiconductor memory device capable of stably operating even when an element is shrunk is provided. The semiconductor memory device of the embodiment includes: first and second diodes serially connected between power sources of two different potentials, formed by nanowires, and exhibiting negative differential resistances; and a select transistor connected between the first diode and the second diode. The nanowires are preferably silicon nanowires. The thickness of the silicon nanowires is preferably 8 nm or less.
    Type: Application
    Filed: September 14, 2010
    Publication date: September 15, 2011
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Hideyuki Nishizawa, Satoshi Itoh
  • Patent number: 8014188
    Abstract: An electric element includes a pair of electrodes; and a plurality of carbon nanotubes of three-dimensional network structure which are located between the pair of electrodes. The electric element can be applied for a memory element and the like.
    Type: Grant
    Filed: March 20, 2009
    Date of Patent: September 6, 2011
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yumiko Oyasato, Hideyuki Nishizawa, Kenji Sano
  • Publication number: 20100236619
    Abstract: The present invention provides a light transmission type solar cell excellent in both power generation efficiency and light transparency, and also provides a method for producing that solar cell. The solar cell of the present invention comprises a photoelectric conversion layer, a light-incident side electrode layer, and a counter electrode layer. The incident side electrode layer is provided with plural openings bored through the layer, and has a thickness of 10 nm to 200 nm. Each of the openings occupies an area of 80 nm2 to 0.8 ?m2, and the opening ratio is in the range of 10% to 66%. The transmittance of the whole cell is 5% or more at 700 nm wavelength. The incident side electrode layer can be formed by etching fabrication with a stamper. In the etching fabrication, a mono-particle layer of fine particles or a dot pattern formed by self-assembled block copolymer can be used as a mask.
    Type: Application
    Filed: February 4, 2010
    Publication date: September 23, 2010
    Applicant: KABUSHI KAISHA TOSHIBA
    Inventors: Eishi TSUTSUMI, Kumi Masunaga, Ryota Kitagawa, Tsutomu Nakanishi, Akira Fujimoto, Hideyuki Nishizawa, Koji Asakawa
  • Publication number: 20100236620
    Abstract: According to one aspect of the present invention, there is provided a thin film solar cell comprising a substrate, a photoelectric conversion layer formed on said substrate, said photoelectric conversion layer having a thickness of 1 ?m or less, and said photoelectric conversion layer comprising a p-type semiconductor layer, an n-type semiconductor layer, and are i-type semiconductor layer placed between said p-type semiconductor layer and said n-type semiconductor layer, a light-incident side electrode layer formed on a light-incident surface of said photoelectric conversion layer and a counter electrode layer formed on the surface opposite to the light-incident surface. Said light-incident side electrode layer has plural openings bored though said layer, and the thickness thereof is in the range of 10 nm to 200 nm. Each of said openings occupies an area of 80 nm2 to 0.8 ?m2. The opening ratio is in the range of 10% to 66%.
    Type: Application
    Filed: February 16, 2010
    Publication date: September 23, 2010
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Tsutomu NAKANISHI, Eishi Tsutsumi, Akira Fujimoto, Kumi Masunaga, Ryota Kitagawa, Koji Asakawa, Hideyuki Nishizawa
  • Patent number: 7732806
    Abstract: A refractive index variable element has a structure including a solid matrix, and one or more types of quantum dots dispersed in the solid matrix and having discrete occupied and unoccupied electron energy levels. The quantum dots perform a function of generating a pair of positive and negative charges upon irradiation with light, a function of trapping a positive charge, and a function of trapping a negative charge. The quantum dots performing the function of trapping a negative charge are selected from the group consisting of a combination of a negatively charged accepter and a positively charged atom, where the outermost electron shell of the positively charged atom is fully filled with electrons so that an additional electron occupies an upper different shell orbital when receives an electron, a metal chelate complex, and metallocene and derivatives thereof.
    Type: Grant
    Filed: May 26, 2006
    Date of Patent: June 8, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Reiko Yoshimura, Hideyuki Nishizawa, Kenji Todori, Ko Yamada, Fumihiko Aiga, Tsukasa Tada
  • Publication number: 20100124096
    Abstract: An electric element includes a pair of electrodes; and a plurality of carbon nanotubes of three-dimensional network structure which are located between the pair of electrodes. The electric element can be applied for a memory element and the like.
    Type: Application
    Filed: March 20, 2009
    Publication date: May 20, 2010
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Yumiko OYASATO, Hideyuki Nishizawa, Kenji Sano
  • Patent number: 7626910
    Abstract: The optical information recording medium according to the present invention includes a transparent substrate having a first surface and a second surface, a recording layer that is arranged on the first surface of the transparent substrate, and a reflection layer arranged on the second surface of the transparent substrate. A hologram is recorded in the recording layer when a signal light and a reference light are incident from an incident side opposite to the transparent substrate. An optical density of the recording layer corresponding to the signal light decreases from the incident side toward the transparent substrate.
    Type: Grant
    Filed: March 10, 2004
    Date of Patent: December 1, 2009
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Akiko Hirao, Hisashi Yamada, Kazuki Matsumoto, Hideyuki Nishizawa, Katsutaro Ichihara
  • Patent number: 7359306
    Abstract: Provided is a holographic recording medium including a recording layer in which information is to be holographically recorded, and a light-shielding layer which faces a main surface of the recording layer. The transmittance of the light-shielding layer for a recording light is increased on increasing intensity of the recording light. Alternatively, the light-shielding layer selectively transmits the recording light.
    Type: Grant
    Filed: February 9, 2004
    Date of Patent: April 15, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kazuki Matsumoto, Katsutaro Ichihara, Akiko Hirao, Hideyuki Nishizawa
  • Patent number: 7297449
    Abstract: There is provided an optical recording medium comprising a recording layer containing a charge-generating material capable of generating a first electric charge and a second electric charge by beam irradiation, the second electric charge having a different polarity from that of the first electric charge, a charge-transport material enabling at least the first electric charge to be transported to isolate the first electric charge and the second electric charge, and a trapping material retaining the first electric charge. The optical characteristics of the recording layer is changed in accordance with changes in spatial distribution of the first and second electric charges, and the trapping material is provided with a conjugated system and with at least one nitrogen-containing heterocyclic group, and bonded through an unsaturated carbon atom of the heterocyclic group to the conjugated system.
    Type: Grant
    Filed: April 21, 2006
    Date of Patent: November 20, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takayuki Tsukamoto, Akiko Hirao, Kazuki Matsumoto, Hideyuki Nishizawa
  • Patent number: 7270916
    Abstract: Disclosed is a recording medium comprising a recording layer including a photo-acid generating agent that generates an acid upon irradiation with an actinic radiation and a polymer having a polymerizable substituent group bonded to a main chain of the polymer via a functional group that cleaves in the presence of the acid.
    Type: Grant
    Filed: June 17, 2004
    Date of Patent: September 18, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Naoko Kihara, Urara Ichihara, legal representative, Akiko Hirao, Kazuki Matsumoto, Hideyuki Nishizawa, Katsutaro Ichihara, deceased
  • Publication number: 20060279833
    Abstract: A refractive index variable element has a structure including a solid matrix, and one or more types of quantum dots dispersed in the solid matrix and having discrete occupied and unoccupied electron energy levels. The quantum dots perform a function of generating a pair of positive and negative charges upon irradiation with light, a function of trapping a positive charge, and a function of trapping a negative charge. The quantum dots performing the function of trapping a negative charge are selected from the group consisting of a combination of a negatively charged accepter and a positively charged atom, where the outermost electron shell of the positively charged atom is fully filled with electrons so that an additional electron occupies an upper different shell orbital when receives an electron, a metal chelate complex, and metallocene and derivatives thereof.
    Type: Application
    Filed: May 26, 2006
    Publication date: December 14, 2006
    Inventors: Reiko Yoshimura, Hideyuki Nishizawa, Kenji Todori, Ko Yamada, Fumihiko Aiga, Tsukasa Tada