Abstract: Forming of a first silicon oxide film is started on an internal surface of a trench formed on a surface or upwardly of a semiconductor substrate according to an HDP technique. Then, deposition of the first silicon oxide film stops before an opening of the trench closes. Further, the first silicon oxide film deposited in the vicinity of an opening is etched, and a second silicon oxide film is formed on the first silicon oxide film deposited on the bottom of the trench according to the HDP technique. In this manner, the first and second silicon oxide films can be laminated on the bottom of the trench.

Abstract: In a nonvolatile semiconductor storage device which is electrically writable and erasable, a silicon substrate, a plurality of element isolation portions which project from the silicon substrate and are disposed at a predetermined interval, floating electrodes disposed between the isolation portions, and a control electrode laminated on the isolation portions and the floating electrodes are provided, and an interval between the adjacent floating electrodes is formed greater at the side away from the silicon substrate than at the silicon substrate side.

Abstract: A semiconductor memory device having a gate insulation film, comprising a semiconductor substrate; a memory cell array formed on the semiconductor substrate, the memory cell array including a plurality of memory cell transistors, each of which has the gate insulation film; a first interlayer insulation film covered the memory cell array and including deuterium; a silicon nitride layer formed above the first interlayer insulation film; and a second interlayer insulation film formed above the silicon nitride layer, and including deuterium, a density of deuterium in the first interlayer insulation film being higher than that of deuterium in the second interlayer insulation film.

Abstract: A semiconductor device exhibits a stable driving force and high performance reliability. The semiconductor device has at least one transistor having a gate insulating film formed on a element region in a semiconductor substrate, a gate electrode formed on the gate insulating film, and a diffused layer in element regions on both sides of the gate electrode. The device also has a barrier insulating film formed so as to cover the transistor and the diffused layer. The height from a surface of the semiconductor substrate to the barrier insulating film is greater than the height from the surface, of the interface between the gate insulating film and the gate electrode.

Abstract: A thermal nitride film is formed as a gate insulating film on a silicon substrate, and after a gate electrode material is formed on the insulating film, it is patterned to form gate electrodes. After processing the electrodes, part of the gate insulating film other than a portion thereof which lies under the gate electrodes is removed. Further, an insulating film (a post oxidation film) is formed on side walls and upper surfaces of the stacked gate structures and the exposed main surface of the silicon substrate by use of thermal oxidation method.

Abstract: A nonvolatile semiconductor memory device having a plurality of electrically rewritable nonvolatile memory cells connected in series together is disclosed. A select gate transistor is connected in series to the serial combination of memory cells. A certain one of the memory cells which is located adjacent to the select gate transistor is for use as a dummy cell. This dummy cell is not used for data storage. During data erasing, the dummy cell is applied with the same bias voltage as that for the other memory cells.

Abstract: A nonvolatile semiconductor memory device includes memory cell transistors, peripheral transistors, first post-oxidation films provided on the gate electrode of all of the memory cell transistors, second post-oxidation films provided on the gate electrode of all of the peripheral transistors, first insulating films provided on the first post-oxidation films and covering a side surface of the gate electrode of all of the memory cell transistors and second insulating films provided on the second post-oxidation films and covering a side surface of the gate electrode of all of the peripheral transistors. The first and second insulating films are harder for an oxidizing agent to pass therethrough than a silicon oxide film, and the first and second insulating films are oxidized.

Abstract: A semiconductor device comprises a non-volatile memory including a memory cell array, element isolating regions, a second trench and a word line. The memory cell array is constituted by memory cells which have floating electrodes and are arranged in the shape of a matrix on a semiconductor substrate. Each of the element isolating regions has a first trench formed in the semiconductor substrate and between memory cells adjacent to each other along a gate width direction, and an isolating filler filled in the first trench. The second trench is formed in the isolating filler and between the floating electrodes of the memory cells adjacent to each other along the gate width direction, and is narrow at the bottom thereof. The word line is connected to the memory cells, buried in the second trenches and extending along the gate width direction.

Abstract: A semiconductor memory device includes a semiconductor substrate, an element isolation region formed in the semiconductor substrate and including a thick element isolating insulation film, for isolating an element region, a first gate electrode provided on the element region in the semiconductor substrate in self-alignment with the element isolation region, a second gate electrode provided on the first gate electrode with an insulation film interposed therebetween, and a resistance element formed on the element isolation region, the resistance element and the second gate electrode being formed of the same conductive film.

Abstract: A semiconductor device exhibits a stable driving force and high performance reliability. The semiconductor device has at least one transistor having a gate insulating film formed on a element region in a semiconductor substrate, a gate electrode formed on the gate insulating film, and a diffused layer in element regions on both sides of the gate electrode. The device also has a barrier insulating film formed so as to cover the transistor and the diffused layer. The height from a surface of the semiconductor substrate to the barrier insulating film is greater than the height from the surface, of the interface between the gate insulating film and the gate electrode.

Abstract: A semiconductor memory device includes a semiconductor substrate, an element isolation region formed in the semiconductor substrate and including a thick element isolating insulation film, for isolating an element region, a first gate electrode provided on the element region in the semiconductor substrate in self-alignment with the element isolation region, a second gate electrode provided on the first gate electrode with an insulation film interposed therebetween, and a resistance element formed on the element isolation region, the resistance element and the second gate electrode being formed of the same conductive film.

Abstract: A semiconductor device comprising element regions formed in a semiconductor substrate, conductor plugs embedded in an interlayer insulation film, and wiring layers connected to the plugs, wherein the plugs are arranged on a straight line orthogonal to a longitudinal direction of the wiring layer in the same pitch as the wiring layers such that the straight line and upper surfaces of the plugs are superposed each other, and when the plugs are viewed in a cross section parallel to a main surface of the substrate and a distance which is between those two edge points of each of the plugs where a split line which passes through a center of each of the plugs passes is defined as a contact diameter, the contact diameter has three or more maximum values and three or more minimum values while the split line is rotated in the cross section by 360 degrees.

Abstract: Forming of a first silicon oxide film is started on an internal surface of a trench formed on a surface or upwardly of a semiconductor substrate according to an HDP technique. Then, deposition of the first silicon oxide film stops before an opening of the trench closes. Further, the first silicon oxide film deposited in the vicinity of an opening is etched, and a second silicon oxide film is formed on the first silicon oxide film deposited on the bottom of the trench according to the HDP technique. In this manner, the first and second silicon oxide films can be laminated on the bottom of the trench.

Abstract: The major surface of a semiconductor substrate of a semiconductor device includes first and second regions and a boundary area therebetween. A first gate insulating film and a first gate electrode are formed in the first region. A second gate insulating film different from the first gate insulating film and a second gate electrode are formed in the second region. A device isolation region is formed in the boundary area. This device isolation region includes a trench formed in the major surface, and an insulating layer having a portion buried in the trench and a portion projecting upward from the major surface. The bottom of the trench has depths different with portions.

Abstract: Provided is a semiconductor device and a method of fabricating the semiconductor device, in which electric characteristics of a gate insulating film thereof in the vicinity of an element isolation region are equal to electric characteristics of the gate insulating film at portions other than the vicinity of the element isolation region. A semiconductor device of the present invention includes a semiconductor substrate, shallow trench isolation regions formed in the semiconductor substrate, source and drain regions formed in the semiconductor substrate, the source and drain regions sandwiching a surface of the semiconductor substrate to define a channel, gate insulating films having equal thicknesses in a central portion of the channel and in portions contacting with on the shallow trench isolation regions, and gate electrodes formed on the gate insulating films.

Abstract: A nonvolatile semiconductor memory device having a memory cell portion and peripheral circuit portion is disclosed. The nonvolatile semiconductor memory device has peripheral transistors formed in the peripheral circuit portion of a silicon substrate and cell transistors formed in the memory cell portion of the silicon substrate. The gate length of the cell transistor is shorter than the gate length of the peripheral transistor. Further, the nonvolatile semiconductor memory device has a silicon nitride film selectively formed on the memory cell portion. The silicon nitride film covers the cell transistors.

Abstract: A semiconductor memory device includes a semiconductor substrate, an element isolation region formed in the semiconductor substrate and including a thick element isolating insulation film, for isolating an element region, a first gate electrode provided on the element region in the semiconductor substrate in self-alignment with the element isolation region, a second gate electrode provided on the first gate electrode with an insulation film interposed therebetween, and a resistance element formed on the element isolation region, the resistance element and the second gate electrode being formed of the same conductive film.

Abstract: With the present invention, in a memory cell of a stacked-gate NOR flash EEPROM, for example, a SiON film is selectively formed on the sidewalls of a floating gate electrode and the top surface and sidewalls of a control gate electrode. Thereafter, annealing is done in an oxidative atmosphere, thereby carrying out a post-oxidation process. This allows an oxide film to grow gradually at the gate edge portions contacting a tunnel oxide film or interlayer insulating film of the floating gate electrode and control gate electrode. The formation of the SiON film on at least on the sidewalls of the floating gate electrode prevents oxidation at those portions. On the other hand, the gate edge portions of the floating gate electrode eventually become round. By improving the shape of the gate edge portions of the floating gate electrode in this way, an electric field is prevented from concentrating at the gate edge portions of the floating gate electrode.

Abstract: A nonvolatile semiconductor memory device includes a memory cell including a charge storage section for storing n-value data (n.gtoreq.3). In this device, the charge storage section has discrete first to n-th charge amount regions for storing the n-value data. If the first to n-th charge amount regions are defined as n-th, (n-1)-th, . . . , (i+1)-th, i-th charge amount regions in descending order of an amount of positive or negative charge stored in the charge storage section, a charge amount difference .DELTA.Mj between a j-th charge amount region and a (j-1)-th charge amount region is set to .DELTA.Mn>.DELTA.Mn-1> . . . >.DELTA.Mi+2>.DELTA.Mi+1.

Abstract: This invention provides an exposure mask including a translucent film formed on a light-transmitting substrate and having a mask pattern, and a stabilized region formed in the boundary between the light-transmitting substrate and the translucent film or on at least the surface of the translucent film to prevent variations in physical properties of the translucent film.