Abstract: A semiconductor device includes plural switching transistors configured to perform trimming for characteristic adjustment of the semiconductor device, and a nonvolatile memory connected to the plural switching transistors and configured to store data for determining ON and OFF of the plural switching transistors. When the semiconductor device is in operation, ON and OFF of the switching transistors are determined by the data.

Abstract: The present invention is related to a composite flash memory device comprises a plural sector flash memory array which is divided to plural sector that is a minimum erasing unit of the flash memory device, a flash memory array storing control commands which control a total system of the composite flash memory device and/or the only composite flash memory device in and sharing I/O line of the plural sector flash memory array, the read operation of the flash memory array is enable when the plural sector flash memory array is gained access.

Abstract: A non-volatile memory semiconductor device includes a first insulation layer, two diffusion regions, a memory gate oxide layer, a first control gate, a second insulation layer, a floating gate of polysilicon, a third insulation layer and a second control gate. The first insulation layer is formed on a semiconductor substrate. The two diffusion regions are formed on a surface of the substrate. The memory gate oxide layer is formed over the two diffusion regions on the substrate. The first control gate including a diffusion region is formed on the surface of the substrate. The second insulation layer is formed on the first control gate. The floating gate of polysilicon is formed over the memory gate oxide layer, the first insulation layer, and the second insulation layer. The third insulation layer is formed on the floating gate. The second control gate is disposed on the floating gate.

Abstract: A semiconductor device is capable of being applied with both a positive and a negative voltage to its control gate, and writing to its memory requires a low voltage. A control gate is formed on a memory unit region of a field oxide film, and an inter-layer silicon oxide film is formed on its surface. A gate oxide film for a non-volatile memory is formed on a P substrate between N type diffusion layers. The floating gate is formed on the inter-layer silicon oxide film, the field oxide film, and the gate oxide film for the non-volatile memory. Since a large coupling ratio between the control gate and the floating gate is available on the field oxide film, memory rewriting requires only a low voltage. Further, since the control gate is formed by a poly silicon film, both a positive voltage and a negative voltage can be applied to the control gate.

Abstract: A data look-ahead control is provided to realize a high cache hit rate and improves responsiveness in an information processing system. In the data look-ahead control, when it is determined that the current input/output request is an access to a specific database that was the subject of a recent input/output request and whose I/O count exceeds a predetermined value, and it is also determined that a cache memory can be occupied to some extent and that there would be no impact on other input/output requests, data including one or more blocks (logical tracks) larger than a block that is the subject of the current I/O request are loaded to the cache memory.

Abstract: A semiconductor device is capable of being applied with both a positive and a negative voltage to its control gate, and writing to its memory requires a low voltage. A control gate is formed on a memory unit region of a field oxide film, and an inter-layer silicon oxide film is formed on its surface. A gate oxide film for a non-volatile memory is formed on a P substrate between N type diffusion layers. The floating gate is formed on the inter-layer silicon oxide film, the field oxide film, and the gate oxide film for the non-volatile memory. Since a large coupling ratio between the control gate and the floating gate is available on the field oxide film, memory rewriting requires only a low voltage. Further, since the control gate is formed by a poly silicon film, both a positive voltage and a negative voltage can be applied to the control gate.

Abstract: A non-volatile memory semiconductor device includes a first insulation layer, two diffusion regions, a memory gate oxide layer, a first control gate, a second insulation layer, a floating gate of polysilicon, a third insulation layer and a second control gate. The first insulation layer is formed on a semiconductor substrate. The two diffusion regions are formed on a surface of the substrate. The memory gate oxide layer is formed over the two diffusion regions on the substrate. The first control gate including a diffusion region is formed on the surface of the substrate. The second insulation layer is formed on the first control gate. The floating gate of polysilicon is formed over the memory gate oxide layer, the first insulation layer, and the second insulation layer. The third insulation layer is formed on the floating gate. The second control gate is disposed on the floating gate.

Abstract: A non-volatile memory semiconductor device includes a first insulation layer, two diffusion regions, a memory gate oxide layer, a first control gate, a second insulation layer, a floating gate of polysilicon, a third insulation layer and a second control gate. The first insulation layer is formed on a semiconductor substrate. The two diffusion regions are formed on a surface of the substrate. The memory gate oxide layer is formed over the two diffusion regions on the substrate. The first control gate including a diffusion region is formed on the surface of the substrate. The second insulation layer is formed on the first control gate. The floating gate of polysilicon is formed over the memory gate oxide layer, the first insulation layer, and the second insulation layer. The third insulation layer is formed on the floating gate. The second control gate is disposed on the floating gate.

Abstract: A semiconductor device is capable of being applied with both a positive and a negative voltage to its control gate, and writing to its memory requires a low voltage. A control gate is formed on a memory unit region of a field oxide film, and an inter-layer silicon oxide film is formed on its surface. A gate oxide film for a non-volatile memory is formed on a P substrate between N type diffusion layers. The floating gate is formed on the inter-layer silicon oxide film, the field oxide film, and the gate oxide film for the non-volatile memory. Since a large coupling ratio between the control gate and the floating gate is available on the field oxide film, memory rewriting requires only a low voltage. Further, since the control gate is formed by a poly silicon film, both a positive voltage and a negative voltage can be applied to the control gate.

Abstract: There is provided a data processing system which, from a point of view of increasing process efficiency of the entire data processing system to exhibit a maximum effect, may assign an alias device to a logic device. The data processing system of this invention comprises a host processing device (10) and a storage control device (20) connected thereto via a communication means (50), where the storage control device (20) has a deciding means for deciding, at a time of processing an I/O request of a certain base device, whether there is a need to newly assign an alias device to the base device according to a use situation of a physical device (203). When assignment is decided as necessary, the host processing device (10) is notified of such via the communication means, and the host processing device (10) newly assigns an alias device to the base device when there is the notification from the storage control device (20).

Abstract: There is provided a data processing system which, from a point of view of increasing process efficiency of the entire data processing system to exhibit a maximum effect, may assign an alias device to a logic device. The data processing system of this invention comprises a host processing device (10) and a storage control device (20) connected thereto via a communication means (50), where the storage control device (20) has a deciding means for deciding, at a time of processing an I/O request of a certain base device, whether there is a need to newly assign an alias device to the base device according to a use situation of a physical device (203). When assignment is decided as necessary, the host processing device (10) is notified of such via the communication means, and the host processing device (10) newly assigns an alias device to the base device when there is the notification from the storage control device (20).

Abstract: A semiconductor device is capable of being applied with both a positive and a negative voltage to its control gate, and writing to its memory requires a low voltage. A control gate is formed on a memory unit region of a field oxide film, and an inter-layer silicon oxide film is formed on its surface. A gate oxide film for a non-volatile memory is formed on a P substrate between N type diffusion layers. The floating gate is formed on the inter-layer silicon oxide film, the field oxide film, and the gate oxide film for the non-volatile memory. Since a large coupling ratio between the control gate and the floating gate is available on the field oxide film, memory rewriting requires only a low voltage. Further, since the control gate is formed by a poly silicon film, both a positive voltage and a negative voltage can be applied to the control gate.

Abstract: A sensor has an emitting device for emitting radiation pulses repeatedly and a receiving device for receiving these pulses. The receiving device includes a converter such as a photoelectric converter to convert the received radiation pulses into electrical pulses. On the basis of a known waveform characteristic or characteristics of true electrical pulse it is judged if a pulse which appears on the output line of the converter is a true electrical pulse caused by receiving the radiation pulse emitted from the emitting device or a false electrical pulse caused by noise. The result of this judgment is outputted from an output device. The emitting device may serve to emit the pulses according to a specified bit pattern and the receiving device may serve to compare the pattern of received pulses with a standard bit pattern and to thereby distinguish between true and false electrical pulses.

Abstract: A light detecting IC has a single light receiving element, a first signal processing circuit for processing signals outputted from this light receiving element, a pair of input terminals for receiving signals from outside, a second signal processing circuit for processing signals received from outside through the input terminals, and a switch circuit for selecting one from these two signal processing circuits and outputting results of processing by the selected signal processing circuit. A divided photodiode with two light receiving elements may be connected to the input terminals. Alternatively, another light receiving element which has a larger light receiving surface than the single light receiving element installed on the IC may be connected to one of the pair of input terminals.

Abstract: There is provided a data processing system which, from a point of view of increasing process efficiency of the entire data processing system to exhibit a maximum effect, may assign an alias device to a logic device. The data processing system of this invention comprises a host processing device (10) and a storage control device (20) connected thereto via a communication means (50), where the storage control device (20) has a deciding means for deciding, at a time of processing an I/O request of a certain base device, whether there is a need to newly assign an alias device to the base device according to a use situation of a physical device (203). When assignment is decided as necessary, the host processing device (10) is notified of such via the communication means, and the host processing device (10) newly assigns an alias device to the base device when there is the notification from the storage control device (20).

Abstract: A non-volatile memory semiconductor device includes a first insulation layer, two diffusion regions, a memory gate oxide layer, a first control gate, a second insulation layer, a floating gate of polysilicon, a third insulation layer and a second control gate. The first insulation layer is formed on a semiconductor substrate. The two diffusion regions are formed on a surface of the substrate. The memory gate oxide layer is formed over the two diffusion regions on the substrate. The first control gate including a diffusion region is formed on the surface of the substrate. The second insulation layer is formed on the first control gate. The floating gate of polysilicon is formed over the memory gate oxide layer, the first insulation layer, and the second insulation layer. The third insulation layer is formed on the floating gate. The second control gate is disposed on the floating gate.

Abstract: A photoelectric sensor transmits pulsed light repetitively, receives light which may include noise and generates a corresponding electrical reception signal. The level of reception signal is compared with a specified threshold value at a timing which is slightly delayed from the timing of light transmission. A sensor output is generated on the basis of the result of this comparison. If periodically changing noise is present and the reception signal has an AC waveform, the level of the reception signal is compared with another threshold value proximal to an AC zero level. The timing of next light transmission is controlled on the basis of the result of the second comparison.

Abstract: A photoelectric sensor has an emitting device for emitting radiation pulses repeatedly and a receiving device for receiving these pulses. The receiving device includes a converter such as a photoelectric converter to convert the received radiation pulses into electrical pulses. On the basis of a known waveform characteristic or characteristics of true electrical pulse it is judged if a pulse which appears on the output line of the converter is a true electrical pulse caused by receiving the radiation pulse emitted from the emitting device or a false electrical pulse caused by noise. The result of this judgment is outputted from an output device. The emitting device may serve to emit the pulses according to a specified bit pattern and the receiving device may serve to compare the pattern of received pulses simultaneously with two or more standard bit patterns and to thereby distinguish between true and false electrical pulses.

Abstract: A data look-ahead control is provided to realize a high cache hit rate and improves responsiveness in an information processing system. In the data look-ahead control, when it is determined that the current input/output request is an access to a specific database that was the subject of a recent input/output request and whose I/O count exceeds a predetermined value, and it is also determined that a cache memory can be occupied to some extent and that there would be no impact on other input/output requests, data including one or more blocks (logical tracks) larger than a block that is the subject of the current I/O request are loaded to the cache memory.

Abstract: The present invention is related to a composite flash memory device comprises a plural sector flash memory array which is divided to plural sector that is a minimum erasing unit of the flash memory device, a flash memory array storing control commands which control a total system of the composite flash memory device and/or the only composite flash memory device in and sharing I/O line of the plural sector flash memory array, the read operation of the flash memory array is enable when the plural sector flash memory array is gained access.