Patents by Inventor Hiroaki Nakanishi

Hiroaki Nakanishi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6545916
    Abstract: The present invention is related to a composite flash memory device comprises a plural sector flash memory array which is divided to plural sector that is a minimum erasing unit of the flash memory device, a flash memory array storing control commands which control a total system of the composite flash memory device and/or the only composite flash memory device in and sharing I/O line of the plural sector flash memory array, the read operation of the flash memory array is enable when the plural sector flash memory array is gained access.
    Type: Grant
    Filed: November 20, 2001
    Date of Patent: April 8, 2003
    Assignee: Ricoh Company, Ltd.
    Inventors: Minoru Fukuda, Hiroaki Nakanishi, Kunio Matsudaira, Masahiro Matsuo, Hirohisa Abe
  • Publication number: 20030061407
    Abstract: There is provided a data processing system which, from a point of view of increasing process efficiency of the entire data processing system to exhibit a maximum effect, may assign an alias device to a logic device. The data processing system of this invention comprises a host processing device (10) and a storage control device (20) connected thereto via a communication means (50) , where the storage control device (20) has a deciding means for deciding, at a time of processing an I/O request of a certain base device, whether there is a need to newly assign an alias device to the base device according to a use situation of a physical device (203). When assignment is decided as necessary, the host processing device (10) is notified of such via the communication means, and the host processing device (10) newly assigns an alias device to the base device when there is the notification from the storage control device (20).
    Type: Application
    Filed: September 20, 2002
    Publication date: March 27, 2003
    Applicant: Hitachi, Ltd.
    Inventors: Isamu Kurokawa, Hiroaki Nakanishi, Masaru Tsukada, Hisaharu Takeuchi, Masahiro Kawaguchi
  • Publication number: 20030010891
    Abstract: A photoelectric sensor transmits pulsed light repetitively, receives light which may include noise and generates a corresponding electrical reception signal. The level of reception signal is compared with a specified threshold value at a timing which is slightly delayed from the timing of light transmission. A sensor output is generated on the basis of the result of this comparison. If periodically changing noise is present and the reception signal has an AC waveform, the level of the reception signal is compared with another threshold value proximal to an AC zero level. The timing of next light transmission is controlled on the basis of the result of the result of the second comparison.
    Type: Application
    Filed: April 24, 2002
    Publication date: January 16, 2003
    Inventors: Susumu Mizuhara, Arata Nakamura, Hiroaki Nakanishi, Toshiaki Koya
  • Publication number: 20020149396
    Abstract: A sensor has an emitting device for emitting radiation pulses repeatedly and a receiving device for receiving these pulses. The receiving device includes a converter such as a photoelectric converter to convert the received radiation pulses into electrical pulses. On the basis of a known waveform characteristic or characteristics of true electrical pulse it is judged if a pulse which appears on the output line of the converter is a true electrical pulse caused by receiving the radiation pulse emitted from the emitting device or a false electrical pulse caused by noise. The result of this judgment is outputted from an output device. The emitting device may serve to emit the pulses according to a specified bit pattern and the receiving device may serve to compare the pattern of received pulses with a standard bit pattern and to thereby distinguish between true and false electrical pulses.
    Type: Application
    Filed: March 14, 2002
    Publication date: October 17, 2002
    Inventors: Susumu Mizuhara, Arata Nakamura, Hiroaki Nakanishi
  • Patent number: 6454925
    Abstract: A device for electrophoresis includes a component formed with a pair of planar members such as glass substrates joined together one on top of the other such that a capillary is formed by a groove on the surface of at least one of these planar members. A metallic film is disposed on the inner wall of at least a portion of the capillary, and a transparent prism is provided over this metallic film. Electrodes are inserted both on the same side of the metallic film into the capillary for providing a voltage difference between them for causing migration of a liquid in the capillary for electrophoresis without subjecting the metallic film to the applied voltage. A light source is disposed to cause light to be made incident through the prism onto the metallic film at angles of incidence greater than the critical angle for total reflection and including the resonance angle for excitation of surface plasmons on the metallic film.
    Type: Grant
    Filed: June 9, 2000
    Date of Patent: September 24, 2002
    Assignee: Shimadzu Corporation
    Inventors: Hiroaki Nakanishi, Takuro Izuo
  • Publication number: 20020074482
    Abstract: A light detecting IC has a single light receiving element, a first signal processing circuit for processing signals outputted from this light receiving element, a pair of input terminals for receiving signals from outside, a second signal processing circuit for processing signals received from outside through the input terminals, and a switch circuit for selecting one from these two signal processing circuits and outputting results of processing by the selected signal processing circuit. A divided photodiode with two light receiving elements may be connected to the input terminals. Alternatively, another light receiving element which has a larger light receiving surface than the single light receiving element installed on the IC may be connected to one of the pair of input terminals.
    Type: Application
    Filed: November 26, 2001
    Publication date: June 20, 2002
    Inventors: Hiroaki Nakanishi, Susumu Mizuhara
  • Publication number: 20020031013
    Abstract: The present invention is related to a composite flash memory device comprises a plural sector flash memory array which is divided to plural sector that is a minimum erasing unit of the flash memory device, a flash memory array storing control commands which control a total system of the composite flash memory device and/or the only composite flash memory device in and sharing I/O line of the plural sector flash memory array, the read operation of the flash memory array is enable when the plural sector flash memory array is gained access.
    Type: Application
    Filed: November 20, 2001
    Publication date: March 14, 2002
    Inventors: Minoru Fukuda, Hiroaki Nakanishi, Kunio Matsudaira, Masahiro Matsuo, Hirohisa Abe
  • Patent number: 6335883
    Abstract: The present invention is related to a composite flash memory device comprises a plural sector flash memory array which is divided to plural sector that is a minimum erasing unit of the flash memory device, a flash memory array storing control commands which control a total system of the composite flash memory device and/or the only composite flash memory device in and sharing I/O line of the plural sector flash memory array, the read operation of the flash memory array is enable when the plural sector flash memory array is gained access.
    Type: Grant
    Filed: July 31, 2000
    Date of Patent: January 1, 2002
    Assignee: Ricoh Company, Ltd.
    Inventors: Minoru Fukuda, Hiroaki Nakanishi, Kunio Matsudaira, Masahiro Matsuo, Hirohisa Abe
  • Patent number: 6115292
    Abstract: The present invention is related to a composite flash memory device comprises a plural sector flash memory array which is divided to plural sector that is a minimum erasing unit of the flash memory device, a flash memory array storing control commands which control a total system of the composite flash memory device and/or the only composite flash memory device in and sharing I/O line of the plural sector flash memory array, the read operation of the flash memory array is enable when the plural sector flash memory array is gained access.
    Type: Grant
    Filed: May 18, 1998
    Date of Patent: September 5, 2000
    Assignee: Ricoh Company, Ltd.
    Inventors: Minoru Fukuda, Hiroaki Nakanishi, Kunio Matsudaira, Masahiro Matsuo, Hirohisa Abe
  • Patent number: 6104057
    Abstract: An electrically alterable non-volatile memory device is disclosed. In the device architecture of the memory device, control gates are formed, divided corresponding to the blocks and interconnected independently within each block, to further be connected to a metal gate line through block select MOS transistors which are formed on a semiconductor substrate between the blocks. All gate electrodes of the block select MOS transistors which are connected to the control gates interconnected as above within each block are further connected each other. These block select transistors can be controlled by applying erase block signals such as, EBS0, EBS1 and so on, to respective transistors. In addition, the control gates are further connected to a decoder such that some of these control gates may be selected through metal control gate lines.
    Type: Grant
    Filed: August 24, 1998
    Date of Patent: August 15, 2000
    Assignee: Ricoh Company, Ltd.
    Inventors: Hiroaki Nakanishi, Kunio Matsudaira, Masahiro Matsuo, Hirohisa Abe, Yoichi Sakai
  • Patent number: 6075267
    Abstract: A non-volatile semiconductor memory device includes a substrate and a continuously formed drain diffusion layer and a continuously formed source diffusion layer which are alternately arranged within the substrate. Floating gates are disposed via a tunnel insulating film on the substrate so that they are adjacent to the drain diffusion layer. The floating gates are opposed to each other with the drain diffusion layer therebetween, and spaced away from the source diffusion layer. A control gate extends in a direction orthogonal with a direction in which the source and drain diffusion layers extend, the control gate being formed on the floating gates and the substrate via an insulating film. A select channel is provided between the floating gate closest to the source diffusion layer and the source diffusion layer. A thick insulating film is provided between the drain diffusion layer and the control gate between the floating gates which are opposed to each other with the drain diffusion layer therebetween.
    Type: Grant
    Filed: February 26, 1997
    Date of Patent: June 13, 2000
    Assignee: Ricoh Company, Ltd.
    Inventors: Satoru Taji, Hiroaki Nakanishi
  • Patent number: 6042708
    Abstract: In order to irradiate a constant range of a separation passage of a microchip, light from a light source linearly extending along the separation passage is transmitted through a cylindrical lens and a bandpass filter and introduced into the separation passage. The light transmitted through the separation passage of the microchip is introduced into a photocell array through a cylindrical lens and detected. Measurement is repetitively performed and accumulated to determine migration patterns.
    Type: Grant
    Filed: October 14, 1997
    Date of Patent: March 28, 2000
    Assignee: Shimadzu Corporation
    Inventors: Hiroaki Nakanishi, Akihiro Arai, Yosuke Iwata
  • Patent number: 6030883
    Abstract: At a room temperature, cleaned glass substrates 8a, 8b are suitably positioned and placed one upon another. A hydrofluoric acid solution or alkaline solution 10 is dropped into the bonding interface between the glass substrates 8a, 8b. The hydrofluoric acid solution or alkaline solution thus dropped spreads along the bonding interface. At a room temperature, a load is then applied to the upper glass substrate 8a and allowed to stand for a suitable period of time, thus bonding the glass substrates to each other.
    Type: Grant
    Filed: May 20, 1997
    Date of Patent: February 29, 2000
    Assignee: Shimadzu Corporation
    Inventors: Takahiro Nishimoto, Hiroaki Nakanishi
  • Patent number: 5966325
    Abstract: A memory cell of a memory device is constructed such that a source diffusion layer is divided into blocks each containing 16 word lines, and such that a drain diffusion layer is not divided. Each segment of the source diffusion layer is connected to a metal bit line via a block selection MOS transistor. The metal bit line is formed on an insulating film provided on the source diffusion layer so as to be parallel with the source diffusion layer. The block selection MOS transistor is connected to the metal bit line via a contact hole. A gate electrode of the block selection MOS transistor is formed of a polysilicon film for providing a selection gate used to form a word line of the memory cell. A source diffusion layer and a drain diffusion layer of the block selection MOS transistor are formed of the same material as the source diffusion layer of the memory cell and the drain diffusion layer of the memory cell.
    Type: Grant
    Filed: February 26, 1998
    Date of Patent: October 12, 1999
    Assignee: Ricoh Company, Ltd.
    Inventors: Hiroaki Nakanishi, Satoru Taji
  • Patent number: 5959728
    Abstract: A detector cell in which a pair of glass substrates are used, in which a groove is formed in the surface of at least one of the glass substrates, which has a sample passage formed by the bonding method above-mentioned, a sample inlet port and a sample outlet port, and in which at least a portion of the passage is used as a measuring chamber. There is also formed an optical measuring apparatus having the detector cell above-mentioned and arranged to measure light transmitted through a sample flowing in the passage. According to the arrangement above, it is possible to readily mutually bond, at room temperature, substrates made of a material of glass, quartz or the like of which at least bonding surfaces contain silicon dioxide as the primary component. Further, the optical measuring apparatus having a detector cell produced using this bonding method can achieve a highly precise analysis.
    Type: Grant
    Filed: March 19, 1998
    Date of Patent: September 28, 1999
    Assignee: Shimadzu Corporation
    Inventors: Takahiro Nishimoto, Hiroaki Nakanishi
  • Patent number: 5859977
    Abstract: A computer system is so configured as to be divided into a control system which should have high reliability and high responsiveness and an information system which does not access the control system. They are connected via a transmission path (transmission path of control system and transmission path of information system). Centralized management of development and maintenance is performed from a software maintenance system. In development and maintenance of software, management according to the feature of each software such as processing contents of each software, demanded reliability, and version up frequency is performed from a maintenance system for exclusive use by using a transmission path of information system. Thereby, development and maintenance having high reliability and expandability is realized.
    Type: Grant
    Filed: May 30, 1995
    Date of Patent: January 12, 1999
    Assignees: Hitachi, Ltd., Hitachi Process Engineering, Inc.
    Inventors: Shuji Nishiyama, Hiroaki Nakanishi, Hideki Sato, Hiroshi Kobayashi, Shigeru Endo, Toshimasa Saika, Teruyasu Nakahashi, Hiroyuki Hori, Tomohito Ebina, Keiichi Sannomiya, Shimako Tanno
  • Patent number: 5818823
    Abstract: A slot assign system has a central station and a plurality of peripheral stations, and the communication between them is made through an artificial satellite. The central station stores pre-assign slot information of each of the peripheral stations, and multiplexes slot assign information to be changed at a next frame over the pre-assign slot information. The peripheral station, on receipt of the slot assign information, transmits the next frame using a slot assigned to itself. The central station sends a vacant slot with no pre-assignment as a non-assign information signal, and the peripheral station recognizing the vacant slot transmits, using the slot assigned to itself, a reservation request for using the vacant slot. The central station transmits a frame next to the frame to which the slot has been assigned.
    Type: Grant
    Filed: March 5, 1996
    Date of Patent: October 6, 1998
    Assignee: NEC Corporation
    Inventor: Hiroaki Nakanishi
  • Patent number: 5815258
    Abstract: A liquid sample cell used in an optical measurement apparatus in which a liquid sample flows through a flow path of the sample cell while a measurement light travels through the liquid sample in the flow path. The liquid sample cell is composed of: a first glass plate and a second glass plate fixed to each other; a groove for constituting the flow path formed in the first glass plate by a photolithographic method; reflection layers formed on the internal surface of the groove and on the internal surface of the other glass plate; and an entrance window and an exit window formed in the reflection layers to let the measurement light into the flow path and to let the measurement light out from the flow path. The measurement light is reflected by the reflection layers many times in the flow path.
    Type: Grant
    Filed: February 14, 1997
    Date of Patent: September 29, 1998
    Assignee: Shimadzu Corporation
    Inventor: Hiroaki Nakanishi
  • Patent number: 5740424
    Abstract: There is disclosed an information processing system and method capable of coping with a wider range of subjects and intricate changes. In client server structure, time-varying database altering information received from external systems is pooled in servers and distributed to a number of distributed terminals or clients, using broadcasting communication.
    Type: Grant
    Filed: August 2, 1996
    Date of Patent: April 14, 1998
    Assignees: Hitachi, Ltd., Hitachi Process Computer Engineering Inc.
    Inventors: Hiroshi Wataya, Hiroaki Nakanishi, Keijiro Hayashi, Yoshiaki Adachi, Hideki Tonooka, Kenji Matsuzaki, Tsutomu Onuki, Isao Terakado
  • Patent number: 5519875
    Abstract: A distributed processing system capable of realizing efficient management of a multiplicity of objects in a large scale distributed processing comprises an objectification unit which makes it possible to handle an assembly of objects as one object and a message transfer unit by which a request for a processing to one object provided by objectification by the objectification unit is made to an optimal one of plural objects subjected to objectification.
    Type: Grant
    Filed: August 10, 1992
    Date of Patent: May 21, 1996
    Assignee: Hitachi, Ltd.
    Inventors: Takanori Yokoyama, Masaru Shimada, Tadashi Kamiwaki, Masahiko Saito, Yoshiki Kobayashi, Hiroaki Nakanishi