Abstract: A first film made of silicon carbide is formed over a substrate. The surface of the first film is exposed to an oxidizing atmosphere to oxidize the surface layer of the first film. The surface of the first film is made in contact with chemical which makes the surface hydrophilic. On the hydrophilic surface of the first film, a second film is formed which is an insulating film made of a low dielectric constant insulating material having a relative dielectric constant of 2.7 or smaller or an insulating film made by a coating method. A sufficient adhesion property is obtained when a film made of low dielectric constant insulating material is formed on an insulating film made of silicon carbide having a small amount of oxygen contents.

Abstract: The method for forming an SiC-based film comprises the step of generating NH3 plasma on the surface of a substrate 20 in a chamber to make NH3 plasma processing on the substrate 20, the step of removing reaction products containing nitrogen remaining in the chamber, and the step of forming an SiC film 34 on the substrate 20 by PECVD.

Abstract: Disclosed is a method for effectively forming a Low-k insulating film. The method comprises the steps of: spin-coating on an underlying layer a precursor solution formed by dispersing Low-k materials in a solvent to form a coating film, subjecting the coating film to a baking treatment under heating for about several minutes at a temperature near a boiling point of the solvent, forming, on the coating film after the baking treatment, an SiC barrier film using a CVD method, and subjecting the coating film to a hydrogen plasma treatment through the barrier film continuously using the same CVD apparatus as used in forming the barrier film without taking out the coating film from the CVD apparatus.

Abstract: A first antireflection film is formed on the surface of an underlying substrate, the first antireflection film suppressing reflection in an absorption mode. A second antireflection film is formed on the first antireflection film, the second antireflection film suppressing reflection in a countervailing interference mode. A cap film is formed on the second antireflection film. A photosensitive resist film is formed on the cap film. A latent image is formed in the photosensitive resist film by exposing the photosensitive resist film to light having a first wavelength. The exposed resist film is developed. Even if the resist film is ashed and resist is again coated, the initial reflectivity lowering effects can be retained.

Abstract: A method of manufacturing a semiconductor device includes the steps of: preparing an underlying structure having a silicon carbide layer covering a copper wiring, and growing silicon oxycarbide on the underlying structure by vapor deposition using, as source gas, tetramethylcyclotetrasiloxane, carbon dioxide gas and oxygen gas, a flow rate of said oxygen gas being at most 3% of a flow rate of the carbon dioxide gas. The surface of the silicon carbide layer of the underlying structure may be treated with a plasma of weak oxidizing gas which contains oxygen and has a molecular weight larger than that of O2 to bring the surface more hydrophilic. Film peel-off and cracks in the interlayer insulating layer decrease.

Abstract: A first film made of silicon carbide is formed over a substrate. The surface of the first film is exposed to an oxidizing atmosphere to oxidize the surface layer of the first film. The surface of the first film is made in contact with chemical which makes the surface hydrophilic. On the hydrophilic surface of the first film, a second film is formed which is an insulating film made of a low dielectric constant insulating material having a relative dielectric constant of 2.7 or smaller or an insulating film made by a coating method. A sufficient adhesion property is obtained when a film made of low dielectric constant insulating material is formed on an insulating film made of silicon carbide having a small amount of oxygen contents.

Abstract: A semiconductor device including an underlying structure having a silicon carbide layer covering a copper wiring, and growing silicon oxycarbide on the underlying structure by vapor deposition using, as source gas, tetramethylcyclotetrasiloxane, carbon dioxide gas and oxygen gas, a flow rate of said oxygen gas being at most 3% of a flow rate of the carbon dioxide gas. The surface of the silicon carbide layer of the underlying structure may be treated with a plasma of weak oxidizing gas which contains oxygen and has a molecular weight larger than that of O2 to bring the surface more hydrophilic. Film peel-off and cracks in the interlayer insulating layer decrease.

Abstract: A low temperature film deposition process fills fine gaps while avoiding removal of the deposited film in post-processes, and is applicable to formation of semiconductor devices having both sparse and dense patterned regions, such as a combined logic and memory hybrid semiconductor device. A thermal CVD (chemical vapor deposition) method is performed at a first pressure to form a first insulation film on a main surface of a substrate having patterned recesses therein and, after the recesses are substantially filled, a second thermal CVD process is performed under a second pressure, lower than the first pressure and without interruption of the supply of the film forming gas during the transition from the first to the second process, thereby to form an insulation film continuously and without a barrier layer therebetween.

Abstract: A method of manufacturing a semiconductor device includes the steps of: preparing an underlying structure having a silicon carbide layer covering a copper wiring, and growing silicon oxycarbide on the underlying structure by vapor deposition using, as source gas, tetramethylcyclotetrasiloxane, carbon dioxide gas and oxygen gas, a flow rate of said oxygen gas being at most 3% of a flow rate of the carbon dioxide gas. The surface of the silicon carbide layer of the underlying structure may be treated with a plasma of weak oxidizing gas which contains oxygen and has a molecular weight larger than that of O2 to bring the surface more hydrophilic. Film peel-off and cracks in the interlayer insulating layer decrease.

Abstract: A first antireflection film is formed on the surface of an underlying substrate, the first antireflection film suppressing reflection in an absorption mode. A second antireflection film is formed on the first antireflection film, the second antireflection film suppressing reflection in a countervailing interference mode. A cap film is formed on the second antireflection film. A photosensitive resist film is formed on the cap film. A latent image is formed in the photosensitive resist film by exposing the photosensitive resist film to light having a first wavelength. The exposed resist film is developed. Even if the resist film is ashed and resist is again coated, the initial reflectivity lowering effects can be retained.

Abstract: A semiconductor device has: a semiconductor substrate; a number of semiconductor elements formed on the semiconductor substrate; a plurality of lower level wiring layers electrically connected to the semiconductor elements; a plurality of first insulating layers electrically separating the lower level wiring layers and having a first dielectric constant; a plurality of middle level wiring layers electrically connected to the lower level wiring layers; a plurality of second insulating layers electrically separating the middle level wiring layers and having a second dielectric constant larger than the first dielectric constant; a plurality of upper level wiring layers electrically connected to the middle level wiring layers; a plurality of third insulating layers electrically separating the upper level wiring layers and having a third dielectric constant larger than the second dielectric constant. A multilevel wiring structure is provided which has a high performance and a high reliability.

Abstract: The present invention provides a semiconductor device that can restrict the dissolution hindering phenomenon in a chemically amplified resist film. More specifically, after the formation of a contact pattern on a semiconductor substrate, a wiring pattern is formed on the contact pattern. A SiC film, a first SiOC film, a SiC film, a second SiOC film, a USG film as a diffusion preventing film, and a silicon nitride film as a reflection preventing film, are formed on the wiring pattern. A dual damascene structure is then formed using the chemically amplified resist film and another chemically amplified resist film. In this manner, the N2 gas generated during the formation of the silicon nitride film as a reflection preventing film can be prevented from diffusing into the second SiOC film formed under the silicon nitride film. Accordingly, the reaction of the N2 gas with the H group contained in the second SiOC film and the generation of an amine group such as NH in the second SiOC film can be prevented.

Abstract: A semiconductor device has: a semiconductor substrate; a number of semiconductor elements formed on the semiconductor substrate; a plurality of lower level wiring layers electrically connected to the semiconductor elements; a plurality of first insulating layers electrically separating the lower level wiring layers and having a first dielectric constant; a plurality of middle level wiring layers electrically connected to the lower level wiring layers; a plurality of second insulating layers electrically separating the middle level wiring layers and having a second dielectric constant larger than the first dielectric constant; a plurality of upper level wiring layers electrically connected to the middle level wiring layers; a plurality of third insulating layers electrically separating the upper level wiring layers and having a third dielectric constant larger than the second dielectric constant. A multilevel wiring structure is provided which has a high performance and a high reliability.

Abstract: A low temperature film deposition process fills fine gaps while avoiding removal of the deposited film in post-processes, and is applicable to formation of semiconductor devices having both sparse and dense patterned regions, such as a combined logic and memory hybrid semiconductor device. A thermal CVD (chemical vapor deposition) method is performed at a first pressure to form a first insulation film on a main surface of a substrate having patterned recesses therein and, after the recesses are substantially filled, a second thermal CVD process is performed under a second pressure, lower than the first pressure and without interruption of the supply of the film forming gas during the transition from the first to the second process, thereby to form an insulation film continuously and without a barrier layer therebetween.

Abstract: A first MISFET is formed in a first active region on the surface of a semiconductor substrate. The drain region of the first MISFET has a lightly doped drain structure with a low concentration region and a high concentration region. The side wall spacer conformingly covers the side wall of the gate electrode and the surface of the low concentration region in the drain region. A second MISFET is formed in a second active region. The side wall spacer of the second MISFET covers the side wall of the gate electrode and extends to the surface of the source and drain regions. An interlayer insulating film covers the said first MISFET and second MISFET and is made of material having an etching resistance different from that of the side wall spacers of the first MISFET and second MISFET.

Abstract: A low temperature film deposition process fills fine gaps while avoiding removal of the deposited film in post-processes, and is applicable to formation of semiconductor devices having both sparse and dense patterned regions, such as a combined logic and memory hybrid semiconductor device. A thermal CVD (chemical vapor deposition) method is performed at a first pressure to form a first insulation film on a main surface of a substrate having patterned recesses therein and, after the recesses are substantially filled, a second thermal CVD process is performed under a second pressure, lower than the first pressure and without interruption of the supply of the film forming gas during the transition from the first to the second process, thereby to form an insulation film continuously and without a barrier layer therebetween.

Abstract: A method of forming a semiconductor device by forming a first interlayer insulation film on a substrate, forming a second, organic interlayer insulation film on the first interlayer insulation film, forming a first etching stopper film on the second interlayer insulation film, and forming a second, different etching stopper film on the first etching stopper film. A first opening is formed in the second etching stopper film so as to expose the first etching stopper film, a second opening is formed in a part of the first etching stopper film exposed by the first opening, and a third opening is formed in the second interlayer insulation film in correspondence to the second opening by applying an etching process while using the first etching stopper film as a mask. An interconnection groove is then formed in the second interlayer insulation film in correspondence to the first opening by applying an etching process while using the second etching stopper film as a mask.

Abstract: A first MISFET is formed in a first active region on the surface of a semiconductor substrate. The drain region of the first MISFET has a lightly doped drain structure with a low concentration region and a high concentration region. The side wall spacer conformingly covers the side wall of the gate electrode and the surface of the low concentration region in the drain region. A second MISFET is formed in a second active region. The side wall spacer of the second MISFET covers the side wall of the gate electrode and do not extend further to the surfaces of the source and drain regions. An interlayer insulating film covers the said first MISFET and second MISFET and is made of material having an etching resistance different from that of the side wall spacers of the first MISFET and second MISFET.

Abstract: A first MISFET is formed in a first active region on the surface of a semiconductor substrate. The drain region of the first MISFET has a lightly doped drain structure with a low concentration region and a high concentration region. The side wall spacer conformingly covers the side wall of the gate electrode and the surface of the low concentration region in the drain region. A second MISFET is formed in a second active region. The side wall spacer of the second MISFET covers the side wall of the gate electrode and do not extend further to the surfaces of the source and drain regions. An interlayer insulating film covers the said first MISFET and second MISFET and is made of material having an etching resistance different from that of the side wall spacers of the first MISFET and second MISFET.

Abstract: A low temperature film deposition process fills fine gaps while avoiding removal of the deposited film in post-processes, and is applicable to formation of semiconductor devices having both sparse and dense patterned regions, such as a combined logic and memory hybrid semiconductor device. A thermal CVD (chemical vapor deposition) method is performed at a first pressure to form a first insulation film on a main surface of a substrate having patterned recesses therein and, after the recesses are substantially filled, a second thermal CVD process is performed under a second pressure, lower than the first pressure and without interruption of the supply of the film forming gas during the transition from the first to the second process, thereby to form an insulation film continuously and without a barrier layer therebetween.