Abstract: In a flip-chip type semiconductor device, a plurality of pad electrodes are formed on a semiconductor substrate. An insulating stress-absorbing resin layer made of thermosetting resin is adhered to the substrate as a composite layer in conjunction with a first conductive layer and has openings corresponding to the pad electrodes. A plurality of metal bumps are formed on the conductive layer.

Abstract: Multilayer thin film wirings are formed on both front and back surfaces of a base substrate that is made of a metal or alloy plate. The base substrate is cut into the front surface side and the back surface side. Then, the base substrates are selectively removed to expose inner electrode pads, on which flip chip type semiconductor chips are mounted.

Abstract: A method for forming a mold-encapsulated semiconductor device includes the steps of mounting a semiconductor chip on a metallic plate having a metallic interconnect pattern thereon, encapsulating the semiconductor chip on the metallic interconnect pattern, removing the bottom of the metallic plate by etching to expose the metallic interconnect pattern, and forming external terminals on the bottom of the metallic interconnect pattern. The method reduces the thickness as well as the planar dimensions of the semiconductor device.

Abstract: The present invention relates to a method of manufacturing a semiconductor device. In the method, an etching-back layer consisting of aluminum or copper is formed on a base substrate and a multilayer wiring board is manufactured on the etching-back layer. After that the etching-back layer is etched to be removed under the condition that the multilayer wiring board and the base substrate are not etched, so that the base substrate is separated from the multilayer wiring board. Accordingly, the base substrate can be reused.

Abstract: Multilayer thin film wirings are formed on both front and back surfaces of a base substrate that is made of a metal or alloy plate. The base substrate is cut into the front surface side and the back surface side. Then, the base substrates are selectively removed to expose inner electrode pads, on which flip chip type semiconductor chips are mounted.

Abstract: A multilayer wiring structure is formed on a flat metal plate and then an entire surface of the metal plate is etched away to thereby leave only a multilayer wiring layer. An insulating substrate having through hole sections is bonded to the multilayer wiring layer, a conductive bonding agent is embedded into the through hole section, a semiconductor chip is mounted and a solder ball is coupled.

Abstract: There is provided a semiconductor device including (a) a substrate, (b) a semiconductor chip mounted on the substrate, (c) a wall having a closed cross-section and mounted on the substrate such that the semiconductor chip is surrounded by the wall, and (d) a cover covering the wall therewith so that a closed cavity is defined by the substrate, the wall and the cover, the cavity being designed to be under a pressure almost equal to an atmospheric pressure at a temperature highest in both steps of fabricating the semiconductor device and steps expectable after the semiconductor device is completed. The semiconductor device can prevent defectiveness such as electric leakage and electromigration, and further prevent occurrence of “popcorn” phenomenon which might occur in an annealing step.

Abstract: A multilayer wiring structure is formed on a flat metal plate and then an entire surface of the metal plate is etched away to thereby leave only a multilayer wiring layer. An insulating substrate having through hole sections is bonded to the multilayer wiring layer, a conductive bonding agent is embedded into the through hole section, a semiconductor chip is mounted and a solder ball is coupled.

Abstract: A semiconductor device includes pads formed on a semiconductor chip, conductive sections connected to the pads, respectively, conductive bumps on surfaces of the conductive sections, and an insulating film covering the semiconductor chip other than the surfaces of the conductive sections. The insulating film including a stress buffering layer in a lateral direction of the conductive sections to relax a stress applied to the bumps.

Abstract: The present invention provides a film carrier semiconductor device comprising: an insulative base film; inner leads provided on a first surface of the insulative base film; a signal interconnection pattern provided on the first surface of the insulative base film; a ground plane provided on a second surface of the insulative base film; a conductive supporting plate fixed by a conductor to the first surface of the insulative base film, wherein the conductive supporting plate serves as a power voltage plane.

Abstract: In a flip-chip type semiconductor device, a pad electrode and a passivation film are formed on a semiconductor substrate. An insulating resin layer is formed on the passivation film, and an opening is formed above the electrode. A pad electrode adhesive metal film is formed on the substrate like a re-wiring pattern, and a plating feed layer metal film and a Cu plating layer are sequentially formed on the metal film to form a wiring layer. A metal post electrode is formed on the wiring layer. A solder bump is formed on the post electrodes, a support plate in which holes each having a diameter larger than the diameter of the solder bump are formed at positions adjusted to the solder bumps is arranged, and an insulating resin layer is formed between the support plate and the semiconductor substrate. Therefore, a stress acting on the solder bump is moderated.

Abstract: A multilayer wiring structure is formed on a flat metal plate and then an entire surface of the metal plate is etched away to thereby leave only a multilayer wiring layer. An insulating substrate having through hole sections is bonded to the multilayer wiring layer, a conductive bonding agent is embedded into the through hole section, a semiconductor chip is mounted and a solder ball is coupled.

Abstract: A film carrier tape for a semiconductor package comprises a tape base film having a signal plane with leads disposed thereon and a ground plane on the surface opposite the signal plane. The ground plane has ground plane leads projecting into a device hole and OLB lead holes defined in the tape base film, the ground plane leads confronting the leads on the signal plane. The ground plane leads are electrically connected to selected leads on the signal plane.