Patents by Inventor Hiroki Fujii
Hiroki Fujii has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20220027070Abstract: Provided is a storage system and a storage management method, aiming at reducing data movement amount necessary for using an expanded capacity in a distributed RAID. When only A (A is a positive integer) physical storage drives are added, a storage controller selects virtual parcels that are mapped to different physical storage drives among N physical storage drives and are included in different virtual chunks, changes an arrangement of the selected virtual parcels to the added A physical storage drives, and constitutes a new chunk based on unallocated virtual parcels selected from different physical storage drives among the (N+A) physical storage drives.Type: ApplicationFiled: October 7, 2021Publication date: January 27, 2022Applicant: HITACHI, LTD.Inventors: Hiroki FUJII, Yoshinori OHIRA, Takeru CHIBA, Yoshiaki DEGUCHI
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Publication number: 20210382788Abstract: A storage system including a storage controller and a plurality of storage drives generates parity data from data. Data and parity data configure a stripe. A plurality of stripes configure a parity group allocated with a plurality of storage drives to store the parity group. A first parity group allows the number of storage drives allocated to the parity group to be equal to the number of data pieces configuring each stripe. A second parity group allows the number of storage drives allocated to the parity group to be larger than the number of data pieces configuring each stripe and allows data for each stripe to be distributed and stored in different combinations of storage drives. When the first parity group is converted to the second parity group, a storage drive is added so that it is allocated to the parity group. Data is moved to ensure a free area.Type: ApplicationFiled: March 15, 2021Publication date: December 9, 2021Inventors: Takeru CHIBA, Hiroki FUJII, Yoshiaki DEGUCHI
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Patent number: 11150820Abstract: Provided is a storage system and a storage management method, aiming at reducing data movement amount necessary for using an expanded capacity in a distributed RAID. When only A (A is a positive integer) physical storage drives are added, a storage controller selects virtual parcels that are mapped to different physical storage drives among N physical storage drives and are included in different virtual chunks, changes an arrangement of the selected virtual parcels to the added A physical storage drives, and constitutes a new chunk based on unallocated virtual parcels selected from different physical storage drives among the (N+A) physical storage drives.Type: GrantFiled: September 16, 2020Date of Patent: October 19, 2021Assignee: HITACHI, LTD.Inventors: Hiroki Fujii, Yoshinori Ohira, Takeru Chiba, Yoshiaki Deguchi
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Publication number: 20210191828Abstract: A storage controller of a storage system performs, when failures occur in at least two drives, priority rebuilding and normal rebuilding in parallel, the priority rebuilding being performed so as to perform rebuilding using a reading drive for reading data for restoration of priority rebuild data to be preferentially rebuilt and a writing drive specified for writing the priority rebuild data restored, the normal rebuilding being performed so as to rebuilt normal rebuild data by using a specified reading drive and a specified writing drive.Type: ApplicationFiled: September 23, 2020Publication date: June 24, 2021Inventors: Sho SAWADA, Hidenori SUZUKI, Eiju KATSURAGI, Shintarou INOUE, Hiroki FUJII
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Publication number: 20210181958Abstract: Provided is a storage system and a storage management method, aiming at reducing data movement amount necessary for using an expanded capacity in a distributed RAID. When only A (A is a positive integer) physical storage drives are added, a storage controller selects virtual parcels that are mapped to different physical storage drives among N physical storage drives and are included in different virtual chunks, changes an arrangement of the selected virtual parcels to the added A physical storage drives, and constitutes a new chunk based on unallocated virtual parcels selected from different physical storage drives among the (N+A) physical storage drives.Type: ApplicationFiled: September 16, 2020Publication date: June 17, 2021Applicant: HITACHI, LTD.Inventors: Hiroki FUJII, Yoshinori OHIRA, Takeru CHIBA, Yoshiaki DEGUCHI
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Patent number: 10915401Abstract: A disclosed method includes selecting one or more regions having a predetermined size or more in a logical address space of a first memory drive when the first memory drive is partially failed, transferring data of the one or more selected regions to a second memory drive, reading data from another memory drive, which forms a RAID group with the first memory drive, to restore lost data caused by the partial failure, and writing the restored lost data to the first memory drive.Type: GrantFiled: February 6, 2017Date of Patent: February 9, 2021Assignee: HITACHI, LTD.Inventors: Hiroki Fujii, Hideyuki Koseki
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Patent number: 10910492Abstract: A semiconductor device which can secure a high breakdown voltage and to which a simplified manufacturing process is applicable and a method for manufacturing the semiconductor device are provided. An n+ buried region has a floating potential. An n-type body region is located on a first surface side of the n+ buried region. A p+ source region is located in the first surface and forms a p-n junction with the n-type body region. A p+ drain region is located in the first surface spacedly from the p+ source region. A p-type impurity region PIR is located between the n+ buried region and the n-type body region and isolates the n+ buried region and the n-type body region from each other.Type: GrantFiled: July 16, 2018Date of Patent: February 2, 2021Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Hiroki Fujii, Atsushi Sakai, Takahiro Mori
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Patent number: 10802958Abstract: A storage device determines whether or not reading target data subjected to a first conversion process is divided and stored into multiple pages. When the data subjected to the first conversion process is stored in one of a plurality of pages, the data is read from the page, and a second conversion process for returning the data to a state before the data is subjected to the first conversion process is executed to the data. When the reading target data is divided and stored into two or more of the plurality of pages, a portion of the data is read from each of the two or more pages in which the portion of the data is stored, the portion of the data is stored in the buffer memory, the data subjected to the first conversion process is restored, and the second conversion process is executed to the restored data.Type: GrantFiled: January 21, 2016Date of Patent: October 13, 2020Assignee: HITACHI, LTD.Inventors: Hiroki Fujii, Hideyuki Koseki, Atsushi Kawamura
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Publication number: 20200285551Abstract: In an upper storage device, a BEPK and an MP are provided, each of a plurality of lower storage devices has a plurality of stripes configuring a plurality of stripe rows, each of the plurality of stripe rows is a row of two or more stripes which the plurality of lower storage devices have, respectively, when each of the plurality of stripe rows stores a plurality of data elements and a redundant code and a predetermined allowable number of lower storage devices fail, the data elements in the stripes can be restored and the MP controls a processing speed in restoration processing, on the basis of restoration priorities for the data elements or the redundant code of failed stripes in the failed lower storage devices.Type: ApplicationFiled: September 3, 2019Publication date: September 10, 2020Applicant: HITACHI, LTD.Inventors: Hiroki FUJII, Yoshinori OHIRA
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Publication number: 20200073586Abstract: An information processing apparatus includes a storage controller and a storage device. The storage controller manages a first address space in which data is recorded in a log-structured format in response to a write request from a host. The storage device manages a second address space in which data is recorded in a log-structured format in response to a write request from the storage controller. The storage controller sets a unit by which the storage controller performs garbage collection in the first address space to a multiple of a unit by which the storage device performs garbage collection in the second address space.Type: ApplicationFiled: March 5, 2019Publication date: March 5, 2020Inventors: Naruki KURATA, Hiroki FUJII, Masahiro TSURUYA
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Patent number: 10468523Abstract: A recessed portion is formed in a top surface of an isolation insulation film filling an isolation trench between a p+ source region and a p+ drain region. A p? drift region is located below the isolation trench and connected to the p+ drain region. A gate electrode fills the recessed portion. An n-type impurity region is located below the p? drift region and directly below the recessed portion.Type: GrantFiled: December 19, 2017Date of Patent: November 5, 2019Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Hiroki Fujii, Takahiro Mori
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Publication number: 20190334371Abstract: A control device comprises an acquisition unit that acquires a current to or from the battery and a voltage of a battery, a calculation unit that calculates an internal resistance of the battery based on the current and the voltage when the regenerative power generation is performed by a rotary electric machine, and a permission determination unit that determines whether to permit an automatic stop of an engine depending on whether restarting of the engine is enabled based on power running drive of the rotary electric machine. The calculation unit calculates a value of the internal resistance each time the regenerative power generation or the power running drive is performed before the engine enters an automatic stop state. The permission determination unit determines whether to permit the automatic stop based on a latest value of the internal resistance among values of the internal resistance calculated by the calculation unit.Type: ApplicationFiled: July 11, 2019Publication date: October 31, 2019Applicant: DENSO CORPORATIONInventors: Tetsuya WATANABE, Yuki TACHIBANA, Hiroki FUJII
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Publication number: 20190220358Abstract: A disclosed method includes selecting one or more regions having a predetermined size or more in a logical address space of a first memory drive when the first memory drive is partially failed, transferring data of the one or more selected regions to a second memory drive, reading data from another memory drive, which forms a RAID group with the first memory drive, to restore lost data caused by the partial failure, and writing the restored lost data to the first memory drive.Type: ApplicationFiled: February 6, 2017Publication date: July 18, 2019Applicant: Hitachi, Ltd.Inventors: Hiroki FUJII, Hideyuki KOSEKI
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Patent number: 10229909Abstract: A semiconductor device includes a high voltage NMOS transistor formation region defined by an element isolation insulating film, a CMOS transistor formation region defined by an element isolation insulating film, and a substrate contact portion. The substrate contact portion is formed in a region of a semiconductor substrate that is positioned between the high voltage NMOS transistor formation region and the element isolation insulating film so as to reach from the main surface side to a position deeper than the bottom of the element isolation insulating film. The substrate contact portion is in contact with the semiconductor substrate from a depth over a depth.Type: GrantFiled: March 20, 2017Date of Patent: March 12, 2019Assignee: Renesas Electronics CorporationInventors: Shigeo Tokumitsu, Hiroki Fujii
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Publication number: 20190067470Abstract: A semiconductor device which can secure a high breakdown voltage and to which a simplified manufacturing process is applicable and a method for manufacturing the semiconductor device are provided. An n+ buried region has a floating potential. An n-type body region is located on a first surface side of the n+ buried region. A p+ source region is located in the first surface and forms a p-n junction with the n-type body region. A p+ drain region is located in the first surface spacedly from the p+ source region. A p-type impurity region PIR is located between the n+ buried region and the n-type body region and isolates the n+ buried region and the n-type body region from each other.Type: ApplicationFiled: July 16, 2018Publication date: February 28, 2019Inventors: Hiroki FUJII, Atsushi SAKAI, Takahiro MORI
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Patent number: 10217862Abstract: A semiconductor device including an isolation insulating film having a first thickness that is located between a drain region and a source region; a gate electrode formed over a region located between the isolation insulating film and the source region and that includes a part serving as a channel; an interlayer insulating film formed so as to cover the gate electrode; and a contact plug formed to reach the inside of the isolation insulating film while penetrating the interlayer insulating film, wherein the contact plug includes a buried part that is formed from the surface of the isolation insulating film up to a depth corresponding to a second thickness thinner than the first thickness.Type: GrantFiled: December 11, 2017Date of Patent: February 26, 2019Assignee: Renesas Electronics CorporationInventors: Takahiro Mori, Hiroki Fujii
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Publication number: 20190004942Abstract: A storage device determines whether or not reading target data subjected to a first conversion process is divided and stored into multiple pages. When the data subjected to the first conversion process is stored in one of a plurality of pages, the data is read from the page, and a second conversion process for returning the data to a state before the data is subjected to the first conversion process is executed to the data. When the reading target data is divided and stored into two or more of the plurality of pages, a portion of the data is read from each of the two or more pages in which the portion of the data is stored, the portion of the data is stored in the buffer memory, the data subjected to the first conversion process is restored, and the second conversion process is executed to the restored data.Type: ApplicationFiled: January 21, 2016Publication date: January 3, 2019Inventors: Hiroki FUJII, Hideyuki KOSEKI, Atsushi KAWAMURA
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Publication number: 20180342577Abstract: A first comb portion of an n-type well region and a second comb portion of a p? drift region mesh with each other in plan view. A pn junction of the n-type well region and the p? drift region thus has a zigzag shape in plan view. The pn junction formed of the n-type well region and the p? drift region extends from a main surface toward a bottom surface of the isolation trench along a source-side wall surface of an isolation trench.Type: ApplicationFiled: May 4, 2018Publication date: November 29, 2018Applicant: Renesas Electronics CorporationInventors: Hiroki FUJII, Takahiro MORI
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Patent number: 10047641Abstract: An object is to provide a roller lifter which can maintain a proper dimensional accuracy of an outer diameter. A shaft (25) rotatably supporting a roller (30) is inserted through a pair of opposed portions (21) and swaged to be fixed. A cylindrical portion (61) is disposed to be fixed at a relative position to the opposed portions (21). Upon rotation of a cam (90), the cylindrical portion (61) is reciprocated via the roller (30). The roller lifter (10) includes a first member (20) in which the shaft (25) is swaged to be fixed to the opposed portions (21) and a second member (60) separate from the first member (20) and couplable via a coupling member to the first member (20). The second member (60) includes at least the cylindrical portion (61).Type: GrantFiled: May 13, 2015Date of Patent: August 14, 2018Assignee: OTICS CORPORATIONInventors: Hideki Oka, Hiroki Fujii, Naoyuki Yamane
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Publication number: 20180175192Abstract: A recessed portion is formed in a top surface of an isolation insulation film filling an isolation trench between a p+ source region and a p+ drain region. A p? drift region is located below the isolation trench and connected to the p+ drain region. A gate electrode fills the recessed portion. An n-type impurity region is located below the p? drift region and directly below the recessed portion.Type: ApplicationFiled: December 19, 2017Publication date: June 21, 2018Inventors: Hiroki FUJII, Takahiro MORI