Abstract: A field-effect transistor (142) includes a lowly p-doped region 110 formed on a surface of a substrate (102), an n-doped drain region 112 and n-doped source region 114 arranged on a surface of the lowly p-doped region 110, and a device isolation insulating film 132 and device isolation insulating film 134. Here, the device isolation insulating film 132 is formed greater in film thickness than the device isolation insulating film 134; and in the n-doped source region 114, the peak concentration section having a highest dopant concentration is formed in a deeper position than in the n-doped drain region 112.

Abstract: A device detects a battery capacity of a lithium ion rechargeable battery having at least one inflection point or more within a range of 10% to 90% of the SOC thereof. The inflection point indicates a change of a correlation between a battery voltage and the SOC of the battery. The device fetches a battery capacity corresponding to an inflection point from a capacity table, and sets the fetched battery-capacity as a first battery capacity when an inflection point detection section detects the inflection point. A current integration section integrates a current from the time to detect the inflection point to the time when the battery voltage detected by a voltage detection section reaches a full charging voltage. The integrated current is used as a second battery capacity. The device adds the first and second battery capacities, and uses the added result as a full charging capacity of the battery.

Abstract: The present invention relates to a polyolefin resin foam which includes a polyolefin resin composition includes: (A) a rubber and/or a thermoplastic elastomer; (B) a polyolefin resin; and (C) at least one aliphatic compound selected from an aliphatic acid, an aliphatic acid amide and an aliphatic acid metallic soap, the compound having a polar functional group and having a melting point of 50 to 150° C., in which a content of the aliphatic compound is 1 to 5 parts by weight based on 100 parts by weight of the total amount of the rubber and/or thermoplastic elastomer and the polyolefin resin. The polyolefin resin foam of the invention is excellent in flexibility and cushioning properties, and has good processability, especially excellent cutting processability.

Abstract: In an apparatus for controlling a secondary battery comprised of a plurality of cells connected in series, the apparatus includes a monitor configured to monitor an output voltage of each of the plurality of cells, and determine whether the output voltage of one of the plurality of cells reaches a preset full charge voltage. The apparatus includes a voltage equalizer configured to, when it is determined that the output voltage of one of the plurality of cells reaches the preset full charge voltage, perform a voltage equalizing task to match, with an output voltage of one specified cell in all the cells, the voltages of the remaining cells except for the one specified cell to equalize the output voltages of all the plurality of cells. The output voltage of the specified one cell is the lowest in the output voltages of all the cells.

Abstract: A lash adjuster includes a plunger inserted into a body and defining a pressure chamber in the body, and a spacer. The plunger is moved axially when a working fluid flows into or out of the pressure chamber so that a volume of the pressure chamber is increased or reduced. The plunger has a bottom wall defining the pressure chamber, a peripheral wall rising from an outer periphery of the bottom wall and an outer peripheral surface having an annular groove located at a height position confined in a thickness range of the bottom wall. When fitted in the groove, the spacer has a plate width equal to a separating distance between a groove bottom and an inner peripheral face of the body to fill a gap between the body and the plunger. The spacer has a flow path through which the working fluid introduced into the pressure chamber leaks.

Abstract: A sinker layer is in contact with a first conductivity-type well, and is separated from a first conductivity-type collector layer and a second conductivity-type drift layer. A second conductivity-type diffusion layer (second second-conductivity-type high-concentration diffusion layer) is formed in the surface layer of the sinker layer. The second conductivity-type diffusion layer has a higher impurity concentration than that of the sinker layer. The second conductivity-type diffusion layer and the first conductivity-type collector layer are isolated from each other with an element isolation insulating film interposed therebetween.

Abstract: In a fabrication method of a MgB2 superconducting tape and wire by filling a tube with a MgB2 superconducting powder and forming it into a tape or wire, a fabrication method of a MgB2 superconducting tape (and wire) which is characterized by using a MgB2 superconducting powder having a high critical current density (Jc) owing to its lowered crystallinity and having potential for excellent grain connectivity as the MgB2 superconducting powder. Provided are a fabrication method of a MgB2 superconducting tape and wire which can fabricate a MgB2 superconducting tape and wire having a level of Jc sufficiently high for practical applications and homogeneous quality throughout its length by an ex-situ process employing a material of the composition suitable for its working environment as the sheath material, and a MgB2 superconducting tape and wire thereby fabricated.

Abstract: A field-effect transistor (142) includes a lowly p-doped region 110 formed on a surface of a substrate (102), an n-doped drain region 112 and n-doped source region 114 arranged on a surface of the lowly p-doped region 110, and a device isolation insulating film 132 and device isolation insulating film 134. Here, the device isolation insulating film 132 is formed greater in film thickness than the device isolation insulating film 134; and in the n-doped source region 114, the peak concentration section having a highest dopant concentration is formed in a deeper position than in the n-doped drain region 112.

Abstract: A semiconductor device in which only the trigger voltage can be controlled without change in the hold voltage. In the semiconductor device, a protection device includes a lower doped collector layer, a sinker layer, a highly-doped collector layer, an emitter layer, a highly-doped base layer, a base layer, a first conductivity type layer, and a second conductivity type layer. The second conductivity type layer is formed in the lower doped collector layer and located between the base layer and first conductivity type layer. The second conductivity type layer has a higher impurity concentration than the lower doped collector layer.

Abstract: A cam housing 3 in accordance with the present invention includes: a body portion 4 that is provided separately from a cylinder head 1, supports a camshaft 2 for driving a valve 10 provided in the cylinder head 1, and is fixed to the cylinder head 1; a sub housing 20 that includes a mounting concavity 21 for mounting a lash adjuster 18 and is fixed to the body portion 4 with a mounting face 20A thereof forced against an outer face of the body portion 4, the mounting face 20A being different from the face wherein an opening of the mounting concavity 21 is provided; and an air vent 22 that penetrates the sub housing 20 between a wall surface thereof and the mounting face 20A thereof and thereby is provided in the sub housing 20, the wall configuring an inner space formed in the mounting concavity wherein the lash adjuster 18 is mounted.

Abstract: A field-effect transistor (142) includes a lowly p-doped region 110 formed on a surface of a substrate (102), an n-doped drain region 112 and n-doped source region 114 arranged on a surface of the lowly p-doped region 110, and a device isolation insulating film 132 and device isolation insulating film 134. Here, the device isolation insulating film 132 is formed greater in film thickness than the device isolation insulating film 134; and in the n-doped source region 114, the peak concentration section having a highest dopant concentration is formed in a deeper position than in the n-doped drain region 112.

Abstract: A method for manufacturing a semiconductor device including a vertical double-diffusedmetal-oxide-semiconductor (VDMOS) transistor includes preparing a semiconductor substrate and injecting a first impurity of a second conductivity type to a first region, injecting a second impurity to a second region that is located inside and is narrower than the first region, and forming an epitaxial layer on the semiconductor substrate and forming the semiconductor layer constituted by the semiconductor substrate and the epitaxial layer, and at a same time, diffusing the first and the second impurities injected in a first impurity injection and a second impurity injection to form a buried layer of the second conductivity type.

Abstract: A sinker layer is in contact with a first conductivity-type well, and is separated from a first conductivity-type collector layer and a second conductivity-type drift layer. A second conductivity-type diffusion layer (second second-conductivity-type high-concentration diffusion layer) is formed in the surface layer of the sinker layer. The second conductivity-type diffusion layer has a higher impurity concentration than that of the sinker layer. The second conductivity-type diffusion layer and the first conductivity-type collector layer are isolated from each other with an element isolation insulating film interposed therebetween.

Abstract: There is provided a semiconductor device including a field effect transistor. The field effect transistor includes a p-type low concentration region formed over a surface of a substrate, an n-type drain-side diffusion region and an n-type source-side diffusion region formed over a surface of the p-type low concentration region, an element isolation insulating layer, and another element isolation insulating layer. A p-type high concentration region, which has an impurity concentration higher than the impurity concentration of the p-type low concentration region, is formed below the n-type source-side diffusion region in the p-type low concentration region over a range at least from one end, which is opposite to the other end facing to the channel region, of the source-side diffusion region to one end, which is facing to the channel region, of the second element isolation insulating layer, when seen in a plan view.

Abstract: Provided is a frame-retardant resin foam which is highly expanded and is satisfactorily flexible so as to conform even to a minute clearance. The resin foam includes a resin and a flame-retardant component, in which the flame-retardant component is a polysiloxane-coated flame retarder. In the resin foam, the polysiloxane-coated flame retarder is preferably a polysiloxane-coated metal hydroxide, and the polysiloxane-coated metal hydroxide is contained preferably in a content of 30 to 60 percent by weight based on the total weight of the resin foam.

Abstract: Provided is a resin foam which is satisfactorily flexible and electrically conductive, can be easily processed into a desired shape, and is usable as an electrically conductive cushioning sealant capable of filling in a minute clearance between densely packaged electronic components. The resin foam has a volume resistivity of 1010 ?·cm or less and a repulsive load at 50% compression of 5 N/cm2 or less. The resin foam preferably has a surface resistivity of 1010 ohms per square or less, preferably has an apparent density of 0.01 to 0.15 g/cm3, and preferably has an expansion ratio of 9 times or more.

Abstract: A sealant for solar cell panel end is for sealing an end of a solar cell panel, and contains 100 parts by weight of polyisobutylene and/or butyl rubber, and 100 to 600 parts by weight of a metal hydroxide.

Abstract: An impurity buried layer constructed by two buried regions formed by impurities of identical type exist, a buried region formed by an impurity having a slow diffusion speed is provided on the entire surface of a transistor formation region, and a buried region formed by an impurity having a fast diffusion speed is provided inwardly from beneath the inside end of an isolation insulating film serving as a region on which an electric field concentrates partially.

Abstract: A method for manufacturing a semiconductor device including a vertical double-diffused metal-oxide-semiconductor (VDMOS) transistor includes preparing a semiconductor substrate and injecting a first impurity of a second conductivity type to a first region, injecting a second impurity to a second region that is located inside and is narrower than the first region, and forming an epitaxial layer on the semiconductor substrate and forming the semiconductor layer constituted by the semiconductor substrate and the epitaxial layer, and at a same time, diffusing the first and the second impurities injected in a first impurity injection and a second impurity injection to form a buried layer of the second conductivity type.

Abstract: A return spring is formed using a compression coil spring that is installed so that its axial direction is an up-down direction. The return spring is provided in a high-pressure chamber, and powers a plunger in an upwards direction. A coil diameter of the return spring varies along the axial direction. When the return spring is in a maximally compressed state, an axial direction dimension (up-down direction dimension) is smaller than a dimension that is a thickness of a spring wire multiplied by the number of coil turns. Hence, an overall height of a lash adjuster A can be reduced in comparison to when a return spring with a constant coil diameter over an entire length is used.