Patents by Inventor Hiroki Ohara

Hiroki Ohara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210298055
    Abstract: A radio node includes: a reception section that receives information used for initial access to another radio node in a first cell; and a control section that controls the initial access based on the information. The control section controls reception of the information based on a period equal to or longer than a period defined for a user terminal in a second cell with respect to transmission of the information.
    Type: Application
    Filed: August 7, 2018
    Publication date: September 23, 2021
    Applicant: NTT DOCOMO, INC.
    Inventors: Hiroki Harada, Tomoya Ohara
  • Patent number: 11129203
    Abstract: A user apparatus in a radio communication system that includes a base station and the user apparatus includes a reception unit that receives, from the base station, information that designates a signal waveform to be used by the user apparatus to transmit a random access preamble; and a transmission unit that transmits the random access preamble with the use of the signal waveform designated by the information received by the reception unit.
    Type: Grant
    Filed: March 23, 2017
    Date of Patent: September 21, 2021
    Assignee: NTT DOCOMO, INC.
    Inventors: Tomoya Ohara, Hiroki Harada
  • Publication number: 20210289557
    Abstract: A user apparatus in a radio communication system that includes a base station and the user apparatus includes a transmission unit that transmits a random access preamble with the use of a beam out of a plurality of beams; and a counter retaining unit that has, for each beam, a counter that indicates the number of times of power ramping performed in transmission of a random access preamble.
    Type: Application
    Filed: March 23, 2017
    Publication date: September 16, 2021
    Applicant: NTT DOCOMO, INC.
    Inventors: Tomoya Ohara, Hiroki Harada
  • Patent number: 11121204
    Abstract: Disclosed is a display device including: a substrate; a first insulating film over the substrate, the first insulating film exposing a part of the substrate to provide an exposed surface to the substrate; a second insulating film in contact with the exposed surface and a first side surface of the first insulating film; and a first wiring over the second insulating film and in contact with the exposed surface, the first insulating film, and the second insulating film. The display device may further possess a third insulating film spaced from the second insulating film and in contact with the exposed surface. The first insulating film has a second side surface opposing the first side surface through the exposed surface. The third insulating film may be in contact with the second side surface, and the wiring may be located over and in contact with the third insulating film.
    Type: Grant
    Filed: December 16, 2019
    Date of Patent: September 14, 2021
    Assignee: Japan Display Inc.
    Inventor: Hiroki Ohara
  • Patent number: 11122628
    Abstract: In one aspect of the present invention, a user equipment apparatus includes a reception unit configured to receive, from a base station, control information indicating a pattern of retransmission schemes to be applied depending on a retransmission count, for retransmitting a preamble through random access to the base station, the retransmission schemes including beam switching and power ramping; and a transmission unit configured to transmit the preamble according to the control information at timing of retransmitting the preamble.
    Type: Grant
    Filed: December 14, 2017
    Date of Patent: September 14, 2021
    Assignee: NTT DOCOMO, INC.
    Inventors: Tomoya Ohara, Hiroki Harada
  • Patent number: 11111061
    Abstract: A liquid storage bottle includes a nozzle which has an inlet through which a liquid is injected, a cylindrical cap which is mountable on the nozzle to open or close the inlet, a slit valve which is provided in the inlet and includes a plurality of slits intersecting each other, and a sealing unit which seals the inlet when the cap is mounted on the nozzle. The cap includes a protrusion which protrudes from a surface facing the inlet toward the slit valve when the cap is mounted on the nozzle, and a tip portion of the protrusion faces the slit valve at a position separated in a radial direction of the nozzle from an intersection of the plurality of slits in a state where the inlet is sealed by the sealing unit.
    Type: Grant
    Filed: March 23, 2020
    Date of Patent: September 7, 2021
    Assignee: Canon Kabushiki Kaisha
    Inventors: Noriyasu Nagai, Kenta Udagawa, Hiroshi Koshikawa, Hiroki Hayashi, Manabu Ohara, Shoki Takiguchi
  • Patent number: 11063236
    Abstract: There has been a problem that difference in refractive index between an opposite substrate or a moisture barrier layer provided thereover, and air is maintained large, and light extraction efficiency is low. Further, there has been a problem that peeling or cracking due to the moisture barrier layer is easily generated, which leads to deteriorate the reliability and lifetime of a light-emitting element. A light-emitting element comprises a pixel electrode, an electroluminescent layer, a transparent electrode, a passivation film, a stress relieving layer, and a low refractive index layer, all of which are stacked sequentially. The stress relieving layer serves to prevent peeling of the passivation film. The low refractive index layer serves to reduce reflectivity of light generated in the electroluminescent layer in emitting to air. Therefore, a light-emitting element with high reliability and long lifetime and a display device using the light-emitting element can be provided.
    Type: Grant
    Filed: March 30, 2017
    Date of Patent: July 13, 2021
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hisao Ikeda, Hiroki Ohara, Makoto Hosoba, Junichiro Sakata, Shunichi Ito
  • Publication number: 20210184171
    Abstract: The display device includes: a display area; a first peripheral area disposed outside the display area; a second peripheral area disposed outside the first peripheral area; an inner dam disposed in the first peripheral area; an outer dam disposed outside the inner dam in the first peripheral area; a resin part formed between the inner dam and the outer dam so as to be higher than the inner dam and the outer dam; and a sealing film disposed so as to overlap with the display area in a plan view. An outer edge of the sealing film overlaps with the resin part or the outer dam in a plan view.
    Type: Application
    Filed: February 26, 2021
    Publication date: June 17, 2021
    Applicant: Japan Display Inc.
    Inventor: Hiroki OHARA
  • Publication number: 20210159345
    Abstract: An oxide semiconductor film which has more stable electric conductivity is provided. The oxide semiconductor film comprises a crystalline region. The oxide semiconductor film has a first peak of electron diffraction intensity with a full width at half maximum of greater than or equal to 0.4 nm?1 and less than or equal to 0.7 nm?1 in a region where a magnitude of a scattering vector is greater than or equal to 3.3 nm?1 and less than or equal to 4.1 nm?1. The oxide semiconductor film has a second peak of electron diffraction intensity with a full width at half maximum of greater than or equal to 0.45 nm?1 and less than or equal to 1.4 nm?1 in a region where a magnitude of a scattering vector is greater than or equal to 5.5 nm?1 and less than or equal to 7.1 nm?1.
    Type: Application
    Filed: February 4, 2021
    Publication date: May 27, 2021
    Inventors: Shunpei YAMAZAKI, Masashi TSUBUKU, Kengo AKIMOTO, Hiroki OHARA, Tatsuya HONDA, Takatsugu OMATA, Yusuke NONAKA, Masahiro TAKAHASHI, Akiharu MIYANAGA
  • Publication number: 20210113517
    Abstract: An object of the present invention is to provide a novel composition for use in activating a sympathetic nerve. The present invention provides a composition for use in activating a sympathetic nerve, comprising a polyphenol as an active ingredient. The polyphenol comprises 25% by mass or more of monomeric to tetrameric polyphenols, and the monomeric to tetrameric polyphenols include at least catechin, epicatechin, procyanidin B2, procyanidin B5, procyanidin C1 and cinnamtannin A2.
    Type: Application
    Filed: November 28, 2017
    Publication date: April 22, 2021
    Inventors: Kazuji Tamura, Hiroki Ohara
  • Publication number: 20210098610
    Abstract: It is an object to provide a highly reliable semiconductor device which includes a thin film transistor having stable electric characteristics. It is another object to manufacture a highly reliable semiconductor device at lower cost with high productivity. In a method for manufacturing a semiconductor device which includes a thin film transistor where a semiconductor layer having a channel formation region, a source region, and a drain region are formed using an oxide semiconductor layer, heat treatment (heat treatment for dehydration or dehydrogenation) is performed so as to improve the purity of the oxide semiconductor layer and reduce impurities such as moisture. Moreover, the oxide semiconductor layer subjected to the heat treatment is slowly cooled under an oxygen atmosphere.
    Type: Application
    Filed: September 21, 2020
    Publication date: April 1, 2021
    Inventors: Toshinari SASAKI, Junichiro SAKATA, Hiroki OHARA, Shunpei YAMAZAKI
  • Publication number: 20210090900
    Abstract: A semiconductor device for high power application in which a novel semiconductor material having high mass productivity is provided. An oxide semiconductor film is formed, and then, first heat treatment is performed on the exposed oxide semiconductor film in order to reduce impurities such as moisture or hydrogen in the oxide semiconductor film. Next, in order to further reduce impurities such as moisture or hydrogen in the oxide semiconductor film, oxygen is added to the oxide semiconductor film by an ion implantation method, an ion doping method, or the like, and after that, second heat treatment is performed on the exposed oxide semiconductor film.
    Type: Application
    Filed: July 2, 2020
    Publication date: March 25, 2021
    Inventors: Shunpei YAMAZAKI, Junichiro SAKATA, Hiroki OHARA
  • Publication number: 20210066659
    Abstract: A display device in one embodiment according to the present invention includes a first region including a light emitting layer, a first nitride insulating layer over the light emitting layer, a first organic insulating layer over the first nitride insulating layer, a second nitride insulating layer over the first organic insulating layer, and a third nitride insulating layer over the second nitride insulating layer. The second nitride insulating layer is in contact with the first organic insulating layer and the third nitride insulating layer. An absolute value of a stress of the second nitride insulating layer is greater than or equal to an absolute value of a stress of the first nitride insulating layer and less than an absolute value of a stress of the third nitride insulating layer.
    Type: Application
    Filed: August 27, 2020
    Publication date: March 4, 2021
    Inventors: Hiroki OHARA, Akinori KAMIYA
  • Patent number: 10916663
    Abstract: An oxide semiconductor film which has more stable electric conductivity is provided. The oxide semiconductor film comprises a crystalline region. The oxide semiconductor film has a first peak of electron diffraction intensity with a full width at half maximum of greater than or equal to 0.4 nm?1 and less than or equal to 0.7 nm?1 in a region where a magnitude of a scattering vector is greater than or equal to 3.3 nm?1 and less than or equal to 4.1 nm?1. The oxide semiconductor film has a second peak of electron diffraction intensity with a full width at half maximum of greater than or equal to 0.45 nm?1 and less than or equal to 1.4 nm?1 in a region where a magnitude of a scattering vector is greater than or equal to 5.5 nm?1 and less than or equal to 7.1 nm?1.
    Type: Grant
    Filed: June 28, 2018
    Date of Patent: February 9, 2021
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Masashi Tsubuku, Kengo Akimoto, Hiroki Ohara, Tatsuya Honda, Takatsugu Omata, Yusuke Nonaka, Masahiro Takahashi, Akiharu Miyanaga
  • Publication number: 20200381459
    Abstract: An object is to provide a semiconductor device having a structure with which parasitic capacitance between wirings can be sufficiently reduced. An oxide insulating layer serving as a channel protective layer is formed over part of an oxide semiconductor layer overlapping with a gate electrode layer. In the same step as formation of the oxide insulating layer, an oxide insulating layer covering a peripheral portion of the oxide semiconductor layer is formed. The oxide insulating layer which covers the peripheral portion of the oxide semiconductor layer is provided to increase the distance between the gate electrode layer and a wiring layer formed above or in the periphery of the gate electrode layer, whereby parasitic capacitance is reduced.
    Type: Application
    Filed: August 20, 2020
    Publication date: December 3, 2020
    Inventors: Shunpei Yamazaki, Hiroki Ohara, Toshinari Sasaki, Kosei Noda, Hideaki Kuwabara
  • Patent number: 10854638
    Abstract: An object is to provide a semiconductor device having a structure with which parasitic capacitance between wirings can be sufficiently reduced. An oxide insulating layer serving as a channel protective layer is formed over part of an oxide semiconductor layer overlapping with a gate electrode layer. In the same step as formation of the oxide insulating layer, an oxide insulating layer covering a peripheral portion of the oxide semiconductor layer is formed. The oxide insulating layer which covers the peripheral portion of the oxide semiconductor layer is provided to increase the distance between the gate electrode layer and a wiring layer formed above or in the periphery of the gate electrode layer, whereby parasitic capacitance is reduced.
    Type: Grant
    Filed: August 21, 2019
    Date of Patent: December 1, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hiroki Ohara, Toshinari Sasaki, Kosei Noda, Hideaki Kuwabara
  • Patent number: 10847655
    Abstract: A semiconductor device includes an oxide semiconductor layer above an insulating surface, a source electrode in contact with a side surface of the oxide semiconductor layer, a drain electrode in contact with a side surface of the oxide semiconductor layer, a gate insulating film above the oxide semiconductor layer, the source electrode, and the drain electrode, and, a gate electrode overlapping with the oxide semiconductor layer interposed by the gate insulating film. The gate electrode is arranged above and outside of the source electrode and the drain electrode.
    Type: Grant
    Filed: August 9, 2019
    Date of Patent: November 24, 2020
    Assignee: Japan Display Inc.
    Inventor: Hiroki Ohara
  • Patent number: 10833133
    Abstract: A display device includes a sealing film covering a display region where an image is displayed, a touch sensor layer configured to detect a touched position of the display region, the touch sensor layer including a first electrode layer that is arranged on the sealing film, a first insulating layer that is formed on the first electrode layer using a material including nitrogen, and a second electrode layer that is arranged over the first insulating layer, an overcoat covering the touch sensor layer, and a polarizing plate being arranged on the overcoat. The touch sensor layer further includes a second insulating layer configured to inhibit a reaction between nitrogen included in the first insulating layer and water included in the overcoat, the second insulating layer being formed between the first insulating layer and the overcoat using a material not including nitrogen.
    Type: Grant
    Filed: October 15, 2019
    Date of Patent: November 10, 2020
    Assignee: Japan Display Inc.
    Inventors: Hiroki Ohara, Akinori Kamiya, Hiraaki Kokame
  • Patent number: 10796908
    Abstract: An object is to provide a high reliable semiconductor device including a thin film transistor having stable electric characteristics. In a method for manufacturing a semiconductor device including a thin film transistor in which an oxide semiconductor film is used for a semiconductor layer including a channel formation region, heat treatment (which is for dehydration or dehydrogenation) is performed so as to improve the purity of the oxide semiconductor film and reduce impurities such as moisture. Besides impurities such as moisture existing in the oxide semiconductor film, heat treatment causes reduction of impurities such as moisture existing in the gate insulating layer and those in interfaces between the oxide semiconductor film and films which are provided over and below the oxide semiconductor film and are in contact with the oxide semiconductor film.
    Type: Grant
    Filed: August 23, 2018
    Date of Patent: October 6, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Toshinari Sasaki, Junichiro Sakata, Hiroki Ohara, Shunpei Yamazaki
  • Patent number: 10790383
    Abstract: It is an object to provide a highly reliable semiconductor device which includes a thin film transistor having stable electric characteristics. It is another object to manufacture a highly reliable semiconductor device at lower cost with high productivity. In a method for manufacturing a semiconductor device which includes a thin film transistor where a semiconductor layer having a channel formation region, a source region, and a drain region are formed using an oxide semiconductor layer, heat treatment (heat treatment for dehydration or dehydrogenation) is performed so as to improve the purity of the oxide semiconductor layer and reduce impurities such as moisture. Moreover, the oxide semiconductor layer subjected to the heat treatment is slowly cooled under an oxygen atmosphere.
    Type: Grant
    Filed: April 16, 2019
    Date of Patent: September 29, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Toshinari Sasaki, Junichiro Sakata, Hiroki Ohara, Shunpei Yamazaki