Patents by Inventor Hiroki Ohara
Hiroki Ohara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20210113517Abstract: An object of the present invention is to provide a novel composition for use in activating a sympathetic nerve. The present invention provides a composition for use in activating a sympathetic nerve, comprising a polyphenol as an active ingredient. The polyphenol comprises 25% by mass or more of monomeric to tetrameric polyphenols, and the monomeric to tetrameric polyphenols include at least catechin, epicatechin, procyanidin B2, procyanidin B5, procyanidin C1 and cinnamtannin A2.Type: ApplicationFiled: November 28, 2017Publication date: April 22, 2021Inventors: Kazuji Tamura, Hiroki Ohara
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Publication number: 20210098610Abstract: It is an object to provide a highly reliable semiconductor device which includes a thin film transistor having stable electric characteristics. It is another object to manufacture a highly reliable semiconductor device at lower cost with high productivity. In a method for manufacturing a semiconductor device which includes a thin film transistor where a semiconductor layer having a channel formation region, a source region, and a drain region are formed using an oxide semiconductor layer, heat treatment (heat treatment for dehydration or dehydrogenation) is performed so as to improve the purity of the oxide semiconductor layer and reduce impurities such as moisture. Moreover, the oxide semiconductor layer subjected to the heat treatment is slowly cooled under an oxygen atmosphere.Type: ApplicationFiled: September 21, 2020Publication date: April 1, 2021Inventors: Toshinari SASAKI, Junichiro SAKATA, Hiroki OHARA, Shunpei YAMAZAKI
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Publication number: 20210090900Abstract: A semiconductor device for high power application in which a novel semiconductor material having high mass productivity is provided. An oxide semiconductor film is formed, and then, first heat treatment is performed on the exposed oxide semiconductor film in order to reduce impurities such as moisture or hydrogen in the oxide semiconductor film. Next, in order to further reduce impurities such as moisture or hydrogen in the oxide semiconductor film, oxygen is added to the oxide semiconductor film by an ion implantation method, an ion doping method, or the like, and after that, second heat treatment is performed on the exposed oxide semiconductor film.Type: ApplicationFiled: July 2, 2020Publication date: March 25, 2021Inventors: Shunpei YAMAZAKI, Junichiro SAKATA, Hiroki OHARA
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Publication number: 20210066659Abstract: A display device in one embodiment according to the present invention includes a first region including a light emitting layer, a first nitride insulating layer over the light emitting layer, a first organic insulating layer over the first nitride insulating layer, a second nitride insulating layer over the first organic insulating layer, and a third nitride insulating layer over the second nitride insulating layer. The second nitride insulating layer is in contact with the first organic insulating layer and the third nitride insulating layer. An absolute value of a stress of the second nitride insulating layer is greater than or equal to an absolute value of a stress of the first nitride insulating layer and less than an absolute value of a stress of the third nitride insulating layer.Type: ApplicationFiled: August 27, 2020Publication date: March 4, 2021Inventors: Hiroki OHARA, Akinori KAMIYA
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Patent number: 10916663Abstract: An oxide semiconductor film which has more stable electric conductivity is provided. The oxide semiconductor film comprises a crystalline region. The oxide semiconductor film has a first peak of electron diffraction intensity with a full width at half maximum of greater than or equal to 0.4 nm?1 and less than or equal to 0.7 nm?1 in a region where a magnitude of a scattering vector is greater than or equal to 3.3 nm?1 and less than or equal to 4.1 nm?1. The oxide semiconductor film has a second peak of electron diffraction intensity with a full width at half maximum of greater than or equal to 0.45 nm?1 and less than or equal to 1.4 nm?1 in a region where a magnitude of a scattering vector is greater than or equal to 5.5 nm?1 and less than or equal to 7.1 nm?1.Type: GrantFiled: June 28, 2018Date of Patent: February 9, 2021Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Masashi Tsubuku, Kengo Akimoto, Hiroki Ohara, Tatsuya Honda, Takatsugu Omata, Yusuke Nonaka, Masahiro Takahashi, Akiharu Miyanaga
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Publication number: 20200381459Abstract: An object is to provide a semiconductor device having a structure with which parasitic capacitance between wirings can be sufficiently reduced. An oxide insulating layer serving as a channel protective layer is formed over part of an oxide semiconductor layer overlapping with a gate electrode layer. In the same step as formation of the oxide insulating layer, an oxide insulating layer covering a peripheral portion of the oxide semiconductor layer is formed. The oxide insulating layer which covers the peripheral portion of the oxide semiconductor layer is provided to increase the distance between the gate electrode layer and a wiring layer formed above or in the periphery of the gate electrode layer, whereby parasitic capacitance is reduced.Type: ApplicationFiled: August 20, 2020Publication date: December 3, 2020Inventors: Shunpei Yamazaki, Hiroki Ohara, Toshinari Sasaki, Kosei Noda, Hideaki Kuwabara
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Patent number: 10854638Abstract: An object is to provide a semiconductor device having a structure with which parasitic capacitance between wirings can be sufficiently reduced. An oxide insulating layer serving as a channel protective layer is formed over part of an oxide semiconductor layer overlapping with a gate electrode layer. In the same step as formation of the oxide insulating layer, an oxide insulating layer covering a peripheral portion of the oxide semiconductor layer is formed. The oxide insulating layer which covers the peripheral portion of the oxide semiconductor layer is provided to increase the distance between the gate electrode layer and a wiring layer formed above or in the periphery of the gate electrode layer, whereby parasitic capacitance is reduced.Type: GrantFiled: August 21, 2019Date of Patent: December 1, 2020Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Hiroki Ohara, Toshinari Sasaki, Kosei Noda, Hideaki Kuwabara
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Patent number: 10847655Abstract: A semiconductor device includes an oxide semiconductor layer above an insulating surface, a source electrode in contact with a side surface of the oxide semiconductor layer, a drain electrode in contact with a side surface of the oxide semiconductor layer, a gate insulating film above the oxide semiconductor layer, the source electrode, and the drain electrode, and, a gate electrode overlapping with the oxide semiconductor layer interposed by the gate insulating film. The gate electrode is arranged above and outside of the source electrode and the drain electrode.Type: GrantFiled: August 9, 2019Date of Patent: November 24, 2020Assignee: Japan Display Inc.Inventor: Hiroki Ohara
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Patent number: 10833133Abstract: A display device includes a sealing film covering a display region where an image is displayed, a touch sensor layer configured to detect a touched position of the display region, the touch sensor layer including a first electrode layer that is arranged on the sealing film, a first insulating layer that is formed on the first electrode layer using a material including nitrogen, and a second electrode layer that is arranged over the first insulating layer, an overcoat covering the touch sensor layer, and a polarizing plate being arranged on the overcoat. The touch sensor layer further includes a second insulating layer configured to inhibit a reaction between nitrogen included in the first insulating layer and water included in the overcoat, the second insulating layer being formed between the first insulating layer and the overcoat using a material not including nitrogen.Type: GrantFiled: October 15, 2019Date of Patent: November 10, 2020Assignee: Japan Display Inc.Inventors: Hiroki Ohara, Akinori Kamiya, Hiraaki Kokame
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Patent number: 10796908Abstract: An object is to provide a high reliable semiconductor device including a thin film transistor having stable electric characteristics. In a method for manufacturing a semiconductor device including a thin film transistor in which an oxide semiconductor film is used for a semiconductor layer including a channel formation region, heat treatment (which is for dehydration or dehydrogenation) is performed so as to improve the purity of the oxide semiconductor film and reduce impurities such as moisture. Besides impurities such as moisture existing in the oxide semiconductor film, heat treatment causes reduction of impurities such as moisture existing in the gate insulating layer and those in interfaces between the oxide semiconductor film and films which are provided over and below the oxide semiconductor film and are in contact with the oxide semiconductor film.Type: GrantFiled: August 23, 2018Date of Patent: October 6, 2020Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Toshinari Sasaki, Junichiro Sakata, Hiroki Ohara, Shunpei Yamazaki
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Patent number: 10790383Abstract: It is an object to provide a highly reliable semiconductor device which includes a thin film transistor having stable electric characteristics. It is another object to manufacture a highly reliable semiconductor device at lower cost with high productivity. In a method for manufacturing a semiconductor device which includes a thin film transistor where a semiconductor layer having a channel formation region, a source region, and a drain region are formed using an oxide semiconductor layer, heat treatment (heat treatment for dehydration or dehydrogenation) is performed so as to improve the purity of the oxide semiconductor layer and reduce impurities such as moisture. Moreover, the oxide semiconductor layer subjected to the heat treatment is slowly cooled under an oxygen atmosphere.Type: GrantFiled: April 16, 2019Date of Patent: September 29, 2020Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Toshinari Sasaki, Junichiro Sakata, Hiroki Ohara, Shunpei Yamazaki
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Patent number: 10784465Abstract: There has been a problem that difference in refractive index between an opposite substrate or a moisture barrier layer provided thereover, and air is maintained large, and light extraction efficiency is low. Further, there has been a problem that peeling or cracking due to the moisture barrier layer is easily generated, which leads to deteriorate the reliability and lifetime of a light-emitting element. A light-emitting element includes a pixel electrode, an electroluminescent layer, a transparent electrode, a passivation film, a stress relieving layer, and a low refractive index layer, all of which are stacked sequentially. The stress relieving layer serves to prevent peeling of the passivation film. The low refractive index layer serves to reduce reflectivity of light generated in the electroluminescent layer in emitting to air. Therefore, a light-emitting element with high reliability and long lifetime and a display device using the light-emitting element can be provided.Type: GrantFiled: July 10, 2018Date of Patent: September 22, 2020Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hisao Ikeda, Hiroki Ohara, Makoto Hosoba, Junichiro Sakata, Shunichi Ito
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Publication number: 20200227682Abstract: A display device includes a first substrate, a display region with pixels each including a light emitting element above the first substrate, a first inorganic insulating layer covering the display region, a first organic insulating layer on the first inorganic insulating layer, a second inorganic insulating layer on the first organic insulating layer, a second organic insulating layer on the second inorganic insulating layer, a third organic insulating layer a on the second organic insulating layer, acidity of the third organic insulating layer being stronger than acidity of the second organic insulating layer, and a polarizing plate arranged on the third organic insulating layer.Type: ApplicationFiled: January 6, 2020Publication date: July 16, 2020Inventor: Hiroki OHARA
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Publication number: 20200227679Abstract: A display device includes a first substrate, a display region arranged with a pixel including a light emitting element above the first substrate, a first inorganic insulating layer covering the display region, an organic insulating layer arranged above the first inorganic insulating layer, a second inorganic insulating layer arranged above the organic insulating layer and having a N—H bond total weight measured by an FT-IR method lower than a N—H bond total weight per unit [8% area] of the first inorganic insulating layer, and a polarizing plate arranged above the second inorganic insulating layer.Type: ApplicationFiled: January 8, 2020Publication date: July 16, 2020Inventors: Hiroki OHARA, Akinori KAMIYA
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Patent number: 10714358Abstract: A semiconductor device for high power application in which a novel semiconductor material having high mass productivity is provided. An oxide semiconductor film is formed, and then, first heat treatment is performed on the exposed oxide semiconductor film in order to reduce impurities such as moisture or hydrogen in the oxide semiconductor film. Next, in order to further reduce impurities such as moisture or hydrogen in the oxide semiconductor film, oxygen is added to the oxide semiconductor film by an ion implantation method, an ion doping method, or the like, and after that, second heat treatment is performed on the exposed oxide semiconductor film.Type: GrantFiled: November 21, 2019Date of Patent: July 14, 2020Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Junichiro Sakata, Hiroki Ohara
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Publication number: 20200203467Abstract: A display device includes a substrate; an insulating layer in contact with a first surface of the substrate; a display region with a plurality of pixels each including a transistor and a display element on the insulating layer; a terminal region in a region outside the display region over the insulating layer; a wiring between the display region and the terminal region; and a resin film on the substrate. The insulating layer includes an opening in a region between the display region and the terminal region. The resin film is in contact with the first surface in the opening. The wiring is in contact with an upper surface of the resin film through the opening. A surface roughness of the resin film in the opening is larger than a surface roughness of the substrate at a region where the substrate is in contact with the insulating layer.Type: ApplicationFiled: March 6, 2020Publication date: June 25, 2020Inventor: Hiroki OHARA
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Patent number: 10665453Abstract: An object is to provide a high reliable semiconductor device including a thin film transistor having stable electric characteristics. In a method for manufacturing a semiconductor device including a thin film transistor in which an oxide semiconductor film is used for a semiconductor layer including a channel formation region, heat treatment (which is for dehydration or dehydrogenation) is performed so as to improve the purity of the oxide semiconductor film and reduce impurities such as moisture. Besides impurities such as moisture existing in the oxide semiconductor film, heat treatment causes reduction of impurities such as moisture existing in the gate insulating layer and those in interfaces between the oxide semiconductor film and films which are provided over and below the oxide semiconductor film and are in contact with the oxide semiconductor film.Type: GrantFiled: August 23, 2018Date of Patent: May 26, 2020Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Toshinari Sasaki, Junichiro Sakata, Hiroki Ohara, Shunpei Yamazaki
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Publication number: 20200144353Abstract: Disclosed is a display device including: a first conductive film over and in contact with a substrate; a first undercoat and a second undercoat over and in contact with the first conductive film; a pixel over the first undercoat; a wiring over the first undercoat, the first conductive film, and the second undercoat and in contact with the first conductive film between the first undercoat and the second undercoat. The first undercoat and the second undercoat are spaced from each other over the first conductive film and each cover a part of the first conductive film. The wiring is configured to form a terminal to which a signal for driving the pixel is input over the second undercoat.Type: ApplicationFiled: December 27, 2019Publication date: May 7, 2020Inventors: Hiroki OHARA, Satoshi MARUYAMA
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Publication number: 20200135812Abstract: A display device includes a sealing film covering a display region where an image is displayed, a touch sensor layer configured to detect a touched position of the display region, the touch sensor layer including a first electrode layer that is arranged on the sealing film, a first insulating layer that is formed on the first electrode layer using a material including nitrogen, and a second electrode layer that is arranged over the first insulating layer, an overcoat covering the touch sensor layer, and a polarizing plate being arranged on the overcoat. The touch sensor layer further includes a second insulating layer configured to inhibit a reaction between nitrogen included in the first insulating layer and water included in the overcoat, the second insulating layer being formed between the first insulating layer and the overcoat using a material not including nitrogen.Type: ApplicationFiled: October 15, 2019Publication date: April 30, 2020Applicant: Japan Display Inc.Inventors: Hiroki OHARA, Akinori KAMIYA, Hiraaki KOKAME
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Publication number: 20200119131Abstract: Disclosed is a display device including: a substrate; a first insulating film over the substrate, the first insulating film exposing a part of the substrate to provide an exposed surface to the substrate; a second insulating film in contact with the exposed surface and a first side surface of the first insulating film; and a first wiring over the second insulating film and in contact with the exposed surface, the first insulating film, and the second insulating film. The display device may further possess a third insulating film spaced from the second insulating film and in contact with the exposed surface. The first insulating film has a second side surface opposing the first side surface through the exposed surface. The third insulating film may be in contact with the second side surface, and the wiring may be located over and in contact with the third insulating film.Type: ApplicationFiled: December 16, 2019Publication date: April 16, 2020Inventor: Hiroki OHARA