Patents by Inventor Hiroki Ohara

Hiroki Ohara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150228667
    Abstract: An object is to manufacture and provide a highly reliable semiconductor device including a thin film transistor with stable electric characteristics. In a method for manufacturing a semiconductor device including a thin film transistor in which a semiconductor layer including a channel formation region serves as an oxide semiconductor film, heat treatment for reducing impurities such as moisture (heat treatment for dehydration or dehydrogenation) is performed after an oxide insulating film serving as a protective film is formed in contact with an oxide semiconductor layer. Then, the impurities such as moisture, which exist not only in a source electrode layer, in a drain electrode layer, in a gate insulating layer, and in the oxide semiconductor layer but also at interfaces between the oxide semiconductor film and upper and lower films which are in contact with the oxide semiconductor layer, are reduced.
    Type: Application
    Filed: April 21, 2015
    Publication date: August 13, 2015
    Inventors: Shunpei YAMAZAKI, Hiroki OHARA, Junichiro SAKATA, Toshinari SASAKI, Miyuki HOSOBA
  • Patent number: 9105855
    Abstract: There has been a problem that difference in refractive index between an opposite substrate or a moisture barrier layer provided thereover, and air is maintained large, and light extraction efficiency is low. Further, there has been a problem that peeling or cracking due to the moisture barrier layer is easily generated, which leads to deteriorate the reliability and lifetime of a light-emitting element. A light-emitting element comprises a pixel electrode, an electroluminescent layer, a transparent electrode, a passivation film, a stress relieving layer, and a low refractive index layer, all of which are stacked sequentially. The stress relieving layer serves to prevent peeling of the passivation film. The low refractive index layer serves to reduce reflectivity of light generated in the electroluminescent layer in emitting to air. Therefore, a light-emitting element with high reliability and long lifetime and a display device using the light-emitting element can be provided.
    Type: Grant
    Filed: August 15, 2014
    Date of Patent: August 11, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hisao Ikeda, Hiroki Ohara, Makoto Hosoba, Junichiro Sakata, Shunichi Ito
  • Patent number: 9093262
    Abstract: An object is to provide a semiconductor device having stable electric characteristics in which an oxide semiconductor is used. An oxide semiconductor layer is subjected to heat treatment for dehydration or dehydrogenation treatment in a nitrogen gas or an inert gas atmosphere such as a rare gas (e.g., argon or helium) or under reduced pressure and to a cooling step for treatment for supplying oxygen in an atmosphere of oxygen, an atmosphere of oxygen and nitrogen, or the air (having a dew point of preferably lower than or equal to ?40° C., still preferably lower than or equal to ?50° C.) atmosphere. The oxide semiconductor layer is thus highly purified, whereby an i-type oxide semiconductor layer is formed. A semiconductor device including a thin film transistor having the oxide semiconductor layer is manufactured.
    Type: Grant
    Filed: November 19, 2013
    Date of Patent: July 28, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Miyuki Hosoba, Junichiro Sakata, Hiroki Ohara, Shunpei Yamazaki
  • Publication number: 20150194509
    Abstract: An object is to provide a semiconductor device including a semiconductor element which has favorable characteristics. A manufacturing method of the present invention includes the steps of: forming a first conductive layer which functions as a gate electrode over a substrate; forming a first insulating layer to cover the first conductive layer; forming a semiconductor layer over the first insulating layer so that part of the semiconductor layer overlaps with the first conductive layer; forming a second conductive layer to be electrically connected to the semiconductor layer; forming a second insulating layer to cover the semiconductor layer and the second conductive layer; forming a third conductive layer to be electrically connected to the second conductive layer; performing first heat treatment after forming the semiconductor layer and before forming the second insulating layer; and performing second heat treatment after forming the second insulating layer.
    Type: Application
    Filed: March 24, 2015
    Publication date: July 9, 2015
    Inventors: Hiroki OHARA, Toshinari SASAKI
  • Publication number: 20150179805
    Abstract: An oxide semiconductor film which has more stable electric conductivity is provided. The oxide semiconductor film comprises a crystalline region. The oxide semiconductor film has a first peak of electron diffraction intensity with a full width at half maximum of greater than or equal to 0.4 nm?1 and less than or equal to 0.7 nm?1 in a region where a magnitude of a scattering vector is greater than or equal to 3.3 nm?1 and less than or equal to 4.1 nm?1. The oxide semiconductor film has a second peak of electron diffraction intensity with a full width at half maximum of greater than or equal to 0.45 nm?1 and less than or equal to 1.4 nm?1 in a region where a magnitude of a scattering vector is greater than or equal to 5.5 nm?1 and less than or equal to 7.1 nm?1.
    Type: Application
    Filed: March 2, 2015
    Publication date: June 25, 2015
    Inventors: Shunpei YAMAZAKI, Masashi TSUBUKU, Kengo AKIMOTO, Hiroki OHARA, Tatsuya HONDA, Takatsugu OMATA, Yusuke NONAKA, Masahiro TAKAHASHI, Akiharu MIYANAGA
  • Patent number: 9059298
    Abstract: An object is to provide a semiconductor device having a structure with which parasitic capacitance between wirings can be sufficiently reduced. An oxide insulating layer serving as a channel protective layer is formed over part of an oxide semiconductor layer overlapping with a gate electrode layer. In the same step as formation of the oxide insulating layer, an oxide insulating layer covering a peripheral portion of the oxide semiconductor layer is formed. The oxide insulating layer which covers the peripheral portion of the oxide semiconductor layer is provided to increase the distance between the gate electrode layer and a wiring layer formed above or in the periphery of the gate electrode layer, whereby parasitic capacitance is reduced.
    Type: Grant
    Filed: August 29, 2014
    Date of Patent: June 16, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hiroki Ohara, Toshinari Sasaki, Kosei Noda, Hideaki Kuwabara
  • Patent number: 9054137
    Abstract: An object is to manufacture a highly reliable semiconductor device including a thin film transistor with stable electric characteristics. In a method for manufacturing a semiconductor device including a thin film transistor in which an oxide semiconductor film is used for a semiconductor layer including a channel formation region, heat treatment (for dehydration or dehydrogenation) is performed to improve the purity of the oxide semiconductor film and reduce impurities including moisture or the like. After that, slow cooling is performed under an oxygen atmosphere. Besides impurities including moisture or the like exiting in the oxide semiconductor film, heat treatment causes reduction of impurities including moisture or the like exiting in a gate insulating layer and those in interfaces between the oxide semiconductor film and films which are provided over and below the oxide semiconductor and in contact therewith.
    Type: Grant
    Filed: December 30, 2013
    Date of Patent: June 9, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Toshinari Sasaki, Junichiro Sakata, Hiroki Ohara, Shunpei Yamazaki
  • Patent number: 9054205
    Abstract: A semiconductor device having a novel structure or a method for manufacturing the semiconductor device is provided. For example, the reliability of a transistor which is driven at high voltage or large current is improved. For improvement of the reliability of the transistor, a buffer layer is provided between a drain electrode layer (or a source electrode layer) and an oxide semiconductor layer such that the end portion of the buffer layer is beyond the side surface of the drain electrode layer (or the source electrode layer) when seen in a cross section, whereby the buffer layer can relieve the concentration of electric field. The buffer layer is a single layer or a stacked layer including a plurality of layers, and includes, for example, an In—Ga—Zn—O film containing nitrogen, an In—Sn—O film containing nitrogen, an In—Sn—O film containing SiOx, or the like.
    Type: Grant
    Filed: October 28, 2013
    Date of Patent: June 9, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Yusuke Nonaka, Takatsugu Omata, Tatsuya Honda, Akiharu Miyanaga, Hiroki Ohara
  • Publication number: 20150155373
    Abstract: A semiconductor device for high power application in which a novel semiconductor material having high mass productivity is provided. An oxide semiconductor film is formed, and then, first heat treatment is performed on the exposed oxide semiconductor film in order to reduce impurities such as moisture or hydrogen in the oxide semiconductor film. Next, in order to further reduce impurities such as moisture or hydrogen in the oxide semiconductor film, oxygen is added to the oxide semiconductor film by an ion implantation method, an ion doping method, or the like, and after that, second heat treatment is performed on the exposed oxide semiconductor film.
    Type: Application
    Filed: January 30, 2015
    Publication date: June 4, 2015
    Inventors: Shunpei YAMAZAKI, Junichiro SAKATA, Hiroki OHARA
  • Publication number: 20150144916
    Abstract: The present invention is a method of manufacturing an organic EL display device including a display part arranged with a plurality of pixels including an organic EL light emitting layer, and a terminal part arranged with a plurality of terminals each connected to the organic EL light emitting layer respectively, the method comprising forming a TFT drive circuit layer controlling the organic EL light emitting layer and forming the plurality of terminals connected to the TFT drive circuit layer on a first substrate; forming the organic EL light emitting layer connected to the TFT drive circuit layer over the TFT drive circuit layer; forming a sealing film over the organic EL light emitting layer; adhering a second substrate covering the display part in a position corresponding to the first substrate; forming a touch panel sensor substrate and an electrode layer over the second substrate; and exposing the plurality of terminals by etching a part of the sealing film.
    Type: Application
    Filed: November 20, 2014
    Publication date: May 28, 2015
    Inventors: Hiroki OHARA, Toshihiro SATO
  • Patent number: 9040985
    Abstract: An object is to provide a semiconductor device including a thin film transistor which includes an oxide semiconductor layer and has high electric characteristics. An oxide semiconductor layer including SiOx is used in a channel formation region, and in order to reduce contact resistance with source and drain electrode layers formed using a metal material with low electric resistance, source and drain regions are provided between the source and drain electrode layers and the oxide semiconductor layer including SiOx. The source and drain regions are formed using an oxide semiconductor layer which does not include SiOx or an oxynitiride film.
    Type: Grant
    Filed: July 15, 2014
    Date of Patent: May 26, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Junichiro Sakata, Takashi Shimazu, Hiroki Ohara, Toshinari Sasaki, Shunpei Yamazaki
  • Patent number: 9024313
    Abstract: One object is to provide a semiconductor device with a structure which enables reduction in parasitic capacitance sufficiently between wirings. In a bottom-gate type thin film transistor including a stacked layer of a first layer which is a metal thin film oxidized partly or entirely and an oxide semiconductor layer, the following oxide insulating layers are formed together: an oxide insulating layer serving as a channel protective layer which is over and in contact with a part of the oxide semiconductor layer overlapping with a gate electrode layer; and an oxide insulating layer which covers a peripheral portion and a side surface of the stacked oxide semiconductor layer.
    Type: Grant
    Filed: April 11, 2013
    Date of Patent: May 5, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Junichiro Sakata, Hiroki Ohara, Hideaki Kuwabara
  • Patent number: 9024314
    Abstract: An object is to manufacture and provide a highly reliable semiconductor device including a thin film transistor with stable electric characteristics. In a method for manufacturing a semiconductor device including a thin film transistor in which a semiconductor layer including a channel formation region serves as an oxide semiconductor film, heat treatment for reducing impurities such as moisture (heat treatment for dehydration or dehydrogenation) is performed after an oxide insulating film serving as a protective film is formed in contact with an oxide semiconductor layer. Then, the impurities such as moisture, which exist not only in a source electrode layer, in a drain electrode layer, in a gate insulating layer, and in the oxide semiconductor layer but also at interfaces between the oxide semiconductor film and upper and lower films which are in contact with the oxide semiconductor layer, are reduced.
    Type: Grant
    Filed: August 19, 2013
    Date of Patent: May 5, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hiroki Ohara, Junichiro Sakata, Toshinari Sasaki, Miyuki Hosoba
  • Patent number: 8993386
    Abstract: An object is to provide a semiconductor device including a semiconductor element which has favorable characteristics. A manufacturing method of the present invention includes the steps of: forming a first conductive layer which functions as a gate electrode over a substrate; forming a first insulating layer to cover the first conductive layer; forming a semiconductor layer over the first insulating layer so that part of the semiconductor layer overlaps with the first conductive layer; forming a second conductive layer to be electrically connected to the semiconductor layer; forming a second insulating layer to cover the semiconductor layer and the second conductive layer; forming a third conductive layer to be electrically connected to the second conductive layer; performing first heat treatment after forming the semiconductor layer and before forming the second insulating layer; and performing second heat treatment after forming the second insulating layer.
    Type: Grant
    Filed: March 9, 2010
    Date of Patent: March 31, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hiroki Ohara, Toshinari Sasaki
  • Patent number: 8994021
    Abstract: An oxide semiconductor film which has more stable electric conductivity is provided. The oxide semiconductor film comprises a crystalline region. The oxide semiconductor film has a first peak of electron diffraction intensity with a full width at half maximum of greater than or equal to 0.4 nm?1 and less than or equal to 0.7 nm?1 in a region where a magnitude of a scattering vector is greater than or equal to 3.3 nm?1 and less than or equal to 4.1 nm?1. The oxide semiconductor film has a second peak of electron diffraction intensity with a full width at half maximum of greater than or equal to 0.45 nm?1 and less than or equal to 1.4 nm?1 in a region where a magnitude of a scattering vector is greater than or equal to 5.5 nm?1 and less than or equal to 7.1 nm?1.
    Type: Grant
    Filed: March 6, 2014
    Date of Patent: March 31, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Masashi Tsubuku, Kengo Akimoto, Hiroki Ohara, Tatsuya Honda, Takatsugu Omata, Yusuke Nonaka, Masahiro Takahashi, Akiharu Miyanaga
  • Publication number: 20150072470
    Abstract: A highly reliable semiconductor device which includes a thin film transistor having stable electric characteristics, and a manufacturing method thereof. In the manufacturing method of the semiconductor device which includes a thin film transistor where a semiconductor layer including a channel formation region is an oxide semiconductor layer, heat treatment which reduces impurities such as moisture to improve the purity of the oxide semiconductor layer and oxidize the oxide semiconductor layer (heat treatment for dehydration or dehydrogenation) is performed. Not only impurities such as moisture in the oxide semiconductor layer but also those existing in a gate insulating layer are reduced, and impurities such as moisture existing in interfaces between the oxide semiconductor layer and films provided over and under and in contact with the oxide semiconductor layer are reduced.
    Type: Application
    Filed: November 13, 2014
    Publication date: March 12, 2015
    Inventors: Shunpei YAMAZAKI, Miyuki HOSOBA, Kosei NODA, Hiroki OHARA, Toshinari SASAKI, Junichiro SAKATA
  • Patent number: 8965632
    Abstract: [Object] The present invention provides a suspension control apparatus that allows miniaturization of a solenoid valve. [Solution] When a controller is started up by a power source controller (a power source unit), the controller switches a control current from 0 ampere to a maximum current value I6 at the same time as the startup. After that, the control shifts to normal control. As a result, even if a hysteresis of a damping force characteristic is large relative to the control current, it is possible to promptly move a solenoid valve to a position to be used in the normal control.
    Type: Grant
    Filed: July 9, 2014
    Date of Patent: February 24, 2015
    Assignee: Hitachi Automotive Systems, Ltd.
    Inventors: Toru Uchino, Ryusuke Hirao, Yohei Katayama, Hiroyuki Yabe, Hiroki Ohara
  • Patent number: 8957414
    Abstract: A semiconductor device for high power application in which a novel semiconductor material having high mass productivity is provided. An oxide semiconductor film is formed, and then, first heat treatment is performed on the exposed oxide semiconductor film in order to reduce impurities such as moisture or hydrogen in the oxide semiconductor film. Next, in order to further reduce impurities such as moisture or hydrogen in the oxide semiconductor film, oxygen is added to the oxide semiconductor film by an ion implantation method, an ion doping method, or the like, and after that, second heat treatment is performed on the exposed oxide semiconductor film.
    Type: Grant
    Filed: February 17, 2012
    Date of Patent: February 17, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Junichiro Sakata, Hiroki Ohara
  • Publication number: 20150034937
    Abstract: There has been a problem that difference in refractive index between an opposite substrate or a moisture barrier layer provided thereover, and air is maintained large, and light extraction efficiency is low. Further, there has been a problem that peeling or cracking due to the moisture barrier layer is easily generated, which leads to deteriorate the reliability and lifetime of a light-emitting element. A light-emitting element comprises a pixel electrode, an electroluminescent layer, a transparent electrode, a passivation film, a stress relieving layer, and a low refractive index layer, all of which are stacked sequentially. The stress relieving layer serves to prevent peeling of the passivation film. The low refractive index layer serves to reduce reflectivity of light generated in the electroluminescent layer in emitting to air. Therefore, a light-emitting element with high reliability and long lifetime and a display device using the light-emitting element can be provided.
    Type: Application
    Filed: August 15, 2014
    Publication date: February 5, 2015
    Inventors: Hisao Ikeda, Hiroki Ohara, Makoto Hosoba, Junichiro Sakata, Shunichi Ito
  • Publication number: 20150031169
    Abstract: An object is to manufacture a highly reliable semiconductor device including a thin film transistor with stable electric characteristics. In a method for manufacturing a semiconductor device including a thin film transistor in which an oxide semiconductor film is used for a semiconductor layer including a channel formation region, heat treatment (for dehydration or dehydrogenation) is performed to improve the purity of the oxide semiconductor film and reduce impurities including moisture or the like. After that, slow cooling is performed under an oxygen atmosphere. Besides impurities including moisture or the like exiting in the oxide semiconductor film, heat treatment causes reduction of impurities including moisture or the like exiting in a gate insulating layer and those in interfaces between the oxide semiconductor film and films which are provided over and below the oxide semiconductor and in contact therewith.
    Type: Application
    Filed: September 23, 2014
    Publication date: January 29, 2015
    Inventors: Toshinari SASAKI, Junichiro SAKATA, Hiroki OHARA, Shunpei YAMAZAKI