Patents by Inventor Hiroki Ohara

Hiroki Ohara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9269913
    Abstract: A copper(I) complex is represented by the following Formula (1): [Cua(XS)b(L)c], wherein, L is triphenylphosphine, acetonitrile, tri-iso-butylphosphine, or a substituted or unsubstituted heterocyclic compound having 5 to 18 carbon atoms, a is an integer from 2 to 6, b is an integer from 2 to 6, c is an integer from 0 to 6, X is a substituted or unsubstituted aryl group, substituted or unsubstituted carbazole, or PR3, where R is a substituted or unsubstituted phenyl group or a substituted or unsubstituted cyclohexyl group.
    Type: Grant
    Filed: July 3, 2014
    Date of Patent: February 23, 2016
    Assignees: SAMSUNG DISPLAY CO., LTD., NATIONAL UNIVERSITY CORPORATION HOKKAIDO UNIVERSITY
    Inventors: Nobutaka Akashi, Masako Kato, Atsushi Kobayashi, Kotaro Shimada, Hiroki Ohara
  • Patent number: 9269571
    Abstract: It is an object to provide a highly reliable semiconductor device, a semiconductor device with low power consumption, a semiconductor device with high productivity, and a method for manufacturing such a semiconductor device. Impurities left remaining in an oxide semiconductor layer are removed without generating oxygen deficiency, and the oxide semiconductor layer is purified to have an extremely high purity. Specifically, after oxygen is added to the oxide semiconductor layer, heat treatment is performed on the oxide semiconductor layer to remove the impurities. In order to add oxygen, it is preferable to use a method in which oxygen having high energy is added by an ion implantation method, an ion doping method, or the like.
    Type: Grant
    Filed: August 1, 2013
    Date of Patent: February 23, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hiroki Ohara
  • Publication number: 20160043340
    Abstract: Provide is a display device that prevents adverse effects on pixel circuits, resulting from a process related to a sealing film, and a manufacturing method of the display device. A display device includes pixel circuits on a substrate and a sealing film having a multilayer structure on the pixel circuits. The sealing film includes a first layer being formed in contact with the pixel circuits and being made of a silicon-containing inorganic material. The first layer is a mixed film containing at least one component changing seamlessly in a stacking direction.
    Type: Application
    Filed: August 5, 2015
    Publication date: February 11, 2016
    Inventor: Hiroki OHARA
  • Publication number: 20160035796
    Abstract: There has been a problem that difference in refractive index between an opposite substrate or a moisture barrier layer provided thereover, and air is maintained large, and light extraction efficiency is low. Further, there has been a problem that peeling or cracking due to the moisture barrier layer is easily generated, which leads to deteriorate the reliability and lifetime of a light-emitting element. A light-emitting element comprises a pixel electrode, an electroluminescent layer, a transparent electrode, a passivation film, a stress relieving layer, and a low refractive index layer, all of which are stacked sequentially. The stress relieving layer serves to prevent peeling of the passivation film. The low refractive index layer serves to reduce reflectivity of light generated in the electroluminescent layer in emitting to air. Therefore, a light-emitting element with high reliability and long lifetime and a display device using the light-emitting element can be provided.
    Type: Application
    Filed: August 6, 2015
    Publication date: February 4, 2016
    Inventors: Hisao Ikeda, Hiroki Ohara, Makoto Hosoba, Junichiro Sakata, Shunichi Ito
  • Publication number: 20160035758
    Abstract: A semiconductor device includes a pixel portion having a first thin film transistor and a driver circuit having a second thin film transistor. Each of the first thin film transistor and the second thin film transistor includes a gate electrode layer, a gate insulating layer, a semiconductor layer, a source electrode layer, and a drain electrode layer. Each of the layers of the first thin film transistor has a light-transmitting property. Materials of the gate electrode layer, the source electrode layer and the drain electrode layer of the first thin film transistor are different from those of the second transistor, and each of the resistances of the second thin film transistor is lower than that of the first thin film transistor.
    Type: Application
    Filed: October 15, 2015
    Publication date: February 4, 2016
    Inventors: Hajime KIMURA, Hiroki OHARA, Masayo KAYAMA
  • Patent number: 9245938
    Abstract: The present invention is a method of manufacturing an organic EL display device including a display part arranged with a plurality of pixels including an organic EL light emitting layer, and a terminal part arranged with a plurality of terminals each connected to the organic EL light emitting layer respectively, the method comprising forming a TFT drive circuit layer controlling the organic EL light emitting layer and forming the plurality of terminals connected to the TFT drive circuit layer on a first substrate; forming the organic EL light emitting layer connected to the TFT drive circuit layer over the TFT drive circuit layer; forming a sealing film over the organic EL light emitting layer; adhering a second substrate covering the display part in a position corresponding to the first substrate; forming a touch panel sensor substrate and an electrode layer over the second substrate; and exposing the plurality of terminals by etching a part of the sealing film.
    Type: Grant
    Filed: November 20, 2014
    Date of Patent: January 26, 2016
    Assignee: JAPAN DISPLAY INC.
    Inventors: Hiroki Ohara, Toshihiro Sato
  • Publication number: 20160020330
    Abstract: An object is to provide a semiconductor device having stable electric characteristics in which an oxide semiconductor is used. An oxide semiconductor layer is subjected to heat treatment for dehydration or dehydrogenation treatment in a nitrogen gas or an inert gas atmosphere such as a rare gas (e.g., argon or helium) or under reduced pressure and to a cooling step for treatment for supplying oxygen in an atmosphere of oxygen, an atmosphere of oxygen and nitrogen, or the air (having a dew point of preferably lower than or equal to ?40° C., still preferably lower than or equal to ?50° C.) atmosphere. The oxide semiconductor layer is thus highly purified, whereby an i-type oxide semiconductor layer is formed. A semiconductor device including a thin film transistor having the oxide semiconductor layer is manufactured.
    Type: Application
    Filed: July 22, 2015
    Publication date: January 21, 2016
    Inventors: Miyuki HOSOBA, Junichiro SAKATA, Hiroki OHARA, Shunpei YAMAZAKI
  • Publication number: 20160020332
    Abstract: It is an object to provide a highly reliable semiconductor device which includes a thin film transistor having stable electric characteristics. It is another object to manufacture a highly reliable semiconductor device at lower cost with high productivity. In a method for manufacturing a semiconductor device which includes a thin film transistor where a semiconductor layer having a channel formation region, a source region, and a drain region are formed using an oxide semiconductor layer, heat treatment (heat treatment for dehydration or dehydrogenation) is performed so as to improve the purity of the oxide semiconductor layer and reduce impurities such as moisture. Moreover, the oxide semiconductor layer subjected to the heat treatment is slowly cooled under an oxygen atmosphere.
    Type: Application
    Filed: September 28, 2015
    Publication date: January 21, 2016
    Inventors: Toshinari SASAKI, Junichiro SAKATA, Hiroki OHARA, Shunpei YAMAZAKI
  • Patent number: 9240467
    Abstract: A semiconductor device for high power application in which a novel semiconductor material having high mass productivity is provided. An oxide semiconductor film is formed, and then, first heat treatment is performed on the exposed oxide semiconductor film in order to reduce impurities such as moisture or hydrogen in the oxide semiconductor film. Next, in order to further reduce impurities such as moisture or hydrogen in the oxide semiconductor film, oxygen is added to the oxide semiconductor film by an ion implantation method, an ion doping method, or the like, and after that, second heat treatment is performed on the exposed oxide semiconductor film.
    Type: Grant
    Filed: January 30, 2015
    Date of Patent: January 19, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Junichiro Sakata, Hiroki Ohara
  • Patent number: 9224870
    Abstract: An object is to provide a semiconductor device having a structure with which parasitic capacitance between wirings can be sufficiently reduced. An oxide insulating layer serving as a channel protective layer is formed over part of an oxide semiconductor layer overlapping with a gate electrode layer. In the same step as formation of the oxide insulating layer, an oxide insulating layer covering a peripheral portion of the oxide semiconductor layer is formed. The oxide insulating layer which covers the peripheral portion of the oxide semiconductor layer is provided to increase the distance between the gate electrode layer and a wiring layer formed above or in the periphery of the gate electrode layer, whereby parasitic capacitance is reduced.
    Type: Grant
    Filed: August 29, 2014
    Date of Patent: December 29, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hiroki Ohara, Toshinari Sasaki, Kosei Noda, Hideaki Kuwabara
  • Patent number: 9224609
    Abstract: A semiconductor device for high power application in which a novel semiconductor material having high mass productivity is provided. An oxide semiconductor film is formed, and then, first heat treatment is performed on the exposed oxide semiconductor film in order to reduce impurities such as moisture or hydrogen in the oxide semiconductor film. Next, in order to further reduce impurities such as moisture or hydrogen in the oxide semiconductor film, oxygen is added to the oxide semiconductor film by an ion implantation method, an ion doping method, or the like, and after that, second heat treatment is performed on the exposed oxide semiconductor film.
    Type: Grant
    Filed: December 1, 2010
    Date of Patent: December 29, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Junichiro Sakata, Hiroki Ohara
  • Patent number: 9214638
    Abstract: A material for an organic electroluminescent (EL) device includes a copper(I) complex represented by the following Formula 1: [CuX(PPh3)2L]??[Formula 1] In the above Formula 1, X is an anion, PPh3 is triphenylphosphine, and L is a substituted or unsubstituted heterocyclic ligand having 5 to 18 ring carbon.
    Type: Grant
    Filed: March 25, 2015
    Date of Patent: December 15, 2015
    Assignees: SAMSUNG DISPLAY CO., LTD., NATIONAL UNIVERSITY CORPORATION HOKKAIDO UNIVERSITY
    Inventors: Nobutaka Akashi, Masako Kato, Hiroki Ohara, Atsushi Kobayashi
  • Publication number: 20150340477
    Abstract: An object is to manufacture a highly reliable semiconductor device including a thin film transistor with stable electric characteristics. In a method for manufacturing a semiconductor device including a thin film transistor in which an oxide semiconductor film is used for a semiconductor layer including a channel formation region, heat treatment (for dehydration or dehydrogenation) is performed to improve the purity of the oxide semiconductor film and reduce impurities including moisture or the like. After that, slow cooling is performed under an oxygen atmosphere. Besides impurities including moisture or the like exiting in the oxide semiconductor film, heat treatment causes reduction of impurities including moisture or the like exiting in a gate insulating layer and those in interfaces between the oxide semiconductor film and films which are provided over and below the oxide semiconductor and in contact therewith.
    Type: Application
    Filed: August 6, 2015
    Publication date: November 26, 2015
    Inventors: Toshinari SASAKI, Junichiro SAKATA, Hiroki OHARA, Shunpei YAMAZAKI
  • Patent number: 9171867
    Abstract: A semiconductor device includes a pixel portion having a first thin film transistor and a driver circuit having a second thin film transistor. Each of the first thin film transistor and the second thin film transistor includes a gate electrode layer, a gate insulating layer, a semiconductor layer, a source electrode layer, and a drain electrode layer. Each of the layers of the first thin film transistor has a light-transmitting property. Materials of the gate electrode layer, the source electrode layer and the drain electrode layer of the first thin film transistor are different from those of the second transistor, and each of the resistances of the second thin film transistor is lower than that of the first thin film transistor.
    Type: Grant
    Filed: June 23, 2014
    Date of Patent: October 27, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hajime Kimura, Hiroki Ohara, Masayo Kayama
  • Publication number: 20150303310
    Abstract: An object is to provide a semiconductor device having a structure with which parasitic capacitance between wirings can be sufficiently reduced. An oxide insulating layer serving as a channel protective layer is formed over part of an oxide semiconductor layer overlapping with a gate electrode layer. In the same step as formation of the oxide insulating layer, an oxide insulating layer covering a peripheral portion of the oxide semiconductor layer is formed. The oxide insulating layer which covers the peripheral portion of the oxide semiconductor layer is provided to increase the distance between the gate electrode layer and a wiring layer formed above or in the periphery of the gate electrode layer, whereby parasitic capacitance is reduced.
    Type: Application
    Filed: June 8, 2015
    Publication date: October 22, 2015
    Inventors: Shunpei Yamazaki, Hiroki Ohara, Toshinari Sasaki, Kosei Noda, Hideaki Kuwabara
  • Publication number: 20150282511
    Abstract: The objects of the present invention are to provide a novel nystose crystal-containing powder which has fluidity suitable for handling and shows a suppressed powder-blown-up phenomenon, and to provide a method for producing the same. According to the present invention, a nystose crystal-containing powder is provided, wherein: (a) the powder has a nystose content of 71 to 90 wt %; (b) the powder contains 0.2 to 18.6 wt % gluconic acid relative to a total weight of nystose crystals contained in the powder; and (c) the powder has a water content of 7-14 wt %.
    Type: Application
    Filed: November 12, 2013
    Publication date: October 8, 2015
    Applicant: Meiji Co., Ltd
    Inventors: Kenji Toyota, Hiroki Ohara
  • Publication number: 20150280148
    Abstract: A material for an organic electroluminescent (EL) device includes a copper(I) complex represented by the following Formula 1: [CuX(PPh3)2L]??[Formula 1] In the above Formula 1, X is an anion, PPh3 is triphenylphosphine, and L is a substituted or unsubstituted heterocyclic ligand having 5 to 18 ring carbon.
    Type: Application
    Filed: March 25, 2015
    Publication date: October 1, 2015
    Inventors: Nobutaka AKASHI, Masako KATO, Hiroki Ohara, Atsushi Kobayashi
  • Publication number: 20150263315
    Abstract: A display device includes a substrate, a light emitting layer including one or more kinds of organic light emitting films, a transparent electrode that comes in contact with an upper surface of the light emitting layer, and a glass plate that covers an upper side of the transparent electrode, in which the transparent electrode has a contour corresponding to a contour of the glass plate in a plan view.
    Type: Application
    Filed: March 13, 2015
    Publication date: September 17, 2015
    Inventors: Naoki UETAKE, Hiroki OHARA, Toshihiro SATO
  • Patent number: 9136115
    Abstract: An object is to manufacture a highly reliable semiconductor device including a thin film transistor with stable electric characteristics. In a method for manufacturing a semiconductor device including a thin film transistor in which an oxide semiconductor film is used for a semiconductor layer including a channel formation region, heat treatment (for dehydration or dehydrogenation) is performed to improve the purity of the oxide semiconductor film and reduce impurities including moisture or the like. After that, slow cooling is performed under an oxygen atmosphere. Besides impurities including moisture or the like exiting in the oxide semiconductor film, heat treatment causes reduction of impurities including moisture or the like exiting in a gate insulating layer and those in interfaces between the oxide semiconductor film and films which are provided over and below the oxide semiconductor and in contact therewith.
    Type: Grant
    Filed: September 23, 2014
    Date of Patent: September 15, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Toshinari Sasaki, Junichiro Sakata, Hiroki Ohara, Shunpei Yamazaki
  • Publication number: 20150236167
    Abstract: One object is to provide a semiconductor device with a structure which enables reduction in parasitic capacitance sufficiently between wirings. In a bottom-gate type thin film transistor including a stacked layer of a first layer which is a metal thin film oxidized partly or entirely and an oxide semiconductor layer, the following oxide insulating layers are formed together: an oxide insulating layer serving as a channel protective layer which is over and in contact with a part of the oxide semiconductor layer overlapping with a gate electrode layer; and an oxide insulating layer which covers a peripheral portion and a side surface of the stacked oxide semiconductor layer.
    Type: Application
    Filed: May 1, 2015
    Publication date: August 20, 2015
    Inventors: Shunpei Yamazaki, Junichiro SAKATA, Hiroki OHARA, Hideaki KUWABARA