Patents by Inventor Hiroki Ohara

Hiroki Ohara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8936963
    Abstract: If an oxide semiconductor layer is crystallized by heat treatment without being covered with an inorganic insulating film, surface unevenness and the like are formed due to the crystallization, which may cause variation in electrical characteristics. Steps are performed in the following order: a second insulating film is formed on an oxide semiconductor layer over a substrate and then heat treatment is performed, instead of performing heat treatment during a period immediately after formation of the oxide semiconductor layer and immediately before formation of an inorganic insulating film including silicon oxide on the oxide semiconductor layer. The density of hydrogen included in the inorganic insulating film including silicon oxide is 5×1020/cm3 or more, and the density of nitrogen is 1×1019/cm3 or more.
    Type: Grant
    Filed: March 9, 2010
    Date of Patent: January 20, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hiroki Ohara, Toshinari Sasaki
  • Publication number: 20150011049
    Abstract: An object is to provide a highly reliable semiconductor device including a thin film transistor having stable electric characteristics. In addition, another object is to manufacture a highly reliable semiconductor device at low cost with high productivity. In a method for manufacturing a semiconductor device including a thin film transistor including an oxide semiconductor layer as a channel formation region, the oxide semiconductor layer is heated under a nitrogen atmosphere to lower its resistance, thereby forming a low-resistance oxide semiconductor layer. Further, resistance of a region of the low-resistance oxide semiconductor layer, which is overlapped with a gate electrode layer, is selectively increased, thereby forming a high-resistance oxide semiconductor layer. Resistance of the oxide semiconductor layer is increased by forming a silicon oxide film in contact with the oxide semiconductor layer by a sputtering method.
    Type: Application
    Filed: July 10, 2014
    Publication date: January 8, 2015
    Inventors: Toshinari SASAKI, Hiroki OHARA, Junichiro SAKATA
  • Publication number: 20140377907
    Abstract: An object is to provide a high reliable semiconductor device including a thin film transistor having stable electric characteristics. In a method for manufacturing a semiconductor device including a thin film transistor in which an oxide semiconductor film is used for a semiconductor layer including a channel formation region, heat treatment (which is for dehydration or dehydrogenation) is performed so as to improve the purity of the oxide semiconductor film and reduce impurities such as moisture. Besides impurities such as moisture existing in the oxide semiconductor film, heat treatment causes reduction of impurities such as moisture existing in the gate insulating layer and those in interfaces between the oxide semiconductor film and films which are provided over and below the oxide semiconductor film and are in contact with the oxide semiconductor film.
    Type: Application
    Filed: September 9, 2014
    Publication date: December 25, 2014
    Inventors: Toshinari SASAKI, Junichiro SAKATA, Hiroki OHARA, Shunpei YAMAZAKI
  • Publication number: 20140367680
    Abstract: An object is to provide a semiconductor device having a structure with which parasitic capacitance between wirings can be sufficiently reduced. An oxide insulating layer serving as a channel protective layer is formed over part of an oxide semiconductor layer overlapping with a gate electrode layer. In the same step as formation of the oxide insulating layer, an oxide insulating layer covering a peripheral portion of the oxide semiconductor layer is formed. The oxide insulating layer which covers the peripheral portion of the oxide semiconductor layer is provided to increase the distance between the gate electrode layer and a wiring layer formed above or in the periphery of the gate electrode layer, whereby parasitic capacitance is reduced.
    Type: Application
    Filed: August 29, 2014
    Publication date: December 18, 2014
    Inventors: Shunpei Yamazaki, Hiroki Ohara, Toshinari Sasaki, Kosei Noda, Hideaki Kuwabara
  • Patent number: 8900916
    Abstract: A highly reliable semiconductor device which includes a thin film transistor having stable electric characteristics, and a manufacturing method thereof. In the manufacturing method of the semiconductor device which includes a thin film transistor where a semiconductor layer including a channel formation region is an oxide semiconductor layer, heat treatment which reduces impurities such as moisture to improve the purity of the oxide semiconductor layer and oxidize the oxide semiconductor layer (heat treatment for dehydration or dehydrogenation) is performed. Not only impurities such as moisture in the oxide semiconductor layer but also those existing in a gate insulating layer are reduced, and impurities such as moisture existing in interfaces between the oxide semiconductor layer and films provided over and under and in contact with the oxide semiconductor layer are reduced.
    Type: Grant
    Filed: July 8, 2010
    Date of Patent: December 2, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Miyuki Hosoba, Kosei Noda, Hiroki Ohara, Toshinari Sasaki, Junichiro Sakata
  • Patent number: 8884287
    Abstract: A semiconductor device including a thin film transistor which includes an oxide semiconductor layer and has high electric characteristics and reliability. Film deposition is performed using an oxide semiconductor target containing an insulator (an insulating oxide, an insulating nitride, silicon oxynitride, aluminum oxynitride, or the like), typically SiO2, so that the semiconductor device in which the Si-element concentration in the thickness direction of the oxide semiconductor layer has a gradient which increases in accordance with an increase in a distance from a gate electrode is realized.
    Type: Grant
    Filed: December 24, 2013
    Date of Patent: November 11, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Junichiro Sakata, Takashi Shimazu, Hiroki Ohara, Toshinari Sasaki, Shunpei Yamazaki
  • Publication number: 20140319520
    Abstract: An object is to provide a semiconductor device including a thin film transistor which includes an oxide semiconductor layer and has high electric characteristics. An oxide semiconductor layer including SiOx is used in a channel formation region, and in order to reduce contact resistance with source and drain electrode layers formed using a metal material with low electric resistance, source and drain regions are provided between the source and drain electrode layers and the oxide semiconductor layer including SiOx. The source and drain regions are formed using an oxide semiconductor layer which does not include SiOx or an oxynitiride film.
    Type: Application
    Filed: July 15, 2014
    Publication date: October 30, 2014
    Inventors: Junichiro SAKATA, Takashi SHIMAZU, Hiroki OHARA, Toshinari SASAKI, Shunpei YAMAZAKI
  • Publication number: 20140324289
    Abstract: [Object] The present invention provides a suspension control apparatus that allows miniaturization of a solenoid valve. [Solution] When a controller is started up by a power source controller (a power source unit), the controller switches a control current from 0 ampere to a maximum current value I6 at the same time as the startup. After that, the control shifts to normal control. As a result, even if a hysteresis of a damping force characteristic is large relative to the control current, it is possible to promptly move a solenoid valve to a position to be used in the normal control.
    Type: Application
    Filed: July 9, 2014
    Publication date: October 30, 2014
    Inventors: Toru UCHINO, Ryusuke HIRAO, Yohei KATAYAMA, Hiroyuki YABE, Hiroki OHARA
  • Publication number: 20140302622
    Abstract: A semiconductor device includes a pixel portion having a first thin film transistor and a driver circuit having a second thin film transistor. Each of the first thin film transistor and the second thin film transistor includes a gate electrode layer, a gate insulating layer, a semiconductor layer, a source electrode layer, and a drain electrode layer. Each of the layers of the first thin film transistor has a light-transmitting property. Materials of the gate electrode layer, the source electrode layer and the drain electrode layer of the first thin film transistor are different from those of the second transistor, and each of the resistances of the second thin film transistor is lower than that of the first thin film transistor.
    Type: Application
    Filed: June 23, 2014
    Publication date: October 9, 2014
    Inventors: Hajime Kimura, Hiroki Ohara, Masayo Kayama
  • Publication number: 20140291088
    Abstract: The present invention provides a shock absorber having improved performance and durability. A damping force generation mechanism 30a includes a spring member 106a. The spring member 106a includes radially extending spring portions 117 having high spring constants and circumferentially extending spring portions 118 having low spring constants. The respective radially extending spring portions 117 and the respective circumferentially extending spring portions 118 are integrally configured so that respective biasing forces thereof act dynamically linearly. Further, an annular stepped portion 74, which limits strokes of the respective circumferentially extending spring portions 118, is provided on an opposite end side cylindrical wall portion 71 of a pilot body 49.
    Type: Application
    Filed: March 21, 2014
    Publication date: October 2, 2014
    Applicant: HITACHI AUTOMOTIVE SYSTEMS, LTD.
    Inventors: Yohei KATAYAMA, Hiroki OHARA, Sadatomo MATSUMURA
  • Patent number: 8846460
    Abstract: An object is to provide a high reliable semiconductor device including a thin film transistor having stable electric characteristics. In a method for manufacturing a semiconductor device including a thin film transistor in which an oxide semiconductor film is used for a semiconductor layer including a channel formation region, heat treatment (which is for dehydration or dehydrogenation) is performed so as to improve the purity of the oxide semiconductor film and reduce impurities such as moisture. Besides impurities such as moisture existing in the oxide semiconductor film, heat treatment causes reduction of impurities such as moisture existing in the gate insulating layer and those in interfaces between the oxide semiconductor film and films which are provided over and below the oxide semiconductor film and are in contact with the oxide semiconductor film.
    Type: Grant
    Filed: September 10, 2013
    Date of Patent: September 30, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Toshinari Sasaki, Junichiro Sakata, Hiroki Ohara, Shunpei Yamazaki
  • Patent number: 8841163
    Abstract: A semiconductor device for high power application in which a novel semiconductor material having high mass productivity is provided. An oxide semiconductor film is formed, and then, first heat treatment is performed on the exposed oxide semiconductor film in order to reduce impurities such as moisture or hydrogen in the oxide semiconductor film. Next, in order to further reduce impurities such as moisture or hydrogen in the oxide semiconductor film, oxygen is added to the oxide semiconductor film by an ion implantation method, an ion doping method, or the like, and after that, second heat treatment is performed on the exposed oxide semiconductor film.
    Type: Grant
    Filed: February 17, 2012
    Date of Patent: September 23, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Junichiro Sakata, Hiroki Ohara
  • Patent number: 8822990
    Abstract: An object is to provide a semiconductor device having a structure with which parasitic capacitance between wirings can be sufficiently reduced. An oxide insulating layer serving as a channel protective layer is formed over part of an oxide semiconductor layer overlapping with a gate electrode layer. In the same step as formation of the oxide insulating layer, an oxide insulating layer covering a peripheral portion of the oxide semiconductor layer is formed. The oxide insulating layer which covers the peripheral portion of the oxide semiconductor layer is provided to increase the distance between the gate electrode layer and a wiring layer formed above or in the periphery of the gate electrode layer, whereby parasitic capacitance is reduced.
    Type: Grant
    Filed: January 28, 2013
    Date of Patent: September 2, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hiroki Ohara, Toshinari Sasaki, Kosei Noda, Hideaki Kuwabara
  • Patent number: 8809891
    Abstract: There has been a problem that difference in refractive index between an opposite substrate or a moisture barrier layer provided thereover, and air is maintained large, and light extraction efficiency is low. Further, there has been a problem that peeling or cracking due to the moisture barrier layer is easily generated, which leads to deteriorate the reliability and lifetime of a light-emitting element. A light-emitting element comprises a pixel electrode, an electroluminescent layer, a transparent electrode, a passivation film, a stress relieving layer, and a low refractive index layer, all of which are stacked sequentially. The stress relieving layer serves to prevent peeling of the passivation film. The low refractive index layer serves to reduce reflectivity of light generated in the electroluminescent layer in emitting to air. Therefore, a light-emitting element with high reliability and long lifetime and a display device using the light-emitting element can be provided.
    Type: Grant
    Filed: March 5, 2014
    Date of Patent: August 19, 2014
    Assignee: Semiconductor Energy Laboratory Co. Ltd.
    Inventors: Hisao Ikeda, Hiroki Ohara, Makoto Hosoba, Junichiro Sakata, Shunichi Ito
  • Publication number: 20140217402
    Abstract: It is an object to provide a highly reliable semiconductor device which includes a thin film transistor having stable electric characteristics. It is another object to manufacture a highly reliable semiconductor device at lower cost with high productivity. In a method for manufacturing a semiconductor device which includes a thin film transistor where a semiconductor layer having a channel formation region, a source region, and a drain region are formed using an oxide semiconductor layer, heat treatment (heat treatment for dehydration or dehydrogenation) is performed so as to improve the purity of the oxide semiconductor layer and reduce impurities such as moisture. Moreover, the oxide semiconductor layer subjected to the heat treatment is slowly cooled under an oxygen atmosphere.
    Type: Application
    Filed: April 8, 2014
    Publication date: August 7, 2014
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Toshinari SASAKI, Junichiro SAKATA, Hiroki OHARA, Shunpei YAMAZAKI
  • Patent number: 8796078
    Abstract: An object is to provide a highly reliable semiconductor device including a thin film transistor having stable electric characteristics. In addition, another object is to manufacture a highly reliable semiconductor device at low cost with high productivity. In a method for manufacturing a semiconductor device including a thin film transistor including an oxide semiconductor layer as a channel formation region, the oxide semiconductor layer is heated under a nitrogen atmosphere to lower its resistance, thereby forming a low-resistance oxide semiconductor layer. Further, resistance of a region of the low-resistance oxide semiconductor layer, which is overlapped with a gate electrode layer, is selectively increased, thereby forming a high-resistance oxide semiconductor layer. Resistance of the oxide semiconductor layer is increased by forming a silicon oxide film in contact with the oxide semiconductor layer by a sputtering method.
    Type: Grant
    Filed: May 26, 2010
    Date of Patent: August 5, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Toshinari Sasaki, Hiroki Ohara, Junichiro Sakata
  • Patent number: 8798859
    Abstract: [Object] The present invention provides a suspension control apparatus that allows miniaturization of a solenoid valve. [Solution] When a controller is started up by a power source controller (a power source unit), the controller switches a control current from 0 ampere to a maximum current value I6 at the same time as the startup. After that, the control shifts to normal control. As a result, even if a hysteresis of a damping force characteristic is large relative to the control current, it is possible to promptly move a solenoid valve to a position to be used in the normal control.
    Type: Grant
    Filed: January 31, 2012
    Date of Patent: August 5, 2014
    Assignee: Hitachi Automotive Systems, Ltd.
    Inventors: Toru Uchino, Ryusuke Hirao, Yohei Katayama, Hiroyuki Yabe, Hiroki Ohara
  • Patent number: 8785929
    Abstract: An object is to provide a semiconductor device including a thin film transistor which includes an oxide semiconductor layer and has high electric characteristics. An oxide semiconductor layer including SiOx is used in a channel formation region, and in order to reduce contact resistance with source and drain electrode layers formed using a metal material with low electric resistance, source and drain regions are provided between the source and drain electrode layers and the oxide semiconductor layer including SiOx. The source and drain regions are formed using an oxide semiconductor layer which does not include SiOx or an oxynitiride film.
    Type: Grant
    Filed: June 25, 2013
    Date of Patent: July 22, 2014
    Assignee: Semiconductor Energy Laboratory Co. Ltd.
    Inventors: Junichiro Sakata, Takashi Shimazu, Hiroki Ohara, Toshinari Sasaki, Shunpei Yamazaki
  • Publication number: 20140183532
    Abstract: An oxide semiconductor film which has more stable electric conductivity is provided. Further, a semiconductor device which has stable electric characteristics and high reliability is provided by using the oxide semiconductor film. An oxide semiconductor film includes a crystalline region, and the crystalline region includes a crystal in which an a-b plane is substantially parallel with a surface of the film and a c-axis is substantially perpendicular to the surface of the film; the oxide semiconductor film has stable electric conductivity and is more electrically stable with respect to irradiation with visible light, ultraviolet light, and the like. By using such an oxide semiconductor film for a transistor, a highly reliable semiconductor device having stable electric characteristics can be provided.
    Type: Application
    Filed: March 6, 2014
    Publication date: July 3, 2014
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei YAMAZAKI, Masashi TSUBUKU, Kengo AKIMOTO, Hiroki OHARA, Tatsuya HONDA, Takatsugu OMATA, Yusuke NONAKA, Masahiro TAKAHASHI, Akiharu MIYANAGA
  • Publication number: 20140183509
    Abstract: There has been a problem that difference in refractive index between an opposite substrate or a moisture barrier layer provided thereover, and air is maintained large, and light extraction efficiency is low. Further, there has been a problem that peeling or cracking due to the moisture barrier layer is easily generated, which leads to deteriorate the reliability and lifetime of a light-emitting element. A light-emitting element comprises a pixel electrode, an electroluminescent layer, a transparent electrode, a passivation film, a stress relieving layer, and a low refractive index layer, all of which are stacked sequentially. The stress relieving layer serves to prevent peeling of the passivation film. The low refractive index layer serves to reduce reflectivity of light generated in the electroluminescent layer in emitting to air. Therefore, a light-emitting element with high reliability and long lifetime and a display device using the light-emitting element can be provided.
    Type: Application
    Filed: March 5, 2014
    Publication date: July 3, 2014
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hisao Ikeda, Hiroki Ohara, Makoto Hosoba, Junichiro Sakata, Shunichi Ito