Patents by Inventor Hiroki Ohara
Hiroki Ohara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9412768Abstract: It is an object to provide a highly reliable semiconductor device which includes a thin film transistor having stable electric characteristics. It is another object to manufacture a highly reliable semiconductor device at lower cost with high productivity. In a method for manufacturing a semiconductor device which includes a thin film transistor where a semiconductor layer having a channel formation region, a source region, and a drain region are formed using an oxide semiconductor layer, heat treatment (heat treatment for dehydration or dehydrogenation) is performed so as to improve the purity of the oxide semiconductor layer and reduce impurities such as moisture. Moreover, the oxide semiconductor layer subjected to the heat treatment is slowly cooled under an oxygen atmosphere.Type: GrantFiled: March 1, 2016Date of Patent: August 9, 2016Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Toshinari Sasaki, Junichiro Sakata, Hiroki Ohara, Shunpei Yamazaki
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Publication number: 20160204231Abstract: A semiconductor device for high power application in which a novel semiconductor material having high mass productivity is provided. An oxide semiconductor film is formed, and then, first heat treatment is performed on the exposed oxide semiconductor film in order to reduce impurities such as moisture or hydrogen in the oxide semiconductor film. Next, in order to further reduce impurities such as moisture or hydrogen in the oxide semiconductor film, oxygen is added to the oxide semiconductor film by an ion implantation method, an ion doping method, or the like, and after that, second heat treatment is performed on the exposed oxide semiconductor film.Type: ApplicationFiled: January 15, 2016Publication date: July 14, 2016Inventors: Shunpei YAMAZAKI, Junichiro SAKATA, Hiroki OHARA
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Publication number: 20160190175Abstract: An object is to provide a semiconductor device having a structure with which parasitic capacitance between wirings can be sufficiently reduced. An oxide insulating layer serving as a channel protective layer is formed over part of an oxide semiconductor layer overlapping with a gate electrode layer. In the same step as formation of the oxide insulating layer, an oxide insulating layer covering a peripheral portion of the oxide semiconductor layer is formed. The oxide insulating layer which covers the peripheral portion of the oxide semiconductor layer is provided to increase the distance between the gate electrode layer and a wiring layer formed above or in the periphery of the gate electrode layer, whereby parasitic capacitance is reduced.Type: ApplicationFiled: March 8, 2016Publication date: June 30, 2016Inventors: Shunpei Yamazaki, Hiroki Ohara, Toshinari Sasaki, Kosei Noda, Hideaki Kuwabara
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Patent number: 9379141Abstract: An object is to manufacture and provide a highly reliable semiconductor device including a thin film transistor with stable electric characteristics. In a method for manufacturing a semiconductor device including a thin film transistor in which a semiconductor layer including a channel formation region serves as an oxide semiconductor film, heat treatment for reducing impurities such as moisture (heat treatment for dehydration or dehydrogenation) is performed after an oxide insulating film serving as a protective film is formed in contact with an oxide semiconductor layer. Then, the impurities such as moisture, which exist not only in a source electrode layer, in a drain electrode layer, in a gate insulating layer, and in the oxide semiconductor layer but also at interfaces between the oxide semiconductor film and upper and lower films which are in contact with the oxide semiconductor layer, are reduced.Type: GrantFiled: April 21, 2015Date of Patent: June 28, 2016Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Hiroki Ohara, Junichiro Sakata, Toshinari Sasaki, Miyuki Hosoba
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Publication number: 20160181405Abstract: It is an object to provide a highly reliable semiconductor device which includes a thin film transistor having stable electric characteristics. It is another object to manufacture a highly reliable semiconductor device at lower cost with high productivity. In a method for manufacturing a semiconductor device which includes a thin film transistor where a semiconductor layer having a channel formation region, a source region, and a drain region are formed using an oxide semiconductor layer, heat treatment (heat treatment for dehydration or dehydrogenation) is performed so as to improve the purity of the oxide semiconductor layer and reduce impurities such as moisture. Moreover, the oxide semiconductor layer subjected to the heat treatment is slowly cooled under an oxygen atmosphere.Type: ApplicationFiled: March 1, 2016Publication date: June 23, 2016Inventors: Toshinari SASAKI, Junichiro SAKATA, Hiroki OHARA, Shunpei YAMAZAKI
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Patent number: 9362416Abstract: One object is to provide a semiconductor device with a structure which enables reduction in parasitic capacitance sufficiently between wirings. In a bottom-gate type thin film transistor including a stacked layer of a first layer which is a metal thin film oxidized partly or entirely and an oxide semiconductor layer, the following oxide insulating layers are formed together: an oxide insulating layer serving as a channel protective layer which is over and in contact with a part of the oxide semiconductor layer overlapping with a gate electrode layer; and an oxide insulating layer which covers a peripheral portion and a side surface of the stacked oxide semiconductor layer.Type: GrantFiled: May 1, 2015Date of Patent: June 7, 2016Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Junichiro Sakata, Hiroki Ohara, Hideaki Kuwabara
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Patent number: 9349775Abstract: There has been a problem that difference in refractive index between an opposite substrate or a moisture barrier layer provided thereover, and air is maintained large, and light extraction efficiency is low. Further, there has been a problem that peeling or cracking due to the moisture barrier layer is easily generated, which leads to deteriorate the reliability and lifetime of a light-emitting element. A light-emitting element comprises a pixel electrode, an electroluminescent layer, a transparent electrode, a passivation film, a stress relieving layer, and a low refractive index layer, all of which are stacked sequentially. The stress relieving layer serves to prevent peeling of the passivation film. The low refractive index layer serves to reduce reflectivity of light generated in the electroluminescent layer in emitting to air. Therefore, a light-emitting element with high reliability and long lifetime and a display device using the light-emitting element can be provided.Type: GrantFiled: August 6, 2015Date of Patent: May 24, 2016Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hisao Ikeda, Hiroki Ohara, Makoto Hosoba, Junichiro Sakata, Shunichi Ito
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Patent number: 9331208Abstract: An oxide semiconductor film which has more stable electric conductivity is provided. The oxide semiconductor film comprises a crystalline region. The oxide semiconductor film has a first peak of electron diffraction intensity with a full width at half maximum of greater than or equal to 0.4 nm?1 and less than or equal to 0.7 nm?1 in a region where a magnitude of a scattering vector is greater than or equal to 3.3 nm?1 and less than or equal to 4.1 nm?1. The oxide semiconductor film has a second peak of electron diffraction intensity with a full width at half maximum of greater than or equal to 0.45 nm?1 and less than or equal to 1.4 nm?1 in a region where a magnitude of a scattering vector is greater than or equal to 5.5 nm?1 and less than or equal to 7.1 nm?1.Type: GrantFiled: March 2, 2015Date of Patent: May 3, 2016Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Masashi Tsubuku, Kengo Akimoto, Hiroki Ohara, Tatsuya Honda, Takatsugu Omata, Yusuke Nonaka, Masahiro Takahashi, Akiharu Miyanaga
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Patent number: 9309948Abstract: A shock absorber including a damping force generation mechanism (30a) includes a spring member (106a) having radially extending spring portions (117) having high spring constants and circumferentially extending spring portions (118) having low spring constants. The radially extending spring portions and the circumferentially extending spring portions are integrally configured so that biasing forces thereof act dynamically linearly. An annular stepped portion limits strokes of the circumferentially extending spring portions and is provided on a cylindrical wall portion of a pilot body. As a result, within a range of damping force control, only the radially extending spring portions of the spring member are elastically deformed, whereby the durability of the spring member is enhanced, and only biasing forces of the radially extending spring portions of the spring member act on a pilot valve member, and thereby variation in a damping force is reduced so that the performance is improved.Type: GrantFiled: March 21, 2014Date of Patent: April 12, 2016Assignee: HITACHI AUTOMOTIVE SYSTEMS, LTD.Inventors: Yohei Katayama, Hiroki Ohara, Sadatomo Matsumura
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Publication number: 20160093734Abstract: A semiconductor device for high power application in which a novel semiconductor material having high mass productivity is provided. An oxide semiconductor film is formed, and then, first heat treatment is performed on the exposed oxide semiconductor film in order to reduce impurities such as moisture or hydrogen in the oxide semiconductor film. Next, in order to further reduce impurities such as moisture or hydrogen in the oxide semiconductor film, oxygen is added to the oxide semiconductor film by an ion implantation method, an ion doping method, or the like, and after that, second heat treatment is performed on the exposed oxide semiconductor film.Type: ApplicationFiled: December 3, 2015Publication date: March 31, 2016Inventors: Shunpei YAMAZAKI, Junichiro SAKATA, Hiroki OHARA
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Patent number: 9299807Abstract: It is an object to provide a highly reliable semiconductor device which includes a thin film transistor having stable electric characteristics. It is another object to manufacture a highly reliable semiconductor device at lower cost with high productivity. In a method for manufacturing a semiconductor device which includes a thin film transistor where a semiconductor layer having a channel formation region, a source region, and a drain region are formed using an oxide semiconductor layer, heat treatment (heat treatment for dehydration or dehydrogenation) is performed so as to improve the purity of the oxide semiconductor layer and reduce impurities such as moisture. Moreover, the oxide semiconductor layer subjected to the heat treatment is slowly cooled under an oxygen atmosphere.Type: GrantFiled: September 28, 2015Date of Patent: March 29, 2016Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Toshinari Sasaki, Junichiro Sakata, Hiroki Ohara, Shunpei Yamazaki
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Patent number: 9293601Abstract: An object is to provide a semiconductor device having a structure with which parasitic capacitance between wirings can be sufficiently reduced. An oxide insulating layer serving as a channel protective layer is formed over part of an oxide semiconductor layer overlapping with a gate electrode layer. In the same step as formation of the oxide insulating layer, an oxide insulating layer covering a peripheral portion of the oxide semiconductor layer is formed. The oxide insulating layer which covers the peripheral portion of the oxide semiconductor layer is provided to increase the distance between the gate electrode layer and a wiring layer formed above or in the periphery of the gate electrode layer, whereby parasitic capacitance is reduced.Type: GrantFiled: June 8, 2015Date of Patent: March 22, 2016Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Hiroki Ohara, Toshinari Sasaki, Kosei Noda, Hideaki Kuwabara
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Patent number: 9293566Abstract: It is an object to provide a highly reliable semiconductor device which includes a thin film transistor having stable electric characteristics. It is another object to manufacture a highly reliable semiconductor device at lower cost with high productivity. In a method for manufacturing a semiconductor device which includes a thin film transistor where a semiconductor layer having a channel formation region, a source region, and a drain region are formed using an oxide semiconductor layer, heat treatment (heat treatment for dehydration or dehydrogenation) is performed so as to improve the purity of the oxide semiconductor layer and reduce impurities such as moisture. Moreover, the oxide semiconductor layer subjected to the heat treatment is slowly cooled under an oxygen atmosphere.Type: GrantFiled: April 8, 2014Date of Patent: March 22, 2016Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Toshinari Sasaki, Junichiro Sakata, Hiroki Ohara, Shunpei Yamazaki
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Patent number: 9269794Abstract: An object is to manufacture and provide a highly reliable semiconductor device including a thin film transistor with stable electric characteristics. In a method for manufacturing a semiconductor device including a thin film transistor in which a semiconductor layer including a channel formation region serves as an oxide semiconductor film, heat treatment for reducing impurities such as moisture (heat treatment for dehydration or dehydrogenation) is performed after an oxide insulating film serving as a protective film is formed in contact with an oxide semiconductor layer. Then, the impurities such as moisture, which exist not only in a source electrode layer, in a drain electrode layer, in a gate insulating layer, and in the oxide semiconductor layer but also at interfaces between the oxide semiconductor film and upper and lower films which are in contact with the oxide semiconductor layer, are reduced.Type: GrantFiled: August 19, 2013Date of Patent: February 23, 2016Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Hiroki Ohara, Junichiro Sakata, Toshinari Sasaki, Miyuki Hosoba
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Patent number: 9269913Abstract: A copper(I) complex is represented by the following Formula (1): [Cua(XS)b(L)c], wherein, L is triphenylphosphine, acetonitrile, tri-iso-butylphosphine, or a substituted or unsubstituted heterocyclic compound having 5 to 18 carbon atoms, a is an integer from 2 to 6, b is an integer from 2 to 6, c is an integer from 0 to 6, X is a substituted or unsubstituted aryl group, substituted or unsubstituted carbazole, or PR3, where R is a substituted or unsubstituted phenyl group or a substituted or unsubstituted cyclohexyl group.Type: GrantFiled: July 3, 2014Date of Patent: February 23, 2016Assignees: SAMSUNG DISPLAY CO., LTD., NATIONAL UNIVERSITY CORPORATION HOKKAIDO UNIVERSITYInventors: Nobutaka Akashi, Masako Kato, Atsushi Kobayashi, Kotaro Shimada, Hiroki Ohara
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Patent number: 9269571Abstract: It is an object to provide a highly reliable semiconductor device, a semiconductor device with low power consumption, a semiconductor device with high productivity, and a method for manufacturing such a semiconductor device. Impurities left remaining in an oxide semiconductor layer are removed without generating oxygen deficiency, and the oxide semiconductor layer is purified to have an extremely high purity. Specifically, after oxygen is added to the oxide semiconductor layer, heat treatment is performed on the oxide semiconductor layer to remove the impurities. In order to add oxygen, it is preferable to use a method in which oxygen having high energy is added by an ion implantation method, an ion doping method, or the like.Type: GrantFiled: August 1, 2013Date of Patent: February 23, 2016Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Hiroki Ohara
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Publication number: 20160043340Abstract: Provide is a display device that prevents adverse effects on pixel circuits, resulting from a process related to a sealing film, and a manufacturing method of the display device. A display device includes pixel circuits on a substrate and a sealing film having a multilayer structure on the pixel circuits. The sealing film includes a first layer being formed in contact with the pixel circuits and being made of a silicon-containing inorganic material. The first layer is a mixed film containing at least one component changing seamlessly in a stacking direction.Type: ApplicationFiled: August 5, 2015Publication date: February 11, 2016Inventor: Hiroki OHARA
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Publication number: 20160035796Abstract: There has been a problem that difference in refractive index between an opposite substrate or a moisture barrier layer provided thereover, and air is maintained large, and light extraction efficiency is low. Further, there has been a problem that peeling or cracking due to the moisture barrier layer is easily generated, which leads to deteriorate the reliability and lifetime of a light-emitting element. A light-emitting element comprises a pixel electrode, an electroluminescent layer, a transparent electrode, a passivation film, a stress relieving layer, and a low refractive index layer, all of which are stacked sequentially. The stress relieving layer serves to prevent peeling of the passivation film. The low refractive index layer serves to reduce reflectivity of light generated in the electroluminescent layer in emitting to air. Therefore, a light-emitting element with high reliability and long lifetime and a display device using the light-emitting element can be provided.Type: ApplicationFiled: August 6, 2015Publication date: February 4, 2016Inventors: Hisao Ikeda, Hiroki Ohara, Makoto Hosoba, Junichiro Sakata, Shunichi Ito
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Publication number: 20160035758Abstract: A semiconductor device includes a pixel portion having a first thin film transistor and a driver circuit having a second thin film transistor. Each of the first thin film transistor and the second thin film transistor includes a gate electrode layer, a gate insulating layer, a semiconductor layer, a source electrode layer, and a drain electrode layer. Each of the layers of the first thin film transistor has a light-transmitting property. Materials of the gate electrode layer, the source electrode layer and the drain electrode layer of the first thin film transistor are different from those of the second transistor, and each of the resistances of the second thin film transistor is lower than that of the first thin film transistor.Type: ApplicationFiled: October 15, 2015Publication date: February 4, 2016Inventors: Hajime KIMURA, Hiroki OHARA, Masayo KAYAMA
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Patent number: 9245938Abstract: The present invention is a method of manufacturing an organic EL display device including a display part arranged with a plurality of pixels including an organic EL light emitting layer, and a terminal part arranged with a plurality of terminals each connected to the organic EL light emitting layer respectively, the method comprising forming a TFT drive circuit layer controlling the organic EL light emitting layer and forming the plurality of terminals connected to the TFT drive circuit layer on a first substrate; forming the organic EL light emitting layer connected to the TFT drive circuit layer over the TFT drive circuit layer; forming a sealing film over the organic EL light emitting layer; adhering a second substrate covering the display part in a position corresponding to the first substrate; forming a touch panel sensor substrate and an electrode layer over the second substrate; and exposing the plurality of terminals by etching a part of the sealing film.Type: GrantFiled: November 20, 2014Date of Patent: January 26, 2016Assignee: JAPAN DISPLAY INC.Inventors: Hiroki Ohara, Toshihiro Sato