Abstract: A random access memory is provided including a plane structure comprising a plurality of sense amplifiers, each including a local data latch, a pair of local busses connected to each of the data latches, a differential data bus, and a pair of redrivers connected between the pair of local busses and the differential data bus.

Abstract: An apparatus and method of skip coding user data is provided. According to skip coding, for each cell in which an upper page is 0, data is stored in a half page. For each portion of data in which the upper page is 1, data is not stored in the half page. Thus, cells of a NAND memory may each store 3.5 bits, in one of twelve available states.

Abstract: An apparatus includes a pair of memory cells configured to represent data using joint data states where one of the joint data states comprises an error-prone joint data state. The apparatus further includes an encoder configured to convert user data into joint data states according to a dual-cell gray-code encoding scheme in which the error-prone joint data state does not encode user data.

Abstract: A solid electrolyte of the present disclosure includes: a porous dielectric having a plurality of pores interconnected mutually; and an electrolyte including a metal salt and at least one selected from the group consisting of an ionic compound and a bipolar compound and at least partially filling an interior of the plurality of pores. Inner surfaces of the plurality of pores of the porous dielectric are at least partially modified by a functional group containing a halogen atom.

Abstract: A memory device comprising a semiconductor substrate in which a memory cell region and a peripheral circuitry region are defined, wherein the memory cell region has a plurality of non-volatile memory cells arranged in one or more arrays and the peripheral circuitry region has at least one sense amplifier region comprised of at least one low voltage transistor. Further, a deep N-well region is formed in the substrate, wherein the memory cell region and the peripheral circuitry region are placed on the deep N-well region such that, in the event that a high erase voltage (VERA) is applied to the memory cell region during an erase operation, the high erase voltage is applied to all terminals of the at least one low voltage resistor, thereby protecting the low voltage transistor by preventing it from experiencing a large voltage difference between its terminals.

Abstract: Methods for reducing read disturb using NAND strings with poly-silicon channels and p-type doped source lines are described. During a boosted read operation for a selected memory cell transistor in a NAND string, a back-gate bias or bit line voltage may be applied to a bit line connected to the NAND string and a source line voltage greater than the bit line voltage may be applied to a source line connected to the NAND string; with these bias conditions, electrons may be injected from the bit line and annihilated in the source line during the read operation. To avoid leakage currents through NAND strings in non-selected memory blocks, the threshold voltages of source-side select gate transistors of the NAND strings may be set to a negative threshold voltage that has an absolute voltage value greater than the source line voltage applied during the read operation.

Abstract: Methods for reducing read disturb using NAND strings with poly-silicon channels and p-type doped source lines are described. During a boosted read operation for a selected memory cell transistor in a NAND string, a back-gate bias or bit line voltage may be applied to a bit line connected to the NAND string and a source line voltage greater than the bit line voltage may be applied to a source line connected to the NAND string; with these bias conditions, electrons may be injected from the bit line and annihilated in the source line during the read operation. To avoid leakage currents through NAND strings in non-selected memory blocks, the threshold voltages of source-side select gate transistors of the NAND strings may be set to a negative threshold voltage that has an absolute voltage value greater than the source line voltage applied during the read operation.

Abstract: A memory device and associated techniques improve a settling time of bit lines in a memory device during a read or verify operation. Bit line control (BLC) transistors in the sense circuits are briefly turned off during a sensing process. After the read voltage on a selected word line is changed to a second word line level or higher, a control gate voltage of the BLC transistor is lowered, helping to inhibit a current flow from a sense circuit through a bit line when a voltage of the bit line is settling. The voltage of the bit line may be settling in response to a memory cell coupled to the selected word line undergoing a transition from off to on. A settling time of the bit line is shortened by stopping the current flow from the sense circuit. Transition of the memory cell from off to on is also improved.

Abstract: A memory device and associated techniques improve a settling time of bit lines in a memory device during a read or verify operation. Bit line control (BLC) transistors in the sense circuits are briefly turned off during a sensing process. After the read voltage on a selected word line is changed to a second word line level or higher, a control gate voltage of the BLC transistor is lowered. This helps to inhibit a current flow from a sense circuit through a bit line when a voltage of the bit line is settling. The voltage of the bit line may be settling in response to a memory cell coupled to the selected word line undergoing a transition from off to on. A settling time of the bit line is shortened by stopping the current flow from the sense circuit. The transition of the memory cell from off to on is also improved.

Abstract: An apparatus includes a pair of memory cells configured to represent data using joint data states where one of the joint data states comprises an error-prone joint data state. The apparatus further includes an encoder configured to convert user data into joint data states according to a dual-cell gray-code encoding scheme in which the error-prone joint data state does not encode user data.

Abstract: A solid-like magnesium-ion conductor includes an electrolyte and a porous silica. The electrolyte is filled in a plurality of pores of the porous silica. The electrolyte includes a magnesium salt, and an ionic liquid that contains the 1-ethyl-3-methylimidazolium ion.

Abstract: A memory device and associated techniques improve a settling time of bit lines in a memory device during a read or verify operation. Bit line control (BLC) transistors in the sense circuits are briefly turned off during a sensing process. After the read voltage on a selected word line is changed to a second word line level or higher, a control gate voltage of the BLC transistor is lowered. This helps to inhibit a current flow from a sense circuit through a bit line when a voltage of the bit line is settling. The voltage of the bit line may be settling in response to a memory cell coupled to the selected word line undergoing a transition from off to on. A settling time of the bit line is shortened by stopping the current flow from the sense circuit. The transition of the memory cell from off to on is also improved.

Abstract: A photoelectric conversion element includes a photoanode including a semiconductor layer and dye molecules located on the semiconductor layer; a counter electrode facing the photoanode; and an electrolyte medium located between the photoanode and the counter electrode, wherein each of the dye molecules is represented by a general formula [I] below where R1 and R2 each independently represent an alkyl group having 8 or more carbon atoms; R9 represents an alkylene group or an aralkylene group; and Y2 represents an acidic group.

Abstract: The techniques disclosed here feature a photoelectric conversion element. The photoelectric conversion element comprises a photoanode, a counter electrode, and an electrolytic medium located between the photoanode and the counter electrode. The photoanode includes a porous semiconductor layer and dye molecules located on the porous semiconductor layer. The porous semiconductor layer includes a light-scattering layer. The electrolytic medium contains a redox reagent. The light-scattering layer includes macropores having a pore diameter of 50 nm or more. The macropores having an arithmetic mean pore diameter of 0.5 ?m or more and 10 ?m or less. The redox reagent has a maximum molar absorption coefficient ? of 3000 L·cm?1·mol?1 or less within wavelengths of 380 nm to 800 nm.

Abstract: A photoelectric conversion element includes a photoanode including a semiconductor layer and dye molecules located on the semiconductor layer; a counter electrode facing the photoanode; and an electrolyte medium located between the photoanode and the counter electrode, wherein each of the dye molecules is represented by a general formula [I] below where R1 and R2 each independently represent an alkyl group having 8 or more carbon atoms; R9 represents an alkylene group or an aralkylene group; and Y2 represents an acidic group.

Abstract: Provided is a highly-reliable organic electroluminescence element in which loss of light due to surface plasmons generated on a metal surface is suppressed, the efficiency of light extraction to outside the element, and short circuits are unlikely to occur. The organic electroluminescence element includes a metal layer (1), on a surface of which a nanosize uneven structure is provided by a nanoparticle arrangement structure (6) in which nanoparticles (6a) are arranged in a planar fashion, and an organic layer (3) disposed on the uneven surface of the metal layer (1) and constituted by a plurality of layers including a light-emitting layer (31). Each interface between the plurality of layers of the organic layer (3) is flatter than the uneven surface of the metal layer (1).

Abstract: Fine mesoporous silica particles are provided by which not only the functions of low reflectance (Low-n), low dielectric constant (Low-k) and low thermal conductivity but also improved strength of a molded article are achieved. The fine mesoporous silica particles are manufactured by a process including a surfactant composite fine silica particle preparation step and a mesoporous particle formation step. In the silica fine particle preparation step, a surfactant, water, an alkali and a hydrophobic part-containing additive including a hydrophobic part for increasing the volume of micelles are mixed with a silica source to thereby prepare surfactant composite fine silica particles. In the mesoporous particle formation step, the mixture is mixed with an acid and an organosilicon compound to thereby remove the surfactant and hydrophobic part-containing additive from the surfactant composite fine silica particles and provide the surface of each silica fine particle with an organic functional group.

Abstract: In an organic electroluminescent element, light extraction efficiency is enhanced. An organic electroluminescent element 1 is configured by laminating a substrate 2, a first electrode 3, an organic layer 4, and a second electrode 5 in this order. The organic layer 4 includes an emitting layer 43, and the emitting layer 43 is formed by mixing porous particles 45 into an emitting material 44.

Abstract: In an organic thin film (a light emitting layer) of an organic EL element, an organic thin film having an emitting material which is made up of an organic polymer main backbone polymerized with a molecular chain, which emits light having a maximum value at a wavelength different from a wavelength at which an emission spectrum emitted by the main backbone itself has a maximum value, and nanosized particles which are mixed into the emitting material is used as the light emitting layer. According to the above configuration, the maximum values of the emission spectra of light emitted by the molecular chain and the main backbone of the emitting material can be increased. Moreover, the light which has the emission spectra having the plural maximum values can be generated without depending on the plural emitting materials, so that the light emitting layer can be manufactured easily.

Abstract: Provided is a highly-reliable organic electroluminescence element in which loss of light due to surface plasmons generated on a metal surface is suppressed, the efficiency of light extraction to outside the element, and short circuits are unlikely to occur. The organic electroluminescence element includes a metal layer (1), on a surface of which a nanosize uneven structure is provided by a nanoparticle arrangement structure (6) in which nanoparticles (6a) are arranged in a planar fashion, and an organic layer (3) disposed on the uneven surface of the metal layer (1) and constituted by a plurality of layers including a light-emitting layer (31). Each interface between the plurality of layers of the organic layer (3) is flatter than the uneven surface of the metal layer (1).