Patents by Inventor Hiroki Yabe

Hiroki Yabe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8999052
    Abstract: Fine mesoporous silica particles are provided by which not only the functions of low reflectance (Low-n), low dielectric constant (Low-k) and low thermal conductivity but also improved strength of a molded article are achieved. The fine mesoporous silica particles are manufactured by a process including a surfactant composite fine silica particle preparation step and a mesoporous particle formation step. In the silica fine particle preparation step, a surfactant, water, an alkali and a hydrophobic part-containing additive including a hydrophobic part for increasing the volume of micelles are mixed with a silica source to thereby prepare surfactant composite fine silica particles. In the mesoporous particle formation step, the mixture is mixed with an acid and an organosilicon compound to thereby remove the surfactant and hydrophobic part-containing additive from the surfactant composite fine silica particles and provide the surface of each silica fine particle with an organic functional group.
    Type: Grant
    Filed: May 18, 2010
    Date of Patent: April 7, 2015
    Assignees: Panasonic Corporation, The University of Tokyo
    Inventors: Hiroki Yabe, Takeyuki Yamaki, Yasuto Hoshikawa, Tatsuya Okubo, Atsushi Shimojima
  • Patent number: 8921833
    Abstract: In an organic electroluminescent element, light extraction efficiency is enhanced. An organic electroluminescent element 1 is configured by laminating a substrate 2, a first electrode 3, an organic layer 4, and a second electrode 5 in this order. The organic layer 4 includes an emitting layer 43, and the emitting layer 43 is formed by mixing porous particles 45 into an emitting material 44.
    Type: Grant
    Filed: June 2, 2010
    Date of Patent: December 30, 2014
    Assignee: Panasonic Corporation
    Inventors: Masahito Yamana, Takeyuki Yamaki, Hiroki Yabe, Masahiro Nakamura
  • Patent number: 8835916
    Abstract: In an organic thin film (a light emitting layer) of an organic EL element, an organic thin film having an emitting material which is made up of an organic polymer main backbone polymerized with a molecular chain, which emits light having a maximum value at a wavelength different from a wavelength at which an emission spectrum emitted by the main backbone itself has a maximum value, and nanosized particles which are mixed into the emitting material is used as the light emitting layer. According to the above configuration, the maximum values of the emission spectra of light emitted by the molecular chain and the main backbone of the emitting material can be increased. Moreover, the light which has the emission spectra having the plural maximum values can be generated without depending on the plural emitting materials, so that the light emitting layer can be manufactured easily.
    Type: Grant
    Filed: February 17, 2012
    Date of Patent: September 16, 2014
    Assignee: Panasonic Corporation
    Inventors: Takeyuki Yamaki, Hiroki Yabe, Masahiro Nakamura, Masahito Yamana
  • Publication number: 20140027753
    Abstract: Provided is a highly-reliable organic electroluminescence element in which loss of light due to surface plasmons generated on a metal surface is suppressed, the efficiency of light extraction to outside the element, and short circuits are unlikely to occur. The organic electroluminescence element includes a metal layer (1), on a surface of which a nanosize uneven structure is provided by a nanoparticle arrangement structure (6) in which nanoparticles (6a) are arranged in a planar fashion, and an organic layer (3) disposed on the uneven surface of the metal layer (1) and constituted by a plurality of layers including a light-emitting layer (31). Each interface between the plurality of layers of the organic layer (3) is flatter than the uneven surface of the metal layer (1).
    Type: Application
    Filed: April 11, 2012
    Publication date: January 30, 2014
    Applicant: PANASONIC CORPORATION
    Inventors: Masahito Yamana, Hiroki Yabe, Takahiro Koyanagi
  • Publication number: 20140014936
    Abstract: In an organic thin film (a light emitting layer) of an organic EL element, an organic thin film having an emitting material which is made up of an organic polymer main backbone polymerized with a molecular chain, which emits light having a maximum value at a wavelength different from a wavelength at which an emission spectrum emitted by the main backbone itself has a maximum value, and nanosized particles which are mixed into the emitting material is used as the light emitting layer. According to the above configuration, the maximum values of the emission spectra of light emitted by the molecular chain and the main backbone of the emitting material can be increased. Moreover, the light which has the emission spectra having the plural maximum values can be generated without depending on the plural emitting materials, so that the light emitting layer can be manufactured easily.
    Type: Application
    Filed: February 17, 2012
    Publication date: January 16, 2014
    Applicant: PANASONIC CORPORATION
    Inventors: Takeyuki Yamaki, Hiroki Yabe, Masahiro Nakamura, Masahito Yamana
  • Publication number: 20130267629
    Abstract: The mesoporous silica particles each comprise a core particle comprising first mesopores, wherein a periphery of the core particle is covered with silica. Preferably, second mesopores, smaller than the first mesopores, are provided in the silica-covered part formed by the silica covering. The mesoporous silica particles are produced by: a surfactant complex silica particle preparation step of mixing a surfactant, water, an alkali, a hydrophobic part-containing additive and a silica source to thereby prepare surfactant complex silica particles, said hydrophobic part-containing additive including a hydrophobic part for increasing a volume of micelles to be formed by the surfactant; and a silica covering step of adding the silica source to the surfactant complex silica particles to thereby cover a periphery of each core particle with silica.
    Type: Application
    Filed: December 22, 2011
    Publication date: October 10, 2013
    Applicants: THE UNIVERSITY OF TOKYO, PANASONIC CORPORATION
    Inventors: Ayumu Fukuoka, Hiroki Yabe, Tatsuya Okubo, Atsushi Shimojima, Hirotaka Ishii
  • Publication number: 20120192762
    Abstract: Fine mesoporous silica particles are provided by which not only the functions of low reflectance (Low-n), low dielectric constant (Low-k) and low thermal conductivity but also improved strength of a molded article are achieved. The fine mesoporous silica particles are manufactured by a process including a surfactant composite fine silica particle preparation step and a mesoporous particle formation step. In the silica fine particle preparation step, a surfactant, water, an alkali and a hydrophobic part-containing additive including a hydrophobic part for increasing the volume of micelles are mixed with a silica source to thereby prepare surfactant composite fine silica particles. In the mesoporous particle formation step, the mixture is mixed with an acid and an organosilicon compound to thereby remove the surfactant and hydrophobic part-containing additive from the surfactant composite fine silica particles and provide the surface of each silica fine particle with an organic functional group.
    Type: Application
    Filed: May 18, 2010
    Publication date: August 2, 2012
    Applicants: THE UNIVERSITY OF TOKYO, Panasonic Corporation
    Inventors: Hiroki Yabe, Takeyuki Yamaki, Yasuto Hoshikawa, Tatsuya Okubo, Atsushi Shimojima
  • Publication number: 20120068171
    Abstract: In an organic electroluminescent element, light extraction efficiency is enhanced. An organic electroluminescent element 1 is configured by laminating a substrate 2, a first electrode 3, an organic layer 4, and a second electrode 5 in this order. The organic layer 4 includes an emitting layer 43, and the emitting layer 43 is formed by mixing porous particles 45 into an emitting material 44.
    Type: Application
    Filed: June 2, 2010
    Publication date: March 22, 2012
    Applicant: PANASONIC ELECTRIC WORKS CO., LTD.
    Inventors: Masahito Yamana, Takeyuki Yamaki, Hiroki Yabe, Masahiro Nakamura
  • Patent number: 7773386
    Abstract: A flexible substrate includes: (i) a film; (ii) an insulating resin layer formed on each of a front face of the film and a rear face of the film, which rear face is opposite to the front face; (iii) a front-sided wiring pattern embedded in the insulating resin layer formed on the front face of the film, and a rear-sided wiring pattern embedded in the insulating resin layer formed on the rear face of the film; and (iv) a via which is located between the front-sided wiring pattern and the rear-sided wiring pattern and serves to electrically interconnect the front-sided wiring pattern and the rear-sided wiring pattern, wherein the insulating resin layer formed on each of the front face and the rear face of the film is thicker than the film.
    Type: Grant
    Filed: October 29, 2007
    Date of Patent: August 10, 2010
    Assignee: Panasonic Corporation
    Inventors: Yoshihisa Yamashita, Toshio Fujii, Seiichi Nakatani, Takashi Ichiryu, Satoru Tomekawa, Hiroki Yabe
  • Patent number: 7649267
    Abstract: A highly reliable, high-productivity package equipped with a semiconductor chip, and a method for producing the same. In a package (100) comprising a semiconductor chip (10) and a mounting substrate (30), a plurality of electrode terminals (12) are formed on the surface (10a) of the semiconductor chip (10) opposing the mounting substrate side, connection terminals (32) respectively corresponding to the plurality of electrode terminals (12), are formed on the mounting substrate (30), the connection terminals (32) on the mounting substrate (30) and the electrode terminals (12) are electrically connected collectively by solder bumps (17) formed in self-assembly, an electrode pattern (20) not connected with the electrode terminals (12) and the connection terminals (32) is formed on the chip surface (10a) or the surface (35) of the mounting substrate (30) corresponding to the chip surface (10a), and solder (19) is accumulated on the electrode pattern (20).
    Type: Grant
    Filed: March 8, 2006
    Date of Patent: January 19, 2010
    Assignee: Panasonic Corporation
    Inventors: Tsukasa Shiraishi, Yukihiro Ishimaru, Seiji Karashima, Seiichi Natkatani, Hiroki Yabe
  • Patent number: 7531754
    Abstract: A flexible substrate comprises a film, a first insulating resin layer on a front face of the film, a second insulating resin layer on a rear face of the film, a front-sided wiring pattern embedded in the first insulating resin layer, and a rear-sided wiring pattern embedded in the second insulating resin layer. A surface of the front-sided wiring pattern is flush with a surface of the first insulating resin layer, and a surface of the rear-sided wiring pattern is flush with a surface of the second insulating resin layer. A part of at least one of the front-sided wiring pattern and the rear-sided wiring pattern is dented toward a part of the other of the at least one of the front-sided wiring pattern and the rear-sided wiring pattern such that a portion of the front-sided wiring pattern and a portion of the rear-sided wiring pattern are jointed to each other to form a junction.
    Type: Grant
    Filed: March 2, 2007
    Date of Patent: May 12, 2009
    Assignee: Panasonic Corporation
    Inventors: Yoshihisa Yamashita, Hiroki Yabe, Takashi Ichiryu, Seiichi Nakatani, Satoru Tomekawa, Toshio Fujii, Seiji Karashima
  • Publication number: 20080265437
    Abstract: A highly reliable, high-productivity package equipped with a semiconductor chip, and a method for producing the same. In a package (100) comprising a semiconductor chip (10) and a mounting substrate (30), a plurality of electrode terminals (12) are formed on the surface (10a) of the semiconductor chip (10) opposing the mounting substrate side, connection terminals (32) respectively corresponding to the plurality of electrode terminals (12), are formed on the mounting substrate (30), the connection terminals (32) on the mounting substrate (30) and the electrode terminals (12) are electrically connected collectively by solder bumps (17) formed in self-assembly, an electrode pattern (20) not connected with the electrode terminals (12) and the connection terminals (32) is formed on the chip surface (10a) or the surface (35) of the mounting substrate (30) corresponding to the chip surface (10a), and solder (19) is accumulated on the electrode pattern (20).
    Type: Application
    Filed: March 8, 2006
    Publication date: October 30, 2008
    Inventors: Tsukasa Shiraishi, Yukihiro Ishimaru, Seiji Karashima, Seiichi Natkatani, Hiroki Yabe
  • Publication number: 20080210458
    Abstract: A flexible substrate comprises: (i) a film; (ii) an insulating resin layer formed on each of a front face of the film and a rear face of the film, which rear face is opposite to the front face; (iii) a front-sided wiring pattern embedded in the insulating resin layer formed on the front face of the film, and a rear-sided wiring pattern embedded in the insulating resin layer formed on the rear face of the film; and (iv) a via which is located between the front-sided wiring pattern and the rear-sided wiring pattern and serves to electrically interconnect the front-sided wiring pattern and the rear-sided wiring pattern, wherein the insulating resin layer formed on each of the front face and the rear face of the film is thicker than the film.
    Type: Application
    Filed: October 29, 2007
    Publication date: September 4, 2008
    Inventors: Yoshihisa Yamashita, Toshio Fujii, Seiichi Nakatani, Takashi Ichiryu, Satoru Tomekawa, Hiroki Yabe
  • Patent number: 7382628
    Abstract: A circuit component built-in module is provided in which a solder that is remelted when the circuit component built-in module is mounted on a motherboard by using the solder is prevented from flowing to the outside of the prescribed electrodes. A first groove (116) is formed in a solder resist (106) located between two electrodes (103) to which a circuit component (104) is connected. A configuration is used in which the space between the first groove (116) and circuit component (104) is filled with a first insulating resin (107).
    Type: Grant
    Filed: September 4, 2003
    Date of Patent: June 3, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Eiji Kawamoto, Masaaki Hayama, Masaaki Katsumata, Hiroki Yabe, Takeo Yasuho
  • Patent number: 7321496
    Abstract: A flexible substrate comprises: a film; an insulating resin layer formed on each of a front face of the film and a rear face of the film, which rear face is opposite to the front face; a front-sided wiring pattern embedded in the insulating resin layer formed on the front face of the film, and a rear-sided wiring pattern embedded in the insulating resin layer formed on the rear face of the film; and a via which is located between the front-sided wiring pattern and the rear-sided wiring pattern and serves to electrically interconnect the front-sided wiring pattern and the rear-sided wiring pattern, wherein the insulating resin layer formed on each of the front face and the rear face of the film is thicker than the film.
    Type: Grant
    Filed: March 15, 2005
    Date of Patent: January 22, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yoshihisa Yamashita, Toshio Fujii, Seiichi Nakatani, Takashi Ichiryu, Satoru Tomekawa, Hiroki Yabe
  • Publication number: 20070151756
    Abstract: A flexible substrate comprises a film, a first insulating resin layer on a front face of the film, a second insulating resin layer on a rear face of the film, a front-sided wiring pattern embedded in the first insulating resin layer, and a rear-sided wiring pattern embedded in the second insulating resin layer. A surface of the front-sided wiring pattern is flush with a surface of the first insulating resin layer, and a surface of the rear-sided wiring pattern is flush with a surface of the second insulating resin layer. A part of at least one of the front-sided wiring pattern and the rear-sided wiring pattern is dented toward a part of the other of the at least one of the front-sided wiring pattern and the rear-sided wiring pattern such that a portion of the front-sided wiring pattern and a portion of the rear-sided wiring pattern are jointed to each other to form a junction.
    Type: Application
    Filed: March 2, 2007
    Publication date: July 5, 2007
    Inventors: Yoshihisa Yamashita, Hiroki Yabe, Takashi Ichiryu, Seiichi Nakatani, Satoru Tomekawa, Toshio Fujii, Seiji Karashima
  • Patent number: 7205483
    Abstract: A flexible substrate comprises a film, a first insulating resin layer on a front face of the film, a second insulating resin layer on a rear face of the film, a front-sided wiring pattern embedded in the first insulating resin layer, and a rear-sided wiring pattern embedded in the second insulating resin layer. A surface of the front-sided wiring pattern is flush with a surface of the first insulating resin layer, and a surface of the rear-sided wiring pattern is flush with a surface of the second insulating resin layer. A part of at least one of the front-sided wiring pattern and the rear-sided wiring pattern is dented toward a part of the other of the at least one of the front-sided wiring pattern and the rear-sided wiring pattern such that a portion of the front-sided wiring pattern and a portion of the rear-sided wiring pattern are jointed to each other to form a junction.
    Type: Grant
    Filed: March 15, 2005
    Date of Patent: April 17, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yoshihisa Yamashita, Hiroki Yabe, Takashi Ichiryu, Seiichi Nakatani, Satoru Tomekawa, Toshio Fujii, Seiji Karashima
  • Patent number: 6998532
    Abstract: A module includes an electronic component having at least two electrodes, a board having electrodes on its surface to be connected to the electrodes of the electronic component, respectively, solders for connecting the electrodes of the electronic component to the electrodes of the board, respectively, an insulating resin covering the electronic component, the surface of the board, the solder, and the electrodes, and solder resists provided on the surface of the board and around the electrodes of the board, respectively. One of the solder resists is separated from the other electrode at a portion between the electronic component and the board. When this module is mounted on a motherboard, the solder does not flow out of the electrodes even when the solder in the insulating resin melts.
    Type: Grant
    Filed: December 22, 2003
    Date of Patent: February 14, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Eiji Kawamoto, Masaaki Hayama, Masaaki Katsumata, Hiroki Yabe
  • Publication number: 20050205291
    Abstract: A process for producing a flexible substrate comprising of a film, an insulating resin layer, and a wiring pattern, said process comprising the steps of: (a) preparing a sheet member comprising, (i) the film, (ii) the insulating resin layer formed on each of a front face of said film and a rear face of said film which face is opposite to said front face, and (iii) a front-sided wiring pattern embedded in said insulating resin layer formed on said front face of said film, and a rear-sided wiring pattern embedded in the insulating resin layer formed on said rear face of said film; and (b) pressing a part of at least one of said front-sided wiring pattern and said rear-sided wiring pattern into the inside of said sheet member so that a part of said front-sided wiring pattern and a part of said rear-sided wiring pattern are jointed to each other to form a junction.
    Type: Application
    Filed: March 15, 2005
    Publication date: September 22, 2005
    Inventors: Yoshihisa Yamashita, Hiroki Yabe, Takashi Ichiryu, Seiichi Nakatani, Satoru Tomekawa, Toshio Fujii, Seiji Karashima
  • Publication number: 20050205294
    Abstract: A flexible substrate comprising: (i) a film; (ii) an insulating resin layer formed on each of a front face of said film and a rear face of said film which face is opposite to said front face; (iii) a front-sided wiring pattern embedded in the insulating resin layer formed on said front face of said film, and a rear-sided wiring pattern embedded in the insulating resin layer formed on said rear face of said film; and (iv) a via which is located between a front-sided wiring pattern and a rear-sided wiring pattern and serves to electrically connect between said front-sided wiring pattern and said rear-sided wiring pattern; wherein said insulating resin layer formed on each of said front face and said rear face of the said film is thicker than said film.
    Type: Application
    Filed: March 15, 2005
    Publication date: September 22, 2005
    Inventors: Yoshihisa Yamashita, Toshio Fujii, Seiichi Nakatani, Takashi Ichiryu, Satoru Tomekawa, Hiroki Yabe