Patents by Inventor Hiromichi Suzuki
Hiromichi Suzuki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7966317Abstract: Making a report with an authenticated image includes certifying an imaging time of an image captured by a portable terminal with a camera with an objective time to authenticate image information. A report making program for making a work report is downloaded in the portable terminal by a Web browser from a web server. Report data such as an image and information inputted according to the report making program is sent from the portable terminal to the web server. The web server transfers the report data to a document management program. The document management program automatically sorts the report data according to an information category of the report data and stores the report data. The imaging time of the image information included in the report data or the image information contained in the report made based on the report data is authenticated with a reference time of the web server.Type: GrantFiled: November 3, 2010Date of Patent: June 21, 2011Assignee: JM CorporationInventors: Hirotaka Otake, Akira Saito, Syuhei Isogaya, Hiromichi Suzuki
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Publication number: 20110106571Abstract: Making a report with an authenticated image includes certifying an imaging time of an image captured by a portable terminal with a camera with an objective time to authenticate image information. A report making program for making a work report is downloaded in the portable terminal by a Web browser from a web server. Report data such as an image and information inputted according to the report making program is sent from the portable terminal to the web server. The web server transfers the report data to a document management program. The document management program automatically sorts the report data according to an information category of the report data and stores the report data. The imaging time of the image information included in the report data or the image information contained in the report made based on the report data is authenticated with a reference time of the web server.Type: ApplicationFiled: November 3, 2010Publication date: May 5, 2011Applicant: JM CORPORATIONInventors: Hirotaka OTAKE, Akira SAITO, Syuhei ISOGAYA, Hiromichi SUZUKI
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Publication number: 20110006410Abstract: A semiconductor composite wiring assembly includes a wiring assembly and a lead frame. A copper wiring layer of the wiring assembly includes first terminals, second terminals, and wiring sections connecting the terminals. The second terminals and the lead frame are electrically connected by connecting members. The lead frame includes a die pad for mounting the wiring assembly, and lead sections located at outer positions. The die pad includes a central area in which a semiconductor chip is mounted via the wiring assembly, and a peripheral area connected to the central area with spaces formed therebetween that serve as resin-seal inflow spaces. The wiring assembly is positioned over the central area and the peripheral area so as to cover the central area completely and the peripheral area partially, and at least the central area and the peripheral area of the die pad are glued to the wiring assembly by resin paste.Type: ApplicationFiled: February 5, 2010Publication date: January 13, 2011Applicant: Dai Nippon Printing Co., Ltd.Inventors: Susumu Baba, Masachika Masuda, Hiromichi Suzuki
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Publication number: 20100255639Abstract: A method for manufacturing a semiconductor device includes mounting a first chip over a first area of a chip mounting section of a lead frame and mounting a second chip over a second area of the chip mounting section, wherein the second area is adjacent to the first area via the slit. The chip mounting section is disposed on a flat heating jig. First pads of the first chip are connected with second pads of the second chip via first wires, respectively, and the first pads are connected with leads of the lead frame via second wires, respectively, the first chip, the second chip, the first wires and the second wires are sealed with a resin such that a part of each of the leads is exposed from the resin, and each of the leads is then separated from the lead frame.Type: ApplicationFiled: June 17, 2010Publication date: October 7, 2010Inventors: Fujio Ito, Hiromichi Suzuki, Akihiko Kameoka, Noriaki Sakamoto
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Publication number: 20100249740Abstract: A shaped sheet, comprising: a plurality of protrusions (3) on one surface side of the shaped sheet formed of fibers; and connecting portions (5) for being barriers and connecting the protrusions (3) to one another, wherein the connecting portion (5) has a fiber density higher than a fiber density of the protrusion (3).Type: ApplicationFiled: April 30, 2008Publication date: September 30, 2010Inventors: Takanobu Miyamoto, Takeshi Miyamura, Taeko Kanai, Hiromichi Suzuki, Wataru Saka, Shinobu Takei
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Patent number: 7785986Abstract: To prevent semiconductor chips from adhering to the trays during transport, a method is employed which transports semiconductor chips in the following state. When trays provided with a plurality of accommodating portions having a recessed cross section for accommodating semiconductor chips on a main surface thereof are stacked in a plurality of stages, the semiconductor chips are accommodated in spaces defined by the accommodating portions formed over the main surface of the lower-stage tray and corresponding accommodating portions formed over the back surface of the upper-stage tray. Here, on bottom surfaces of the accommodating portions formed over the back surface of the upper-stage tray, isolated projections having a height which prevents the projections from coming into contact with the semiconductor chips are arranged in a scattered manner. In this way, it is possible to prevent the semiconductor chips from adhering to the back surface of the upper-stage tray.Type: GrantFiled: March 10, 2009Date of Patent: August 31, 2010Assignee: Renesas Electronics Corp.Inventors: Yoshihisa Matsubara, Hiromichi Suzuki, Wahei Kitamura, Kosho Akiyama, Seiji Kato
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Patent number: 7772044Abstract: A method for manufacturing a semiconductor device includes mounting a first chip over a first area of a chip mounting section of a lead frame and mounting a second chip over a second area of the chip mounting section, wherein the second area is adjacent to the first area via the slit. The chip mounting section is disposed on a flat heating jig. First pads of the first chip are connected with second pads of the second chip via first wires, respectively, and the first pads are connected with leads of the lead frame via second wires, respectively. the first chip, the second chip, the first wires and the second wires are sealed with a resin such that a part of each of the leads is exposed from the resin, and each of the leads is then separated from the lead frame.Type: GrantFiled: November 3, 2008Date of Patent: August 10, 2010Assignee: Renesas Technology Corp.Inventors: Fujio Ito, Hiromichi Suzuki, Akihiko Kameoka, Noriaki Sakamoto
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Patent number: 7701401Abstract: An antenna device provided in a radio apparatus having a printed circuit board includes a first antenna element and a second antenna element. The first antenna element is configured to be fed and grounded at a first feed portion and at a first short-circuit portion both on the printed circuit board, respectively. The second antenna element is configured to be fed and grounded at a second feed portion and at a second short-circuit portion both on the printed circuit board, respectively. The second feed portion is located farther from the first feed portion than from the first short-circuit portion, farther than the first short-circuit portion is from the first feed portion, farther from the first short-circuit portion than from the second short-circuit portion, and farther than the second short-circuit portion is from the first short-circuit portion.Type: GrantFiled: October 18, 2007Date of Patent: April 20, 2010Assignee: Kabushiki Kaisha ToshibaInventors: Hiromichi Suzuki, Satoshi Mizoguchi, Isao Ohba
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Patent number: 7678706Abstract: The occurrence of a package crack in the back vicinity of a die pad is restrained by making the outward appearance of the die pad of a lead frame smaller than that of a semiconductor chip which is mounted on it, and also the occurrence of a package crack in the main surface vicinity of the semiconductor chip is restrained by forming a layer of organic material with good adhesion property with the resin that constitutes the package body on the final passivation film (final passivation film) that covers the top layer of conductive wirings of the semiconductor chip.Type: GrantFiled: July 20, 2007Date of Patent: March 16, 2010Assignees: Renesas Technology Corp., Hitachi ULSI Systems Co., Ltd.Inventors: Yoshinori Miyaki, Hiromichi Suzuki, Kazunari Suzuki, Takafumi Nishita, Fujio Ito, Kunihiro Tsubosaki, Akihiko Kameoka, Kunihiko Nishi
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Patent number: 7675469Abstract: An antenna device configured to be fed at a feed portion included in a printed board of a radio apparatus is provided. The antenna device has a feed element connected to the feed portion. The antenna device has a first parasitic element at least a portion of which is arranged close and electrically coupled to at least a portion of the feed element. The first parasitic element is loaded with a first frequency shifter. The antenna device has a second parasitic element at least a portion of which is arranged close and electrically coupled to at least a portion of the feed element. The second parasitic element is loaded with a second frequency shifter.Type: GrantFiled: December 10, 2007Date of Patent: March 9, 2010Assignee: Kabushiki Kaisha TOSHIBAInventors: Isao Ohba, Satoshi Mizoguchi, Hiromichi Suzuki, Koichi Sato
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Publication number: 20100051700Abstract: A radio apparatus configured to perform contactless communication with an external device having a first antenna, upon being arranged opposite the external device, is provided. The radio apparatus includes a case, a second antenna and a conductive element. The case has an outer face arranged opposite the external device upon the radio apparatus being arranged opposite the external device. The second antenna is provided in the case, and at least partially arranged parallel to the outer face. The conductive element is arranged close to and electrically coupled with the first antenna, upon the case being positioned opposite the external device so that the contactless communication may be performed.Type: ApplicationFiled: January 21, 2009Publication date: March 4, 2010Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Takashi MINEMURA, Hiroshi WATANABE, Akihiro TSUJIMURA, Hiromichi SUZUKI
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Patent number: 7653421Abstract: According to an aspect of the invention, a portable wireless apparatus comprises a first housing and a second housing. The first housing comprises a first board having a first feeding portion; and a first antenna element connected to the first feeding portion and provided on a side of a first surface of the first board. The second housing foldably connected to the first housing comprises a second board having a surface opposite to the first surface of the first board when the second hosing is unfolded with respect to the first housing. The second board comprises a second feeding portion. A second antenna element is connected to the second feeding portion and provided on a side of the surface of the second board.Type: GrantFiled: January 25, 2007Date of Patent: January 26, 2010Assignee: Kabushiki Kaisha ToshibaInventors: Hiromichi Suzuki, Hiroyuki Hotta, Takashi Amano
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Publication number: 20090209281Abstract: According to an aspect of the invention, a portable terminal includes: a first audio input-output unit and a second audio input-output unit configured to receive audio or when a mode is set as an input mode and output audio when the mode is set as an output mode; and a setting unit configured to set the respective modes of the first audio input-output unit and the second audio input-output unit.Type: ApplicationFiled: February 3, 2009Publication date: August 20, 2009Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Hiromichi SUZUKI, Masao TESHIMA, Koichi SATO, Hiroshi SHIMASAKI, Satoshi MIZOGUCHI, Takashi AMANO
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Publication number: 20090197654Abstract: According to one aspect of the invention, there is provided a mobile apparatus including: a resin body having a circumferential portion; a loop antenna disposed along the circumferential portion; and a printed circuit board configured to mount electronic components thereon, wherein the resin body is formed continuously and the loop antenna and the printed circuit board are embedded in the resin body.Type: ApplicationFiled: November 12, 2008Publication date: August 6, 2009Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Masao TESHIMA, Koichi SATO, Hiromichi SUZUKI, Miki MORI, Tetsuya YAMAMOTO
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Publication number: 20090189263Abstract: A wiring device for a semiconductor device, a composite wiring device for a semiconductor device and a resin-sealed semiconductor device are provided, each of which is capable of mounting thereon a semiconductor chip smaller than conventional chips and being manufactured at lower cost. The wiring device electrically connects an electrode provided on a semiconductor chip with an external wiring device, and has an insulating layer, a metal substrate and a copper wiring layer. The metal substrate is provided on one side of the insulating layer. The copper wiring layer is provided on another side of the insulating layer. The wiring device has a semiconductor chip support portion provided on the side of the copper wiring layer with respect to the insulating layer. The copper wiring layer includes a first terminal, a second terminal and a wiring portion. The first terminal is connected with the electrode provided on the semiconductor chip. The second terminal is connected with the external wiring device.Type: ApplicationFiled: January 13, 2009Publication date: July 30, 2009Applicant: DAI NIPPON PRINTING CO., LTD.Inventors: Susumu Baba, Masachika Masuda, Hiromichi Suzuki
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Publication number: 20090176333Abstract: To prevent semiconductor chips from adhering to the trays during transport, a method is employed which transports semiconductor chips in the following state. When trays provided with a plurality of accommodating portions having a recessed cross section for accommodating semiconductor chips on a main surface thereof are stacked in a plurality of stages, the semiconductor chips are accommodated in spaces defined by the accommodating portions formed over the main surface of the lower-stage tray and corresponding accommodating portions formed over the back surface of the upper-stage tray. Here, on bottom surfaces of the accommodating portions formed over the back surface of the upper-stage tray, isolated projections having a height which prevents the projections from coming into contact with the semiconductor chips are arranged in a scattered manner. In this way, it is possible to prevent the semiconductor chips from adhering to the back surface of the upper-stage tray.Type: ApplicationFiled: March 10, 2009Publication date: July 9, 2009Inventors: Yoshihisa MATSUBARA, Hiromichi Suzuki, Wahei Kitamura, Kosho Akiyama, Seiji Kato
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Patent number: 7554497Abstract: According to an aspect of the invention, there is provided an antenna device housed within a wireless device, including: a first case and a second case at least partly overlapping with each other, the first and second cases electrically connected with each other and slidable to open and close the antenna device; a first board housed within the first case; a second board housed within the second case; a first unbalanced antenna element connected to a first feeding point located in a vicinity of a first edge departing from the second case among edges of the first board when the first case and the second case are slid in a direction to open the wireless device; and a second unbalanced antenna element being connected to a second feeding point located in a vicinity of a second edge substantially perpendicular to the first edge among edges of the second board.Type: GrantFiled: September 11, 2007Date of Patent: June 30, 2009Assignee: Kabushiki Kaisha ToshibaInventors: Isao Ohba, Hiromichi Suzuki
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Patent number: 7541667Abstract: A manufacturing method of a semiconductor device including preparing a lead frame having a die pad, leads arranged around the die pad and a silver plating layer formed over a first portion of each of the leads, mounting a semiconductor chip over a main surface of the die pad with a rear surface of the chip fixed to the main surface of the die pad, electrically connecting electrodes of the chip with the leads through wires, forming a molding resin sealing the die pad, the first portion, the semiconductor chip, and the wires, and forming a lead-free solder plating layer over a second portion of each of the leads exposed from the molding resin. An area of the die pad is smaller than an area of the chip, and a part of the molding resin contacts with the rear surface of the chip exposed from the die pad.Type: GrantFiled: June 17, 2005Date of Patent: June 2, 2009Assignees: Hitachi, Ltd., Hitachi ULSI Systems Co., Ltd.Inventors: Yoshinori Miyaki, Hiromichi Suzuki, Kazunari Suzuki, Kunihiko Nishi
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Patent number: 7528014Abstract: A manufacturing method of a semiconductor device including preparing a lead frame having a die pad, leads arranged around the die pad and a silver plating layer formed over a first portion of each of the leads, mounting a semiconductor chip over a main surface of the die pad with a rear surface of the chip fixed to the main surface of the die pad, electrically connecting electrodes of the chip with the leads through wires, forming a molding resin sealing the die pad, the first portion, the semiconductor chip, and the wires, and forming a lead-free solder plating layer over a second portion of each of the leads exposed from the molding resin. An area of the die pad is smaller than an area of the chip, and a part of the molding resin contacts with the rear surface of the chip exposed from the die pad.Type: GrantFiled: April 7, 2005Date of Patent: May 5, 2009Assignee: Renesas Technology Corp.Inventors: Yoshinori Miyaki, Hiromichi Suzuki, Kazunari Suzuki, Kunihiko Nishi
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Publication number: 20090108422Abstract: The present invention can supply power for each circuit section by separating and connecting bus-bar (21d) for each circuit section inside the semiconductor chip (22), and, in addition, can increase the number of pads (22a) for power supply or can use the lead (21a) conventionally used for power supply for signals by further making the best of the characteristics that enable the connection to bus-bar (21d) irrespective of the inner lead (21b) pitch, by making the pitch of the pad (22a) smaller than the pitch of the inner lead (21b), or by forming the pad (22a) in a zigzag arrangement.Type: ApplicationFiled: December 21, 2008Publication date: April 30, 2009Inventors: Toshio SASAKI, Fujio ITO, Hiromichi SUZUKI