Patents by Inventor Hiroshi Ashihara

Hiroshi Ashihara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190371609
    Abstract: Described herein is a technique capable of selectively growing a film with a high selectivity on a substrate with surface portions of different materials. According to one aspect of the technique of the present disclosure, there is provided a method of manufacturing a semiconductor device including: (a) forming a second metal film on a substrate with a first metal film and an insulating film formed thereon by alternately supplying a metal-containing gas and a reactive gas onto the substrate, wherein an incubation time on the insulating film is longer than that on the first metal film; and (b) supplying an etching gas onto the substrate to remove the second metal film formed on the insulating film while allowing the second metal film to remain on the first metal film, wherein the second metal film is selectively grown on the first metal film by alternately repeating (a) and (b).
    Type: Application
    Filed: August 8, 2019
    Publication date: December 5, 2019
    Applicant: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Motomu DEGAI, Kimihiko NAKATANI, Hiroshi ASHIHARA
  • Patent number: 10388530
    Abstract: Provided is a technique of adjusting a work function. A method of manufacturing a semiconductor device includes: (a) forming a titanium nitride layer on a substrate by supplying a first source containing titanium and a second source containing nitrogen to the substrate; (b) forming a titanium aluminum carbonitride layer on the substrate by supplying the first source, the second source and a third source containing aluminum and carbon to the substrate; (c) forming a laminated film on the substrate by performing (a) and (b); and (d) adjusting ratios of titanium, nitrogen, aluminum and carbon in the laminated film based on how many times (a) and (b) are performed.
    Type: Grant
    Filed: January 4, 2019
    Date of Patent: August 20, 2019
    Assignee: KOKUSAI ELECTRIC CORPORATION
    Inventors: Arito Ogawa, Kazuhiro Harada, Yukinao Kaga, Hideharu Itatani, Hiroshi Ashihara
  • Patent number: 10388762
    Abstract: Described is a technique for uniformly doping a silicon substrate having a Fin structure with a dopant. A method of manufacturing a semiconductor device may includes: (a) forming a dopant-containing film containing a dopant on a silicon film by performing a cycle a predetermined number of times, the cycle including: (a-1) forming a first dopant-containing film by supplying a first dopant-containing gas containing the dopant and a first ligand to a substrate having thereon the silicon film and one of a silicon oxide film and a silicon nitride film; and (a-2) forming a second dopant-containing film by supplying a second dopant-containing gas containing the dopant and a second ligand different from and reactive with the first ligand to the substrate; and (b) forming a doped silicon film by annealing the substrate having the dopant-containing film thereon to diffuse the dopant into the silicon film.
    Type: Grant
    Filed: June 5, 2017
    Date of Patent: August 20, 2019
    Assignee: KOKUSAI ELECTRIC CORPORATION
    Inventors: Masahito Kitamura, Hiroshi Ashihara
  • Patent number: 10361084
    Abstract: A method of manufacturing a semiconductor device, includes: forming a film on a substrate by performing a cycle a predetermined number of times, the cycle including: supplying two or more kinds of halogen-based precursors having the same major elements and different halogen elements, or different major elements and the same halogen elements, or different major elements and different halogen elements to the substrate while overlapping at least portions of supply periods of the two or more kinds of halogen-based precursors; and supplying a reactant having a chemical structure different from chemical structures of the two or more kinds of halogen-based precursors to the substrate.
    Type: Grant
    Filed: March 1, 2018
    Date of Patent: July 23, 2019
    Assignee: KOKUSAI ELECTRIC CORPORATION
    Inventors: Hiroshi Ashihara, Kazuhiro Harada, Kimihiko Nakatani
  • Publication number: 20190157089
    Abstract: Provided is a technique of adjusting a work function. A method of manufacturing a semiconductor device includes: (a) forming a titanium nitride layer on a substrate by supplying a first source containing titanium and a second source containing nitrogen to the substrate; (b) forming a titanium aluminum carbonitride layer on the substrate by supplying the first source, the second source and a third source containing aluminum and carbon to the substrate; (c) forming a laminated film on the substrate by performing (a) and (b); and (d) adjusting ratios of titanium, nitrogen, aluminum and carbon in the laminated film based on how many times (a) and (b) are performed.
    Type: Application
    Filed: January 4, 2019
    Publication date: May 23, 2019
    Applicant: KOKUSAI ELECTRIC CORPORATION
    Inventors: Arito OGAWA, Kazuhiro HARADA, Yukinao KAGA, Hideharu ITATANI, Hiroshi ASHIHARA
  • Patent number: 10297440
    Abstract: Provided is a technique for forming a film having a desired stress on a substrate. A method of manufacturing a semiconductor device includes: forming a film having a predetermined stress on a substrate by controlling a ratio of a thickness of a first film having compressive stress to a thickness of a second film having tensile stress by performing: (a) supplying an organic source gas containing a first element and a reactive gas containing a second element to the substrate to form the first film containing the first element and the second element; and (b) supplying an inorganic source gas containing the first element and the reactive gas to the substrate to form the second film containing the first element and the second element.
    Type: Grant
    Filed: September 26, 2016
    Date of Patent: May 21, 2019
    Assignee: KOKUSAI ELECTRIC CORPORATION
    Inventors: Hirohisa Yamazaki, Noriyuki Isobe, Hiroshi Ashihara
  • Patent number: 10128128
    Abstract: A method of manufacturing a semiconductor device includes: (a) loading into a process chamber a substrate including: a wiring layer including a first interlayer insulating film, a plurality of copper-containing films formed on the first interlayer insulating film and used as a wiring, an inter-wire insulating film electrically insulating the plurality of copper containing film and a recess formed between the plurality of copper-containing film; and a first diffusion barrier film formed on a first portion of a surface of the plurality of copper-containing films to suppress a diffusion of a component of the plurality of copper-containing film; and (b) supplying a silicon-containing gas into the process chamber to form a silicon-containing film on: a surface of the recess; and a second portion of the surface of the plurality of copper-containing films other than the first portion where the first diffusion barrier film is formed.
    Type: Grant
    Filed: March 16, 2017
    Date of Patent: November 13, 2018
    Assignee: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Tsuyoshi Takeda, Hiroshi Ashihara, Naofumi Ohashi, Toshiyuki Kikuchi
  • Patent number: 10115583
    Abstract: There is provided a method of manufacturing a semiconductor device which includes: supplying a process gas to a process chamber in a state in which a substrate with an insulating film formed thereon is mounted on a substrate support part inside the process chamber; supplying a first power from a plasma generation part to the process chamber to generate plasma and forming a first silicon nitride layer on the insulating film; and supplying a second power from an ion control part to the process chamber in parallel with the generation of plasma, to form a second silicon nitride layer having lower stress than that of the first silicon nitride layer on the first silicon nitride layer.
    Type: Grant
    Filed: August 28, 2017
    Date of Patent: October 30, 2018
    Assignee: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Satoshi Shimamoto, Hiroshi Ashihara, Kazuyuki Toyoda, Naofumi Ohashi
  • Publication number: 20180277405
    Abstract: A substrate processing apparatus includes: a single frequency process chamber installed inside a process module and for processing a substrate on which an insulating film is formed; a two-frequency process chamber installed adjacent to the single frequency process chamber inside the process module and for processing the substrate processed in the single frequency process chamber; a gas supply part configured to supply a silicon-containing gas containing at least silicon and an impurity to each of the process chambers; a plasma generation part connected to each of the process chambers; an ion control part connected to the two-frequency process chamber; a substrate transfer part installed inside the process module and configured to transfer the substrate between the single frequency process chamber and the two-frequency process chamber; and a controller configured to control at least the gas supply part, the plasma generation part, the ion control part, and the substrate transfer part.
    Type: Application
    Filed: August 28, 2017
    Publication date: September 27, 2018
    Applicant: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Satoshi SHIMAMOTO, Hiroshi ASHIHARA, Kazuyuki TOYODA, Naofumi OHASHI
  • Publication number: 20180247819
    Abstract: Provided is a technique of adjusting a work function. A method of manufacturing a semiconductor device includes forming a film having a predetermined thickness and containing a first metal element, carbon and nitrogen on a substrate by: (a) forming a first layer containing the first metal element and carbon by supplying a metal-containing gas containing the first metal element and a carbon-containing gas to the substrate M times and (b) forming a second layer containing the first metal element, carbon and nitrogen by supplying a nitrogen-containing gas to the substrate having the first layer formed thereon N times to nitride the first layer, wherein M and N are selected in a manner that a work function of the film has a predetermined value (where M and N are natural numbers).
    Type: Application
    Filed: April 24, 2018
    Publication date: August 30, 2018
    Applicant: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Arito OGAWA, Kazuhiro HARADA, Yukinao KAGA, Hideharu ITATANI, Hiroshi ASHIHARA
  • Publication number: 20180233348
    Abstract: There is provided a method of manufacturing a semiconductor device which includes: supplying a process gas to a process chamber in a state in which a substrate with an insulating film formed thereon is mounted on a substrate support part inside the process chamber; supplying a first power from a plasma generation part to the process chamber to generate plasma and forming a first silicon nitride layer on the insulating film; and supplying a second power from an ion control part to the process chamber in parallel with the generation of plasma, to form a second silicon nitride layer having lower stress than that of the first silicon nitride layer on the first silicon nitride layer.
    Type: Application
    Filed: August 28, 2017
    Publication date: August 16, 2018
    Applicant: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Satoshi SHIMAMOTO, Hiroshi ASHIHARA, Kazuyuki TOYODA, Naofumi OHASHI
  • Publication number: 20180190496
    Abstract: A method of manufacturing a semiconductor device, includes: forming a film on a substrate by performing a cycle a predetermined number of times, the cycle including: supplying two or more kinds of halogen-based precursors having the same major elements and different halogen elements, or different major elements and the same halogen elements, or different major elements and different halogen elements to the substrate while overlapping at least portions of supply periods of the two or more kinds of halogen-based precursors; and supplying a reactant having a chemical structure different from chemical structures of the two or more kinds of halogen-based precursors to the substrate.
    Type: Application
    Filed: March 1, 2018
    Publication date: July 5, 2018
    Applicant: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Hiroshi ASHIHARA, Kazuhiro HARADA, Kimihiko NAKATANI
  • Patent number: 9916976
    Abstract: An oxide film is formed on a substrate by performing a cycle a predetermined number of times. The cycle includes: continuously performing supplying in advance an oxidant to a substrate in a process chamber and simultaneously supplying the oxidant and a precursor to the substrate in the process chamber, without having to purge an interior of the process chamber between the act of supplying in advance the oxidant and the act of simultaneously supplying the oxidant and the precursor; stopping the supply of the oxidant and the precursor to the substrate in the process chamber and purging the interior of the process chamber; and supplying the oxidant to the substrate in the purged process chamber.
    Type: Grant
    Filed: September 16, 2016
    Date of Patent: March 13, 2018
    Assignee: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Takuro Ushida, Tsukasa Kamakura, Hiroshi Ashihara, Kimihiko Nakatani
  • Publication number: 20180033607
    Abstract: A method of manufacturing a semiconductor device is provided. The method includes forming a film on a substrate by causing a first precursor and a second precursor to intermittently react with each other by repeating a cycle a plurality of times, the cycle alternately performing supplying the first precursor, which satisfies an octet rule and has a first pyrolysis temperature, to the substrate and supplying the second precursor, which does not satisfy the octet rule and has a second pyrolysis temperature lower than the first pyrolysis temperature, to the substrate. In the act of forming the film, a supply amount of the first precursor is set larger than a supply amount of the second precursor.
    Type: Application
    Filed: July 21, 2017
    Publication date: February 1, 2018
    Applicant: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Kimihiko NAKATANI, Hiroshi ASHIHARA, Hajime KARASAWA, Kazuhiro HARADA
  • Publication number: 20170352745
    Abstract: Described is a technique for uniformly doping a silicon substrate having a Fin structure with a dopant. A method of manufacturing a semiconductor device may includes: (a) forming a dopant-containing film containing a dopant on a silicon film by performing a cycle a predetermined number of times, the, cycle including: (a-1) forming a first dopant-containing film by supplying a first dopant-containing gas containing the dopant and a first ligand to a substrate having thereon the silicon film and one of a silicon oxide film and a silicon nitride film; and (a-2) forming a second dopant-containing film by supplying a second dopant-containing gas containing the dopant and a second ligand different from and reactive with the first ligand to the substrate; and (b) forming a doped silicon film by annealing the substrate having the dopant-containing film thereon to diffuse the dopant into the silicon film.
    Type: Application
    Filed: June 5, 2017
    Publication date: December 7, 2017
    Applicant: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Masahito KITAMURA, Hiroshi ASHIHARA
  • Patent number: 9831082
    Abstract: A method of manufacturing a semiconductor device includes forming a thin film having excellent etching resistance and a low dielectric constant on a substrate, removing first impurities containing H2O and Cl from the thin film by heating the thin film at a first temperature higher than a temperature of the substrate in the forming of the thin film, and removing second impurities containing a hydrocarbon compound (CxHy-based impurities) from the thin film in which heat treatment is performed at the first temperature by heating the thin film at a second temperature equal to or higher than the first temperature.
    Type: Grant
    Filed: February 2, 2016
    Date of Patent: November 28, 2017
    Assignee: Hitachi Kokusai Electric Inc.
    Inventors: Satoshi Shimamoto, Takaaki Noda, Takeo Hanashima, Yoshiro Hirose, Hiroshi Ashihara, Tsukasa Kamakura, Shingo Nohara
  • Patent number: 9831083
    Abstract: A film containing a prescribed element and carbon is formed on a substrate, by performing a cycle a prescribed number of times, the cycle including: supplying an organic-based source containing a prescribed element and a pseudo catalyst including at least one selected from the group including a halogen compound and a boron compound, into a process chamber in which the substrate is housed, and confining the organic-based source and the pseudo catalyst in the process chamber; maintaining a state in which the organic-based source and the pseudo catalyst are confined in the process chamber; and exhausting an inside of the process chamber.
    Type: Grant
    Filed: September 27, 2013
    Date of Patent: November 28, 2017
    Assignee: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Daigo Yamaguchi, Tsukasa Kamakura, Hiroshi Ashihara, Tsuyoshi Takeda, Taketoshi Sato
  • Patent number: 9824883
    Abstract: A method of manufacturing a semiconductor device by processing a substrate by supplying a processing space with a gas dispersed in a buffer space disposed at an upstream side of the processing space is provided. The method includes (a) transferring the substrate into the processing space while exhausting a transfer space of the substrate by a first vacuum pump; (b) closing a first valve disposed at a downstream side of the first vacuum pump; (c) supplying the gas into the processing space via the buffer space; and (d) exhausting the buffer space through an exhaust pipe connected to a downstream side of the first valve.
    Type: Grant
    Filed: July 21, 2015
    Date of Patent: November 21, 2017
    Assignee: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Hiroshi Ashihara, Arito Ogawa
  • Patent number: 9816182
    Abstract: A substrate processing apparatus is disclosed. The substrate processing apparatus includes a process chamber configured to accommodate a substrate; a gas supply unit configured to supply a process gas into the process chamber; a lid member configured to block an end portion opening of the process chamber; an end portion heating unit installed around a side wall of an end portion of the process chamber; and a thermal conductor installed on a surface of the lid member in an inner side of the process chamber, and configured to be heated by the end portion heating unit.
    Type: Grant
    Filed: January 29, 2015
    Date of Patent: November 14, 2017
    Assignee: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Hideto Tateno, Yuichi Wada, Hiroshi Ashihara, Keishin Yamazaki, Takurou Ushida, Iwao Nakamura, Manabu Izumi
  • Patent number: 9816183
    Abstract: A substrate processing apparatus includes: a process container where a substrate is processed; a process gas supply unit configured to supply a process gas into the process container; a substrate placing table installed in the process container; a shaft penetrating a hole at a bottom portion of the process container and coupled to the substrate placing table; a bellows surrounding the shaft and disposed outside of the process container wherein an inner space thereof is in communication with a space of the process container; an inert gas supply system configured to supply an inert gas into the inner space of the bellows disposed outside of the process container; and a component falling prevention unit including at least a first structure disposed along a first portion of the hole at the bottom of the process container and a second structure disposed along a second portion of the hole adjacent to the first structure.
    Type: Grant
    Filed: September 8, 2016
    Date of Patent: November 14, 2017
    Assignee: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Hiroshi Ashihara, Motoshi Sawada