Patents by Inventor Hiroshi Horikoshi

Hiroshi Horikoshi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11955500
    Abstract: There is provided a solid-state imaging device including: a first substrate including a first semiconductor substrate and a first wiring layer, the first semiconductor substrate having a pixel unit with pixels; a second substrate including a second semiconductor substrate and a second wiring layer, the second semiconductor substrate having a circuit with a predetermined function; and a third substrate including a third semiconductor substrate and a third wiring layer, the third semiconductor substrate having a circuit with a predetermined function, the first, second, and third substrates being stacked in this order, the first substrate and the second substrate being bonded together with the first wiring layer and the second wiring layer opposed to each other, a first coupling structure on bonding surfaces of the first substrate and the second substrate, and including an electrode junction structure with electrodes formed on the respective bonding surfaces in direct contact with each other.
    Type: Grant
    Filed: February 3, 2022
    Date of Patent: April 9, 2024
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Reijiroh Shohji, Masaki Haneda, Hiroshi Horikoshi, Minoru Ishida, Takatoshi Kameshima, Ikue Mitsuhashi, Hideto Hashiguchi, Tadashi Iijima
  • Patent number: 11945791
    Abstract: The present invention makes it possible to provide a compound represented by formula (1) and a composition for an optical material containing this compound. (Where m+n=4, m represents an integer of from 0 to 3, and n represents an integer of from 1 to 4.) In addition, the present invention makes it possible to provide a method for producing an optical material, the method including a step for adding 0.0001-10 parts by mass of a polymerization catalyst per 100 parts by mass of the composition for an optical material, polymerizing, and curing.
    Type: Grant
    Filed: August 1, 2019
    Date of Patent: April 2, 2024
    Assignee: MITSUBISHI GAS CHEMICAL COMPANY, INC.
    Inventors: Kouhei Takemura, Hiroshi Horikoshi
  • Patent number: 11948961
    Abstract: A solid-state imaging device including a first substrate on which a pixel unit is formed, and a first semiconductor substrate and a first multi-layered wiring layer are stacked, a second substrate on which a circuit having a predetermined function is formed, and a second semiconductor substrate and a second multi-layered wiring layer are stacked, and a third substrate on which a circuit having a predetermined function is formed, and a third semiconductor substrate and a third multi-layered wiring layer are stacked. The first substrate, the second substrate, and the third substrate are stacked in this order. A first coupling structure for electrically coupling a circuit of the first substrate and the circuit of the second substrate to each other does not include a coupling structure formed from the first substrate as a base over bonding surfaces of the first substrate and the second substrate.
    Type: Grant
    Filed: July 20, 2022
    Date of Patent: April 2, 2024
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Hideto Hashiguchi, Reijiroh Shohji, Hiroshi Horikoshi, Ikue Mitsuhashi, Tadashi Iijima, Takatoshi Kameshima, Minoru Ishida, Masaki Haneda
  • Patent number: 11919877
    Abstract: The present invention enables provision of a production method for 1,2,3,5,6-pentathiepane, the method comprising, in the following order, step A for reacting a trithiocarbonate, sulfur, and a methane dihalide together using a phase-transfer catalyst in a multilayer system having a water layer and an organic layer, step B for separating the water layer from the organic layer, and step C for stopping the reaction using an acid.
    Type: Grant
    Filed: March 5, 2019
    Date of Patent: March 5, 2024
    Assignee: MITSUBISHI GAS CHEMICAL COMPANY, INC.
    Inventors: Hiroyuki Tanagi, Kouhei Takemura, Hiroshi Horikoshi
  • Publication number: 20240006448
    Abstract: Provided is an imaging device including: a first semiconductor substrate provided with a photoelectric conversion element, a second semiconductor substrate stacked on the first semiconductor substrate with an interlayer insulating film interposed therebetween and provided with a pixel circuit that reads out charges generated in the photoelectric conversion element as a pixel signal, and a via that penetrates the interlayer insulating film and electrically connects a first surface of the first semiconductor substrate facing the second semiconductor substrate and at least a part of a second surface of the second semiconductor substrate facing the first surface.
    Type: Application
    Filed: October 11, 2021
    Publication date: January 4, 2024
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Takeya MOCHIZUKI, Keiichi NAKAZAWA, Shinichi YOSHIDA, Kenya NISHIO, Nobutoshi FUJII, Suguru SAITO, Masaki OKAMOTO, Ryosuke KAMATANI, Yuichi YAMAMOTO, Kazutaka IZUKASHI, Yuki MIYANAMI, Hirotaka YOSHIOKA, Hiroshi HORIKOSHI, Takuya KUROTORI, Shunsuke FURUSE, Takayoshi HONDA
  • Patent number: 11858920
    Abstract: Provided is a composition for optical materials that gives optical materials which can have at least one improved property selected from among satisfactory mold releasability after polymerization and curing, unsusceptibility to separation from the mold during polymerization and curing, transparency, and low-level striae. The present invention further provides a compound represented by formula (1). The composition for optical materials comprises the compound represented by formula (1) and a compound represented by formula (2). (In formula (1), X1 and X2 represent O or S, provided that both X1 and X2 are O or that X1 is O and X2 is S.
    Type: Grant
    Filed: June 27, 2019
    Date of Patent: January 2, 2024
    Assignee: MITSUBISHI GAS CHEMICAL COMPANY, INC.
    Inventors: Kouhei Takemura, Yousuke Imagawa, Hiroshi Horikoshi
  • Patent number: 11804507
    Abstract: A solid-state imaging device including a first substrate having a pixel unit formed thereon and including a first semiconductor substrate and a first multi-layered wiring layer stacked, a second substrate having a circuit formed thereon and including a second semiconductor substrate and a second multi-layered wiring layer, the circuit having a predetermined function, and a third substrate having a circuit formed thereon and including a third semiconductor substrate and a third multi-layered wiring layer. The first substrate and the second substrate are bonded together such that that the first multi-layered wiring layer and the second semiconductor substrate are opposed to each other. The solid-state imaging device includes a first coupling structure and a second coupling structure. The first coupling structure electrically couples a circuit of the first substrate and the circuit of the second substrate.
    Type: Grant
    Filed: November 23, 2021
    Date of Patent: October 31, 2023
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Ikue Mitsuhashi, Reijiroh Shohji, Minoru Ishida, Tadashi Iijima, Takatoshi Kameshima, Hideto Hashiguchi, Hiroshi Horikoshi, Masaki Haneda
  • Publication number: 20230282666
    Abstract: An imaging device according to an embodiment of the present disclosure includes: a first wiring layer; a first insulating film; and a second insulating film. The first wiring layer includes a plurality of first wiring lines that extends in one direction. The plurality of first wiring lines each has a notch at at least one of ends of one surface in a cross section orthogonal to an extending direction. The first insulating film covers a surface of the first wiring layer. The second insulating film is stacked on the first insulating film. The second insulating film forms a gap between the plurality of adjacent first wiring lines.
    Type: Application
    Filed: July 8, 2021
    Publication date: September 7, 2023
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Yoshihisa KAGAWA, Hiroshi HORIKOSHI, Masaki HANEDA, Hiroshi NAKAZAWA, Takatoshi KAMESHIMA
  • Patent number: 11634558
    Abstract: An optical resin material for chromatic aberration correction is provided including at least 5% by mass of a compound (component A) represented by formula (1) or formula (3), in which R1 to R6 each independently represent a structure represented by formula (2), in which the broken line represents a binding site; n1 represents an integer of 0 to 3; n2 represents an integer of 0 or 1; n3 represents an integer of 0 to 4; R7 represents hydrogen, an acryl group, a methacryl group, a cyanoacryl group, a cyclic ether group, an allyl group, a propargyl group, a hydroxy group, an isocyanate group, chlorine, or an optionally branched alkyl group having 1 to 8 carbon atoms; and X represents an alkylene glycol chain having 2 to 7 carbon atoms or a lactone-modified ketone chain, in which R1 to R6 each independently represent a structure represented by formula (2).
    Type: Grant
    Filed: December 17, 2018
    Date of Patent: April 25, 2023
    Assignee: MITSUBISHI GAS CHEMICAL COMPANY, INC.
    Inventors: Kosuke Namiki, Sunao Nojima, Shoko Suzuki, Noriyuki Kato, Hiroshi Horikoshi
  • Publication number: 20230100848
    Abstract: A composition for an optical material contains (a) an episulfide compound, (b) a polymerization catalyst, and (c) an ester compound having a halogen at the ? position. The (c) ester compound having a halogen at the a position is preferably at least one compound selected from the group consisting of dimethyl chloromalonate, diethyl chloromalonate, dimethyl bromomalonate, and diethyl bromomalonate.
    Type: Application
    Filed: May 21, 2021
    Publication date: March 30, 2023
    Applicant: MITSUBISHI GAS CHEMICAL COMPANY, INC.
    Inventors: Mariko SADO, Kouhei TAKEMURA, Hiroshi HORIKOSHI
  • Patent number: 11594567
    Abstract: A solid-state imaging device includes first through third substrates. The first substrate includes a first semiconductor substrate and a first multi-layered wiring layer stacked thereon. The second substrate includes a second semiconductor substrate and a second multi-layered wiring layer stacked thereon. The third substrate includes a third semiconductor substrate and a third multi-layered wiring layer stacked thereon. A coupling structure for electrically coupling at least two of the first through third substrates includes a via. The via exposes a predetermined wiring line in the second multi-layered wiring layer while exposing a portion of a predetermined wiring line in the first multi-layered wiring layer from a back surface side of the first substrate, or exposes a predetermined wiring line in the third multi-layered wiring layer while exposing a portion of the predetermined wiring line in the first multi-layered wiring layer or the second multi-layered wiring layer from the back surface.
    Type: Grant
    Filed: March 23, 2018
    Date of Patent: February 28, 2023
    Assignee: SONY GROUP CORPORATION
    Inventors: Tadashi Iijima, Takatoshi Kameshima, Ikue Mitsuhashi, Hiroshi Horikoshi, Hideto Hashiguchi, Reijiroh Shohji, Minoru Ishida, Masaki Haneda
  • Publication number: 20230020137
    Abstract: A solid-state imaging device including: a first substrate having a pixel unit, and a first semiconductor substrate and a first wiring layer; a second substrate with a circuit, and a second semiconductor substrate and a second wiring layer; and a third substrate with a circuit, and a third semiconductor substrate and a third wiring layer. The first and second substrates are bonded together such that the first wiring layer and the second semiconductor substrate are opposed to each other. The device includes a first coupling structure for electrically coupling a circuit of the first substrate and the circuit of the second substrate. The first coupling structure includes a via in which electrically-conductive materials are embedded in a first through hole that exposes a wiring line in the first wiring layer and in a second through hole that exposes a wiring line in the second wiring layer or a film-formed structure.
    Type: Application
    Filed: September 27, 2022
    Publication date: January 19, 2023
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Hideto HASHIGUCHI, Reijiroh SHOHJI, Hiroshi HORIKOSHI, Ikue MITSUHASHI, Tadashi IIJIMA, Takatoshi KAMESHIMA, Minoru ISHIDA, Masaki HANEDA
  • Publication number: 20220406834
    Abstract: There is provided a semiconductor device that can minimize deterioration of performance of a capacitor due to a bonding process. Between a first substrate and a second substrate bonded to each other, the semiconductor device includes a first electrode which is provided in the first substrate and of which one surface is positioned on the same surface as a bonding surface between the first substrate and the second substrate, and a second electrode which is provided in the second substrate and of which one surface is positioned on the same surface as a bonding surface and bonded to one surface of the first electrode. Therefore, the semiconductor device includes at least one of a first capacitor which is provided in the first substrate and of which one electrode is electrically connected to a non-exposed surface of the first electrode and a second capacitor which is provided in the second substrate and of which one electrode is electrically connected to a non-exposed surface of the second electrode.
    Type: Application
    Filed: September 30, 2020
    Publication date: December 22, 2022
    Inventor: HIROSHI HORIKOSHI
  • Publication number: 20220359603
    Abstract: A solid-state imaging device is provided that comprises a first substrate that includes a first multi-layered wiring layer stacked on a first semiconductor substrate, a second substrate that includes a second multi-layered wiring layer and an insulating layer stacked on a second semiconductor substrate, and a third substrate that includes a third multi-layered wiring layer stacked on a third semiconductor substrate. A first coupling structure electrically couples the first and second substrates to each other. A second coupling structure exists on bonding surfaces of the second and third substrates, and includes an electrode junction structure in which electrodes formed on respective bonding surfaces are in direct contact with each other. A first via penetrates the second semiconductor substrate and electrically couples a first electrode to a wiring in the second multi-layered wiring layer. A second via electrically couples the second electrode to another wiring in the third multi-layered wiring layer.
    Type: Application
    Filed: July 25, 2022
    Publication date: November 10, 2022
    Inventors: TAKATOSHI KAMESHIMA, HIDETO HASHIGUCHI, IKUE MITSUHASHI, HIROSHI HORIKOSHI, REIJIROH SHOHJI, MINORU ISHIDA, TADASHI IIJIMA, MASAKI HANEDA
  • Publication number: 20220359605
    Abstract: To provide a solid-state imaging device and an electronic apparatus with further improved performance. A solid-state imaging device including: a first substrate on which a pixel unit is formed, and a first semiconductor substrate and a first multi-layered wiring layer are stacked; a second substrate on which a circuit having a predetermined function is formed, and a second semiconductor substrate and a second multi-layered wiring layer are stacked; and a third substrate on which a circuit having a predetermined function is formed, and a third semiconductor substrate and a third multi-layered wiring layer are stacked. The first substrate, the second substrate, and the third substrate are stacked in this order. The pixel unit has pixels arranged thereon. The first substrate and the second substrate are bonded together in a manner that the first multi-layered wiring layer and the second semiconductor substrate are opposed to each other.
    Type: Application
    Filed: July 20, 2022
    Publication date: November 10, 2022
    Inventors: HIDETO HASHIGUCHI, REIJIROH SHOHJI, HIROSHI HORIKOSHI, IKUE MITSUHASHI, TADASHI IIJIMA, TAKATOSHI KAMESHIMA, MINORU ISHIDA, MASAKI HANEDA
  • Patent number: 11476294
    Abstract: A solid-state imaging device including: a first substrate having a pixel unit, and a first semiconductor substrate and a first wiring layer; a second substrate with a circuit, and a second semiconductor substrate and a second wiring layer; and a third substrate with a circuit, and a third semiconductor substrate and a third wiring layer. The first and second substrates are bonded together such that the first wiring layer and the second semiconductor substrate are opposed to each other. The device includes a first coupling structure for electrically coupling a circuit of the first substrate and the circuit of the second substrate. The first coupling structure includes a via in which electrically-conductive materials are embedded in a first through hole that exposes a wiring line in the first wiring layer and in a second through hole that exposes a wiring line in the second wiring layer or a film-formed structure.
    Type: Grant
    Filed: March 29, 2021
    Date of Patent: October 18, 2022
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Hideto Hashiguchi, Reijiroh Shohji, Hiroshi Horikoshi, Ikue Mitsuhashi, Tadashi Iijima, Takatoshi Kameshima, Minoru Ishida, Masaki Haneda
  • Patent number: 11411036
    Abstract: A solid-state imaging device includes a first substrate including a first semiconductor substrate and a first multi-layered wiring layer stacked on the first semiconductor substrate, a second substrate including a second semiconductor substrate and a second multi-layered wiring layer stacked on the second semiconductor substrate, a third substrate including a third semiconductor substrate and a third multi-layered wiring layer stacked on the third semiconductor substrate, and a first coupling structure for electrically coupling the first substrate and the second substrate. The first substrate, the second substrate, and the third substrate are stacked in this order. The first substrate and the second substrate are bonded together such that the first multi-layered wiring layer and the second multi-layered wiring layer are opposed to each other. The first substrate excludes a coupling structure formed from the first substrate as a base over bonding surfaces of the first substrate and the second substrate.
    Type: Grant
    Filed: March 23, 2018
    Date of Patent: August 9, 2022
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Takatoshi Kameshima, Hideto Hashiguchi, Ikue Mitsuhashi, Hiroshi Horikoshi, Reijiroh Shohji, Minoru Ishida, Tadashi Iijima, Masaki Haneda
  • Patent number: 11411037
    Abstract: [Object] To provide a solid-state imaging device and an electronic apparatus with further improved performance. [Solution] A solid-state imaging device including: a first substrate on which a pixel unit is formed, and a first semiconductor substrate and a first multi-layered wiring layer are stacked; a second substrate on which a circuit having a predetermined function is formed, and a second semiconductor substrate and a second multi-layered wiring layer are stacked; and a third substrate on which a circuit having a predetermined function is formed, and a third semiconductor substrate and a third multi-layered wiring layer are stacked. The first substrate, the second substrate, and the third substrate are stacked in this order. The pixel unit has pixels arranged thereon. The first substrate and the second substrate are bonded together in a manner that the first multi-layered wiring layer and the second semiconductor substrate are opposed to each other.
    Type: Grant
    Filed: March 23, 2018
    Date of Patent: August 9, 2022
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Hideto Hashiguchi, Reijiroh Shohji, Hiroshi Horikoshi, Ikue Mitsuhashi, Tadashi Iijima, Takatoshi Kameshima, Minoru Ishida, Masaki Haneda
  • Patent number: 11377433
    Abstract: The present invention makes it possible to provide a method for producing a polyfunctional sulfur-containing epoxy compound, the method being characterized in that a polyfunctional thiol is reacted with an epihalohydrin in the presence of a reducing agent to form a polyfunctional sulfur-containing halohydrin, which is then reacted with a basic compound. The reducing agent is preferably at least one selected from the group consisting of sodium borohydride, lithium borohydride, lithium aluminum hydride, diisobutylaluminum hydride, and hydrazine.
    Type: Grant
    Filed: June 11, 2019
    Date of Patent: July 5, 2022
    Assignee: MITSUBISHI GAS CHEMICAL COMPANY, INC.
    Inventors: Yousuke Imagawa, Hiroshi Horikoshi
  • Publication number: 20220157877
    Abstract: There is provided a solid-state imaging device including: a first substrate including a first semiconductor substrate and a first wiring layer, the first semiconductor substrate having a pixel unit with pixels; a second substrate including a second semiconductor substrate and a second wiring layer, the second semiconductor substrate having a circuit with a predetermined function; and a third substrate including a third semiconductor substrate and a third wiring layer, the third semiconductor substrate having a circuit with a predetermined function, the first, second, and third substrates being stacked in this order, the first substrate and the second substrate being bonded together with the first wiring layer and the second wiring layer opposed to each other, a first coupling structure on bonding surfaces of the first substrate and the second substrate, and including an electrode junction structure with electrodes formed on the respective bonding surfaces in direct contact with each other.
    Type: Application
    Filed: February 3, 2022
    Publication date: May 19, 2022
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Reijiroh SHOHJI, Masaki HANEDA, Hiroshi HORIKOSHI, Minoru ISHIDA, Takatoshi KAMESHIMA, Ikue MITSUHASHI, Hideto HASHIGUCHI, Tadashi IIJIMA