Patents by Inventor Hiroshi Inada

Hiroshi Inada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20040049080
    Abstract: Novel triphenylamines represented by the general formula (I) [wherein A is 1-naphthyl or 2-naphthyl]. These compounds exhibit stable amorphous properties in spite of their exhibiting grass transition temperatures of 100° C. or above, and are excellent in solubilities in organic solvents.
    Type: Application
    Filed: July 30, 2003
    Publication date: March 11, 2004
    Inventors: Hiroshi Inada, Yoshiko Takahashi, Isao Kameno, Yasuhiko Shirota
  • Patent number: 6313916
    Abstract: A position detecting system to be used with a grating mark provided on an object and having different directionalities is disclosed, wherein light is projected to the grating mark, and wherein light from the grating mark is detected through a beam splitter disposed at or adjacent a pupil of a detection optical system, for receiving light from the grating mark, the beam splitter having a reflective coating partially formed thereon.
    Type: Grant
    Filed: October 27, 1998
    Date of Patent: November 6, 2001
    Assignee: Canon Kabushiki Kaisha
    Inventor: Hiroshi Inada
  • Patent number: 5856275
    Abstract: Patterned superconducting wiring lines each having a portion of a thin film of an oxide superconductor deposited on a flat substrate, the portion having a predetermined crystal orientation (a-axis or c-axis orientation) with respect to a flat surface of the substrate, remaining portions of the thin film of the oxide superconductor having a different crystal orientation (c-axis or a-axis orientation) from the portion and/or having an insulation zones. Both of the portion and the remaining portions have a substantially identical thickness so that the thin film has a substantially flat planar surface.
    Type: Grant
    Filed: November 1, 1991
    Date of Patent: January 5, 1999
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Hiroshi Inada, Takao Nakamura, Michitomo Iiyama
  • Patent number: 5854493
    Abstract: A superconducting device has a substrate, and a superconducting channel provided by an oxide superconductor thin film formed to have an angle with respect to a deposition surface of the substrate. A superconductor source electrode region and a superconductor drain electrode region are formed at opposite ends of the superconducting channel, so that a superconducting current can flow through the superconducting channel between the superconductor source electrode region and the superconductor drain electrode region. A gate electrode region is formed of a oxide superconductor thin film which is deposited in parallel to the deposition surface of the substrate and which has an end portion which abuts with an insulating layer which separates the end portion and the superconducting channel so as to control superconducting current flow through the superconducting channel.
    Type: Grant
    Filed: April 14, 1997
    Date of Patent: December 29, 1998
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Takao Nakamura, Hiroshi Inada, Michitomo Iiyama
  • Patent number: 5840204
    Abstract: A method for patterning an oxide superconductor thin film, comprising a step of forming a SiO.sub.2 layer on the oxide superconductor thin film, patterning the SiO.sub.2 layer so as to form the same pattern as that of the oxide superconductor thin film which will be patterned, etching the oxide superconductor thin film by using the patterned SiO.sub.2 layer as a mask, and removing the SiO.sub.2 layer by using a weak HF solution, a buffer solution including HF or a mixture including HF.
    Type: Grant
    Filed: April 5, 1995
    Date of Patent: November 24, 1998
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Hiroshi Inada, So Tanaka, Michitomo Iiyama
  • Patent number: 5811375
    Abstract: A superconducting multilayer interconnection comprises a substrate having a principal surface, a first superconducting current path of a c-axis orientated oxide superconductor thin film formed on the principal surface of the substrate, an insulating layer on the first superconducting current path, and a second superconducting current path of a c-axis orientated oxide superconductor thin film formed on the insulating layer so that the first and second superconducting current paths are insulated by the insulating layer. The superconducting multilayer interconnection further comprises a superconducting interconnect current path of an a-axis orientated oxide superconductor thin film, through which the first and second superconducting current paths are electrically connected each other.
    Type: Grant
    Filed: June 30, 1995
    Date of Patent: September 22, 1998
    Assignee: Sumitomo Electric Industries Ltd.
    Inventors: Takao Nakamura, Hiroshi Inada, Michitomo Iiyama
  • Patent number: 5789346
    Abstract: Method for manufacturing a superconducting device including forming on a surface of a substrate a non-superconducting oxide layer, a first oxide superconductor thin film, etching the first oxide superconductor thin film so as to form a concave portion, implanting ions to the first oxide superconductor thin film at the bottom of the concave portion so as to form an insulating region such that the first oxide superconductor thin film is divided into two superconducting regions by the insulating region, and forming a second oxide superconductor thin film on the insulating region and the two superconducting regions, which is continuous to the two superconducting regions.
    Type: Grant
    Filed: May 20, 1996
    Date of Patent: August 4, 1998
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Takao Nakamura, Hiroshi Inada, Michitomo Iiyama
  • Patent number: 5739084
    Abstract: A method for fabricating a superconducting device with a substrate, a first oxide superconductor thin film, a barrier layer, a diffusion layer, and a second oxide superconductor thin film. The first oxide superconductor thin film with a very thin thickness is formed on the principal surface of the substrate. The barrier layer and the diffusion source layer are formed on a portion of the first oxide superconductor thin film. The second oxide superconductor thin film is grown on an exposed surface of the first oxide superconductor thin film until the barrier and diffusion source layers are embedded in the second oxide superconductor thin film, so that a material of the diffusion source layer is diffused into the second oxide superconductor thin film.
    Type: Grant
    Filed: January 2, 1997
    Date of Patent: April 14, 1998
    Assignee: Sumitomo Electric Industries Ltd.
    Inventors: Takao Nakamura, Hiroshi Inada, Michitomo Iiyama
  • Patent number: 5717222
    Abstract: A superconducting device includes a substrate, a projecting insulating region formed in a principal surface of the substrate, and a first thin film portion of an oxide superconductor formed on the projecting insulating region. Second and third thin film portions of an oxide superconductor are positioned at opposite sides of the projecting insulating region to be continuous to the first thin film portion, respectively, so that a superconducting current can flow through the first thin film portion between the second thin film portion and the third thin film portion. The second thin film portion and the third thin film portion has a thickness larger than that of the first thin film portion. The projecting insulating region is formed of an oxide which is composed of the same constituent elements of the oxide superconductor but which has the oxygen content smaller than that of said oxide superconductor.
    Type: Grant
    Filed: May 23, 1996
    Date of Patent: February 10, 1998
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Takao Nakamura, Hiroshi Inada, Michitomo Iiyama
  • Patent number: 5714767
    Abstract: For manufacturing a superconducting device, a compound layer which is composed of the same constituent elements of an oxide superconductor is formed on a surface of the substrate, and a gate electrode is formed on a portion of the compound layer. Portions of the compound layer at both sides of die gate electrode are etched using die gate electrode as a mask, so that a shallow step is formed on an upper surface of the compound layer and side surfaces of the step exposed. After that electric power is applied to the gate electrode to heat the gate electrode so as to carry out a heat-treatment on the portion of die compound layer under the gate electrode locally, so that a gate insulator formed directly under the the gate electrode and a superconducting channel which is constituted an extremely thin superconducting region composed of the oxide superconductor and formed under die gate insulator are produced in a self alignment to die gate electrode.
    Type: Grant
    Filed: November 1, 1995
    Date of Patent: February 3, 1998
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Takao Nakamura, Hiroshi Inada, Michitomo Iiyama
  • Patent number: 5683968
    Abstract: A superconducting device or a super-FET has a pair of superconducting electrode regions (20b, 20c) consisting of a thin film (20) oxide superconductor being deposited on a substrate (5) and a weak/ink region (20a), the superconducting electrode regions (20b, 20c) being positioned at opposite sides of the weak link region (20a), these superconducting electrode regions (20b, 20c) and the weak link region (20a) being formed on a common plane surface of the substrate (5). The weak link region (20a) is produced by local diffusion of constituent element(s) of the substrate (5) and/or a gate electrode insulating layer (16) into the thin film (20) of the oxide superconductor in such a manner that a substantial wall thickness of the thin film (20) of the oxide superconductor is reduced at the weak link region (20a) so as to leave a weak link or superconducting channel (10) in the thin film (20) of oxide superconductor over a non-superconducting region (50) which is produced by the diffusion.
    Type: Grant
    Filed: August 31, 1995
    Date of Patent: November 4, 1997
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Takao Nakamura, Hiroshi Inada, Michitomo Iiyama
  • Patent number: 5672569
    Abstract: A superconducting circuit having patterned superconducting wiring lines. Each wiring line consists of at least one portion (2') of the thin film (2) of an oxide superconductor deposited on a substrate (1). The portion (2') has a predetermined crystal orientation and the remaining portions (2") have a different crystal orientation or changed to non-superconductor. The superconducting circuit has a planar surface.In variations, two different wiring lines (21, 22) each having a different crystal orientation are produced at different portions of a thin film of oxide superconductor, so that superconducting current flow separately through two different portions in a common thin film.
    Type: Grant
    Filed: March 8, 1995
    Date of Patent: September 30, 1997
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Takao Nakamura, Hiroshi Inada, Michitomo Iiyama
  • Patent number: 5646096
    Abstract: Patterned superconducting wiring lines each consisting of a portion of a thin film of an oxide superconductor deposited on a flat substrate, the portion having a predetermined crystal orientation (a-axis or c-axis orientation) with respect to a flat surface of the substrate, remaining portions of the thin film of the oxide superconductor having a different crystal orientation (c-axis or a-axis orientation) from the portion and/or consisting of an insulation zones. Both of the portion and the remaining portions have a substantially identical thickness so that the thin film has a substantially flat planar surface.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: July 8, 1997
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Hiroshi Inada, Takao Nakamura, Mitchimoto Iiyama
  • Patent number: 5637555
    Abstract: A method for manufacturing a three-terminal superconducting device is disclosed. A superconducting channel constituted in an oxide superconductor thin film is deposited on a deposition surface of a substrate. A gate electrode for the device is formed through a gate insulator layer on the superconducting channel of the device. The steps of forming the gate electrode include forming a thin film that stands upright with respect to the insulator layer for the gate.
    Type: Grant
    Filed: August 23, 1995
    Date of Patent: June 10, 1997
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Takao Nakamura, Hiroshi Inada, Michitomo Iiyama
  • Patent number: 5621223
    Abstract: A superconducting device includes first and second oxide superconducting regions of a relatively thick thickness, formed directly on a principal surface of a substrate to be separate from each other, and a third oxide superconducting region of an extremely thin thickness which is formed directly on the principal surface of the substrate so as to bridge the first and second oxide superconducting regions. A barrier layer and a diffusion source layer are formed on the third oxide superconducting region, and an isolation region is formed to cover an upper portion or both side surfaces of the diffusion source layer. The first, second and third oxide superconducting regions and the isolation region are formed of the same oxide superconductor material, and the isolation region is diffused with a material of the diffusion source layer, so that the isolation region does not show superconductivity.
    Type: Grant
    Filed: August 16, 1995
    Date of Patent: April 15, 1997
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Takao Nakamura, Hiroshi Inada, Michitomo Iiyama
  • Patent number: 5607900
    Abstract: A process for removing contaminants from a surface of a thin film of oxide superconductor deposited on a substrate. The thin film of oxide superconductor is heat-treated in ultra-high vacuum at a temperature which is within a range of -100.degree. C. to +100.degree. C. of the temperature at which oxygen enter into the oxide superconductor.The process is used for removing photo-resist from a surface of thin film of oxide superconductor and for producing a layered structure containing at least one thin film of oxide superconductor such as Y.sub.1 Ba.sub.2 Cu.sub.3 O.sub.7-x having a contaminated surface. On the cleaned surface, another thin film of oxide superconductor or non-superconductor is deposited. The resulting structure of layered thin films is used for fabricating superconducting transistor, Josephson junctions, superconducting circuits or the like.
    Type: Grant
    Filed: November 1, 1995
    Date of Patent: March 4, 1997
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Hiroshi Inada, Takao Nakamura, Michitomo Iiyama, So Tanaka
  • Patent number: 5567674
    Abstract: A thin film of oxide superconductor consisting of more than two portions (1, 11, 12) each possessing a predetermined crystal orientation and deposited on a common surface of a substrate (2). At least one selected portion (10) of thin film of oxide superconductor is deposited on a thin under-layer (4, 100) which facilitates crystal growth of selected portions and which is deposited previously on the substrate. The selected portions (10) may consist of a-axis oriented thin film portions while non-selected portions (11, 12) may consists of c-axis oriented thin film portions. The thin under-layer can be a buffer layer (4) or a very thin film (100) of oxide superconductor.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: October 22, 1996
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Hiroshi Inada, Michitomo Iiyama
  • Patent number: 5547923
    Abstract: For manufacturing a superconducting device, a first oxide superconductor thin film having a very thin thickness is formed on a principal surface of a substrate, and a stacked structure of a gate insulator and a gate electrode is formed on a portion of the first oxide superconductor thin film. A second oxide superconductor thin film is grown on an exposed surface of the first oxide superconductor thin film, using the gate electrode as a mask, so that first and second superconducting regions having a relatively thick thickness are formed at opposite sides of the gate electrode, electrically isolated from the gate electrode. A source electrode and a drain electrode is formed on the first and second oxide superconducting regions. The superconducting device thus formed can functions as a super-FET.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: August 20, 1996
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Takao Nakamura, Hiroshi Inada, Michitomo Iiyama
  • Patent number: 5539215
    Abstract: A superconducting device comprising a substrate having a principal surface, a non-superconducting oxide layer having a similar crystal structure to that of the oxide superconductor, a first and a second superconducting regions formed of c-axis oriented oxide superconductor thin films on the non-superconducting oxide layer separated from each other and gently inclining to each other, a third superconducting region formed of an extremely thin c-axis oriented oxide superconductor thin film between the first and the second superconducting regions, which is continuous to the first and the second superconducting regions.
    Type: Grant
    Filed: December 29, 1994
    Date of Patent: July 23, 1996
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Takao Nakamura, Hiroshi Inada, Michitomo Iiyama
  • Patent number: 5514877
    Abstract: A superconducting device or a super-FET has a pair of superconducting electrode regions (20b,20c) consisting of a thin film (20)oxide superconductor being deposited on a substrate (5) and a weak link region (20a), the superconducting electrode regions (20b, 20c) being positioned at opposite sides of the weak link region (20a) these superconducting electrode regions (20b, 20c) and the weak link region (20a) being formed on a common plane surface of the substrate (5). The weak link region (20a) is produced by local diffusion of constituent element(s) of the substrate (5) into the thin film (20) of the oxide superconductor in such a manner that a substantial wall thickness of the thin film (20) of the oxide superconductor is reduced at the weak link region (20a) so as to leave a weak link or superconducting channel (10) in the thin film (20) of oxide superconductor over a non-superconducting region (50) which is produced by the diffusion.
    Type: Grant
    Filed: January 21, 1994
    Date of Patent: May 7, 1996
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Takao Nakamura, Hiroshi Inada, Michitomo Iiyama