Patents by Inventor Hiroshi Kono

Hiroshi Kono has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8686436
    Abstract: According to one embodiment, a semiconductor device includes a first semiconductor region, a second semiconductor region, a third semiconductor region, a fourth semiconductor region, an insulating film, a control electrode, a first electrode, and a second electrode. The first semiconductor region includes silicon carbide, and has a first portion. The second semiconductor region is provided on the first semiconductor region, and includes silicon carbide. The third semiconductor region and the fourth semiconductor region are provided on the second semiconductor region, and includes silicon carbide. The electrode is provided on the film. The second semiconductor region has a first region and a second region. The first region contacts with the third semiconductor region and the fourth semiconductor region. The second region contacts with the first portion. The impurity concentration of the first region is higher than an impurity concentration of the second region.
    Type: Grant
    Filed: August 31, 2012
    Date of Patent: April 1, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hiroshi Kono, Takashi Shinohe, Takuma Suzuki, Johji Nishio
  • Publication number: 20140084993
    Abstract: According to one embodiment, a semiconductor device includes: a substrate; a first circuit portion; and a second circuit portion. The first circuit portion includes: a first and a second switching elements, and a first and a second diodes. The second circuit portion includes a third and a fourth switching elements, and a third and a fourth diodes. The first switching element is juxtaposed with the second switching element in a first direction, and is juxtaposed with the fourth switching element in a second direction. The third switching element is juxtaposed with the fourth switching element in the first direction, and is juxtaposed with the second switching element in the second direction. A voltage is applied to electrodes of the first and third switching elements. A voltage of a polarity opposite the first voltage is applied to electrodes of the second and fourth switching elements.
    Type: Application
    Filed: March 11, 2013
    Publication date: March 27, 2014
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Kazuto TAKAO, Hiroshi Kono, Takuo Kikuchi
  • Patent number: 8658503
    Abstract: A semiconductor device includes: a silicon carbide substrate having first and second main surfaces; a first silicon carbide layer provided on the first main surface of the silicon carbide substrate; first silicon carbide regions formed on a surface of the first silicon carbide layer; second and third silicon carbide regions formed on respective surfaces of the first silicon carbide regions; a fourth silicon carbide region formed between facing first silicon carbide regions with the first silicon carbide layer therebetween; a gate insulating film formed continuously on surfaces of the first silicon carbide regions, the first silicon carbide layer, and the fourth silicon carbide region; a gate electrode formed on the gate insulating film; an interlayer insulating film covering the gate electrode; a first electrode electrically connected to the second and third silicon carbide regions; and a second electrode formed on the second main surface of the silicon carbide substrate.
    Type: Grant
    Filed: December 5, 2012
    Date of Patent: February 25, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hiroshi Kono, Takashi Shinohe
  • Publication number: 20140034966
    Abstract: According to one embodiment, a transistor includes: a structural body; an insulating film; a control electrode; a first electrode; and a second electrode. The structural body includes a first through a third semiconductor regions, and includes a compound semiconductor having a first and a second elements. The first electrode is electrically continuous with the third semiconductor region. The second electrode is electrically continuous with the first semiconductor region. The structural body has a first region provided above a lower end of the second semiconductor region and a second region other than the first region. The first region is a region formed by making a ratio of concentration of source gas of the second element to concentration of source gas of the first element larger than 1.0. Impurity concentration of the first conductivity type in the first region is higher than that in the second region.
    Type: Application
    Filed: March 13, 2013
    Publication date: February 6, 2014
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Johji NISHIO, Hiroshi KONO, Takuma SUZUKI, Tatsuo SHIMIZU, Takashi SHINOHE
  • Patent number: 8569795
    Abstract: A semiconductor device of an embodiment includes: a silicon carbide substrate including first and second principal surfaces; a first conductive-type first silicon carbide layer provided on the first principal surface of the silicon carbide substrate; a second conductive-type first silicon carbide region formed on a surface of the first silicon carbide layer; a first conductive-type second silicon carbide region formed on a surface of the first silicon carbide region; a second conductive-type third silicon carbide region formed on the surface of the first silicon carbide region; a gate insulating film continuously formed on the surfaces of the first silicon carbide layer, the first silicon carbide region, and the second silicon carbide region; a first electrode formed of silicon carbide formed on the gate insulating film; a second electrode formed on the first electrode; an interlayer insulating film for covering the first and second electrodes; a third electrode electrically connected to the second silicon ca
    Type: Grant
    Filed: August 25, 2011
    Date of Patent: October 29, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hiroshi Kono, Yukio Nakabayashi, Takashi Shinohe, Makoto Mizukami
  • Publication number: 20130248880
    Abstract: According to one embodiment, a semiconductor device includes a first, a second, a third, and a fourth semiconductor region, a control electrode, a floating electrode, and an insulating film. The first region contains silicon carbide. The second region is provided on the first region and contains silicon carbide. The third region is provided on the second region and contains silicon carbide. The fourth region is provided on the third region and contains silicon carbide. The control electrode is provided in a trench formed in the fourth, the third, and the second region. The floating electrode is provided between the control electrode and a bottom surface of the trench. The insulating film is provided between the trench and the control electrode, between the trench and the floating electrode, and between the control electrode and the floating electrode.
    Type: Application
    Filed: August 31, 2012
    Publication date: September 26, 2013
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Keiko ARIYOSHI, Takuma Suzuki, Hiroshi Kono, Takashi Shinohe
  • Publication number: 20130240904
    Abstract: According to one embodiment, a semiconductor device includes a first semiconductor region, a second semiconductor region, a third semiconductor region, a fourth semiconductor region, an insulating film, a control electrode, a first electrode, and a second electrode. The first semiconductor region includes silicon carbide, and has a first portion. The second semiconductor region is provided on the first semiconductor region, and includes silicon carbide. The third semiconductor region and the fourth semiconductor region are provided on the second semiconductor region, and includes silicon carbide. The electrode is provided on the film. The second semiconductor region has a first region and a second region. The first region contacts with the third semiconductor region and the fourth semiconductor region. The second region contacts with the first portion. The impurity concentration of the first region is higher than an impurity concentration of the second region.
    Type: Application
    Filed: August 31, 2012
    Publication date: September 19, 2013
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Hiroshi KONO, Takashi Shinohe, Takuma Suzuki, Johji Nishio
  • Publication number: 20130234158
    Abstract: According to one embodiment, a semiconductor device includes a first, a second, a third, a fourth, and a fifth semiconductor region, an insulating film, a control electrode, and a first and a second electrode. The first, the second, the third, the fourth and the fifth semiconductor region include silicon carbide. The first semiconductor region has a first impurity concentration, and has a first portion. The second semiconductor region is provided on the first semiconductor region. The third semiconductor region is provided on the second semiconductor region. The fourth semiconductor region is provided between the first portion and the second semiconductor region. The fourth semiconductor region is provided between the first portion and the third semiconductor region. The fifth semiconductor region includes a first region provided between the first portion and the second semiconductor region, and has a second impurity concentration higher than the first impurity concentration.
    Type: Application
    Filed: August 31, 2012
    Publication date: September 12, 2013
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Hiroshi KONO, Takashi Shinohe, Takuma Suzuki, Johji Nishio
  • Publication number: 20130137253
    Abstract: A semiconductor device includes: a silicon carbide substrate having first and second main surfaces; a first silicon carbide layer provided on the first main surface of the silicon carbide substrate; first silicon carbide regions formed on a surface of the first silicon carbide layer; second and third silicon carbide regions formed on respective surfaces of the first silicon carbide regions; a fourth silicon carbide region formed between facing first silicon carbide regions with the first silicon carbide layer therebetween; a gate insulating film formed continuously on surfaces of the first silicon carbide regions, the first silicon carbide layer, and the fourth silicon carbide region; a gate electrode formed on the gate insulating film; an interlayer insulating film covering the gate electrode; a first electrode electrically connected to the second and third silicon carbide regions; and a second electrode formed on the second main surface of the silicon carbide substrate.
    Type: Application
    Filed: December 5, 2012
    Publication date: May 30, 2013
    Inventors: Hiroshi KONO, Takashi Shinohe
  • Patent number: 8431974
    Abstract: According to the embodiment, a semiconductor device includes an SiC substrate of a first or second conductivity type. An SiC layer of the first conductivity type is formed on a front surface of the substrate, a first SiC region of the second conductivity type is formed on the SiC layer, a second SiC region of the first conductivity type is formed within a surface of the first SiC region, a gate dielectric is continuously formed on the SiC layer, the second SiC region, and the surface of the first SiC region interposed between the SiC layer and the second SiC region, a gate electrode is formed on the gate dielectric, a first electrode is embedded in a trench selectively formed in a part where the first SiC region adjoins the second SiC region, and a second electrode is formed on a back surface of the substrate.
    Type: Grant
    Filed: July 29, 2010
    Date of Patent: April 30, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takuma Suzuki, Hiroshi Kono, Takashi Shinohe
  • Publication number: 20130065382
    Abstract: A method of manufacturing a silicon carbide semiconductor device of an embodiment includes: implanting ions in a silicon carbide substrate; performing first heating processing of the silicon carbide substrate in which the ions are implanted; and performing second heating processing of the silicon carbide substrate for which the first heating processing is performed, at a temperature lower than the first heating processing.
    Type: Application
    Filed: February 28, 2012
    Publication date: March 14, 2013
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Johji Nishio, Masaru Furukawa, Hiroshi Kono, Takashi Shinohe
  • Publication number: 20130056780
    Abstract: A light emitting device, comprising: a package which is formed of a resin and has a recess which is provided with a bottom face and two pairs of opposite inner walls surrounding the bottom face, the package having two pairs of opposite side walls made of the inner walls and corresponding outer walls; a lead frame exposed at the bottom face; a light emitting element which is provided on the lead frame; and a sealing resin provided in the recess for sealing the light emitting element, wherein the lead frame has a bottom portion and a reflector portion exposed along one of the pair of opposite inner walls, and a first angle between the reflector portion and the bottom face is greater than a second angle between another one of the pair of opposite inner walls which is opposite to the reflector portion and the bottom face, is provided.
    Type: Application
    Filed: August 31, 2012
    Publication date: March 7, 2013
    Applicant: NICHIA CORPORATION
    Inventor: Hiroshi KONO
  • Patent number: 8354715
    Abstract: According to the embodiments, a semiconductor device using SiC and having a high breakdown voltage, a low on-resistance, and excellent reliability is provided.
    Type: Grant
    Filed: September 1, 2010
    Date of Patent: January 15, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hiroshi Kono, Takashi Shinohe
  • Publication number: 20120228631
    Abstract: A semiconductor device of an embodiment includes: a silicon carbide substrate including first and second principal surfaces; a first conductive-type first silicon carbide layer provided on the first principal surface of the silicon carbide substrate; a second conductive-type first silicon carbide region formed on a surface of the first silicon carbide layer; a first conductive-type second silicon carbide region formed on a surface of the first silicon carbide region; a second conductive-type third silicon carbide region formed on the surface of the first silicon carbide region; a gate insulating film continuously formed on the surfaces of the first silicon carbide layer, the first silicon carbide region, and the second silicon carbide region; a first electrode formed of silicon carbide formed on the gate insulating film; a second electrode formed on the first electrode; an interlayer insulating film for covering the first and second electrodes; a third electrode electrically connected to the second silicon ca
    Type: Application
    Filed: August 25, 2011
    Publication date: September 13, 2012
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Hiroshi KONO, Yukio Nakabayashi, Takashi Shinohe, Makoto Mizukami
  • Patent number: 8155852
    Abstract: A driving/braking force manipulation control input of a k-th wheel, which denotes one or more specific wheels among a plurality of wheels of a vehicle, is determined such that a required condition concerning a relationship among a road surface reaction force that may act from a road surface on the k-th wheel on the basis of the detected values or estimated values of a side slip angle and a friction characteristic of the k-th wheel, a feedback control input related to the driving/braking force of the k-th wheel for bringing a difference between a state amount of the vehicle and a reference state amount close to zero, a driving/braking force feedforward control input based on a drive manipulated variable supplied by a driver of the vehicle, and a k-th wheel driving/braking force manipulation control input is satisfied.
    Type: Grant
    Filed: December 21, 2006
    Date of Patent: April 10, 2012
    Assignee: Honda Motor Co., Ltd.
    Inventors: Toru Takenaka, Takayuki Toyoshima, Hiroyuki Urabe, Hiroshi Kono
  • Patent number: 8135528
    Abstract: An actual vehicle actuator operation control input and a model operation control input are determined by an FB distribution law such that the difference between a reference state amount determined in a vehicle model and an actual state amount of an actual vehicle approximates zero, and then an actuator device of the actual vehicle and the vehicle model are operated on the basis of the control inputs. The value of a parameter of the vehicle model set according to an actual vehicle motional state such that the attenuation property of a reference state amount when a drive manipulated variable is changed is higher than the attenuation property of an actual state amount. Accordingly, the actual vehicle actuator device is properly controlled independently of an actual vehicle motional state such that a state amount related to an actual vehicle motion approximates a vehicle state amount on a dynamic characteristic model.
    Type: Grant
    Filed: May 24, 2007
    Date of Patent: March 13, 2012
    Assignee: Honda Motor Co., Ltd.
    Inventors: Toru Takenaka, Hiroshi Kono, Takayuki Toyoshima, Hiroyuki Urabe
  • Publication number: 20120056195
    Abstract: One embodiment of a semiconductor device includes: a silicon carbide substrate including first and second principal surfaces; a first-conductive-type silicon carbide layer on the first principal surface; a second-conductive-type first silicon carbide region at a surface of the first silicon carbide layer; a first-conductive-type second silicon carbide region at the surface of the first silicon carbide region; a second-conductive-type third silicon carbide region at the surface of the first silicon carbide region; a second-conductive-type fourth silicon carbide region formed between the first silicon carbide region and the second silicon carbide region, and having an impurity concentration higher than that of the first silicon carbide region; a gate insulator; a gate electrode formed on the gate insulator; an inter-layer insulator; a first electrode connected to the second silicon carbide region and the third silicon carbide region; and a second electrode on the second principal surface.
    Type: Application
    Filed: February 24, 2011
    Publication date: March 8, 2012
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Hiroshi Kono, Takashi Shinohe, Chiharu Ota, Makoto Mizukami, Takuma Suzuki, Johji Nishio
  • Publication number: 20120056198
    Abstract: A semiconductor device according to an embodiment includes a semiconductor substrate of a first conductivity type, a first semiconductor layer of the first conductivity type, a first semiconductor region of a second conductivity type, a second semiconductor region of the second conductivity type, a first electrode and a second electrode. The first semiconductor region is formed on at least a part of the first semiconductor layer formed on the semiconductor substrate. The second semiconductor region is formed on another part of the first semiconductor layer to reach an inside of the first semiconductor layer and having an impurity concentration higher than that of the first semiconductor region. The first electrode is formed on the second semiconductor region and a third semiconductor regions formed in a part of the first semiconductor region. The second electrode is formed to be in contact with a rear surface of the semiconductor substrate.
    Type: Application
    Filed: March 2, 2011
    Publication date: March 8, 2012
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Chiharu OTA, Hiroshi Kono, Kazuto Takao, Takashi Shinohe
  • Publication number: 20120037922
    Abstract: The invention provides an ultra-low-on-resistance, excellent-reliability semiconductor device that can finely be processed using SiC and a semiconductor device producing method.
    Type: Application
    Filed: January 6, 2010
    Publication date: February 16, 2012
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Hiroshi Kono, Takashi Shinohe, Makoto Mizukami
  • Patent number: D672323
    Type: Grant
    Filed: August 9, 2011
    Date of Patent: December 11, 2012
    Assignee: Nichia Corporation
    Inventor: Hiroshi Kono