Abstract: The present invention relates to an inspection apparatus comprising: an electron emitting unit for sequentially emitting an electron beam in the direction of the inspection area of a sample; a decelerating means for drawing back the electron beam in the vicinity of the inspection area; an imaging unit for forming images of the electron beam, which has been drawn back in the vicinity of the inspection area, on multiple different image forming conditions; an image detecting unit for capturing the electron beam that formed an image corresponding to each image forming condition and an image processing unit for comparing the images on different image forming conditions with one another to thereby detect a defect in the inspection area.

Abstract: It was hard for conventional SEMs to take measurements at a high speed and take accurate measurements when an insulator exists between an object to probe and the detector, because the conventional SEMs used a continuous electron beam. Also, it was impossible to apply voltage to the sample during the measurement of current. By pulse-modulating the electron beam and extracting a high-frequency signal component from the sample, new SEM equipment disclosed herein detects electrons absorbed in the sample at a high speed and with precision. Precise and high-speed absorption current measurements can be achieved. High-functionality inspection apparatus can be provided.

Abstract: A data bus included in a bi-directional bus circuitry is divided into a first bus node and a second bus node by a repeater circuit. The repeater circuit includes a first tristate buffer for amplifying and transmitting data from the first bus node to the second bus node, and a second tristate buffer connected in reverse direction. When the data bus is not used, the first and second tristate buffers are both activated, and the repeater circuit functions as a latch circuit. Therefore, in the bi-directional bus circuitry, even when the data bus is not used, the potential level of the data bus can be prevented from being left unfixed, ensuring stable operation.

Abstract: A semiconductor integrated circuit device of a low power consumption capable of performing under a low voltage has an array section 21 in which only low threshold voltage MOS FETs are formed, and areas other than the array section 21 in which high threshold voltage MOS FETs whose threshold voltage is higher than that of each low threshold voltage MOS FET formed in the array section are formed.

Abstract: The present invention provides a dielectric ceramic composition comprising: 30 to 90% by weight of a crystallized glass powder capable of depositing a diopside crystal, 1 to 40% by weight of a calcium titanate powder, a strontium titanate powder or a mixed powder thereof, and 0 to 60% by weight of at least one kind of a powder selected from the group consisting of Al2O3, TiO2, ZrO2, MgTiO3, BaTi4O9, La2Ti2O7, Nd2Ti2O7, Ca2Nb2O7, SrZrO3 and CaZrO3, and a dielectric ceramics obtained by firing the same.

Abstract: A semiconductor integrated circuit device of a low power consumption capable of performing under a low voltage has an array section 21 in which only low threshold voltage MOS FETs are formed, and areas other than the array section 21 in which high threshold voltage MOS FETs whose threshold voltage is higher than that of each low threshold voltage MOS FET formed in the array section are formed.

Abstract: A sunroof device is made up of a pair of guide rails placed at laterally opposed inner peripheries of an open area of a vehicle. The pair of guide rails support a movable panel covering and uncovering the open area. A first gutter portion extends along a lengthwise direction of the guide rail. A second gutter portion is positioned below the first gutter portion and is brought into fluid communication with an end of the first gutter portion, characterized in that the second gutter portion is formed with an upstanding wall located at a distance from the end of the first gutter portion when the second gutter portion is brought into an overlap condition in such a manner that the upstanding wall defines an area of the second gutter portion to be overlapped with the first gutter portion. An easy connection can be made between the first gutter portion and the second gutter portion.

Abstract: A circuit pattern inspecting instrument includes an electron-optical system for irradiating an electron beam on a sample, an electron beam deflector, a detector for detecting secondary charged particles from the sample, and a mode setting unit for switching between a first mode and a second mode. An electron beam current is larger in the first mode than in the second mode, and an electron beam scanning speed is higher in the first mode than in the second mode. The circuit pattern inspecting instrument is configured so that first the sample is observed in the first mode, then a particular position on the sample is selected based on image data produced by an output of the detector in the first mode, and then the particular position on the sample is observed in the second mode.

Abstract: In a semiconductor device, first gate electrodes contributing to transistor operations and second gate electrodes not contributing to the transistor operations each have the same gate length, share the common gate length direction, and are arranged in the same pitch. The first gate electrodes and the second gate electrodes are all made to extend, in the gate width direction, beyond the longest active region width. With such a configuration, it is possible to provide a semiconductor device having a pattern structure that will not cause performance degradation of transistors when designing a semiconductor integrated circuit within a semiconductor device.

Abstract: An electric field for decelerating an electron beam is formed on a surface of a sample semiconductor to be inspected, an electron beam having a specific area (a sheet electron beam) and containing a component having such an energy as not to reach the surface of the sample semiconductor is reflected in the very vicinity of the surface of the sample semiconductor by action of the electric field for deceleration and then forms an image through an imaging lens. Thus images of plural fields on the surface of the sample semiconductor are obtained and are stored in image memory units. By comparing the stored images of the plural fields with one another, the presence and position of a defect in the fields are determined.

Abstract: A circuit pattern inspecting instrument includes an electron-optical system for irradiating an electron beam on a sample, an electron beam deflector, a detector for detecting secondary charged particles from the sample, and a mode setting unit for switching between a first mode and a second mode. An electron beam current is larger in the first mode than in the second mode, and an electron beam scanning speed is higher in the first mode than in the second mode. The circuit pattern inspecting instrument is configured so that first the sample is observed in the first mode, then a particular position on the sample is selected based on image data produced by an output of the detector in the first mode, and then the particular position on the sample is observed in the second mode.

Abstract: On a sleep state, a voltage dropping circuit 2 supplies a power supply line VA1 with a voltage obtained by dropping a voltage of a power supply line VA2, instead of a voltage in accordance with ON state of a switch QA1. A power supply line GND has a voltage equal to the ground voltage. A charge pump circuit 10 outputs the ground voltage on an active state. The charge pump circuit 10 outputs a voltage which is lower than the ground voltage, on the sleep state. A source electrode and a substrate electrode are connected to the power supply lines VA1 and VA2 in each of PMOS transistors Q3 and Q4 of an internal circuit 1 (latch circuit), respectively. A source electrode is connected to the power supply line GND in each of nMOS transistors Q5 and Q6 of the internal circuit 1. A substrate electrode is supplied with the voltage which is outputted from the charge pump circuit, in each of the nMOS transistors Q5 and Q6 of the internal circuit 1.

Abstract: On a sleep state, a voltage dropping circuit 2 supplies a power supply line VA1 with a voltage obtained by dropping a voltage of a power supply line VA2, instead of a voltage in accordance with ON state of a switch QA1. A power supply line GND has a voltage equal to the ground voltage. A charge pump circuit 10 outputs the ground voltage on an active state. The charge pump circuit 10 outputs a voltage which is lower than the ground voltage, on the sleep state. A source electrode and a substrate electrode are connected to the power supply lines VA1 and VA2 in each of pMOS transistors Q3 and Q4 of an internal circuit 1 (latch circuit), respectively. A source electrode is connected to the power supply line GND in each of nMOS transistors Q5 and Q6 of the internal circuit 1. A substrate electrode is supplied with the voltage which is outputted from the charge pump circuit, in each of the NMOS transistors Q5 and Q6 of the internal circuit 1.

Abstract: A first circuit group for generating a dock signal, and a second circuit group for carrying out a transferring operation and a logical processing operation on a signal in accordance with this clock signal are arranged, and operation voltage sources of these circuit groups are made individually settable. Thus, the operation speeds of the first circuit group and the second circuit group are individually adjusted so as to eliminate a problem of an erroneous operation due to a racing through an operation. An erroneous operation due to a racing caused by dock skew can be reliably prevented through an external operation.

Abstract: A first circuit group for generating a clock signal, and a second circuit group for carrying out a transferring operation and a logical processing operation on a signal in accordance with this clock signal are arranged, and operation voltage sources of these circuit groups are made individually settable. Thus, the operation speeds of the first circuit group and the second circuit group are individually adjusted so as to eliminate a problem of an erroneous operation due to a racing through an operation. An erroneous operation due to a racing caused by clock skew can be reliably prevented through an external operation.

Abstract: A sliding roof device is made up of a pair of laterally spaced guide rails provided at inner peripheries of an open area formed in a vehicular roof panel, the guide rails supporting a movable panel in movable fashion in order to open and close the open area; a front frame connecting a front end of one of the guide rails and a front end of the other, the front frame and the pair of the guide rails constituting a sunroof frame; and a driving mechanism including a motor, a gear mechanism driven by the motor, an output gear associated with the gear mechanism, a geared cable engaged with the output gear in meshing fashion and connected to the movable panel for the movement thereof when the motor is turned on, and a casing pipe through which the geared cable is passed in movable fashion, characterized in that a housing and a box are provided, the housing placing the output gear outside the sunroof frame, the housing accommodating therein the gear mechanism, the box being formed integrally with the sunroof frame, th

Abstract: A vehicle sun-roof device includes a movable panel for fully covering and uncovering an opening in the vehicle roof, a guide rail provided along a side of the opening in the vehicle longitudinal direction, and a link mechanism associated with the movable panel for tilting the movable panel. The link mechanism includes a bracket supporting the movable panel, a link member for restricting the rotational position of the bracket, a drive shoe slidably disposed in the guide rail and associated with the bracket via the link member, and a driven shoe slidably disposed in the guide rail and rotatably supporting one end of the bracket. A checking mechanism restricts the movement of the driven shoe in the vehicle longitudinal direction and includes a restriction portion formed at the bracket and a guide block fixed to the guide rail.

Abstract: A sunshade for a vehicle sunroof is structured to have a base member for shielding sunlight from striking the inside of the vehicle through an opening formed in the vehicle body when the sunshade is closed, which is housed within a housing space formed adjacent to the opening when the sunshade is opened, and an edge member integrally provided with a handle, which has a shield integrally mounted on the advancing-side end portion of the base member to shield the advancing-side terminal portion from the view of the vehicle occupant. This construction of the sunshade improves the productivity and reduces the cost of the sunshade.

Abstract: An improved chain drive mechanism having a closed loop of roller chain passing round the opposite sprocket wheels. The profile of each tooth formed on the circumference of the sprocket wheel is in conformity with the envelope curve traced by a roller when the roller moves with its center following an involute-trochoid curve. The involute-trochoid curve is determined by offsetting the roller pitch line a certain distance apart outside the contact pitch line, and by rotating the contact pitch line on the base circle of the sprocket wheel to allow a point on the roller pitch line to trace a curve. The certain distance is so determined that the roller pitch may be equal to the incremental arc length, which is determined by dividing the circumference of the base circle by the number of teeth.

Abstract: In a semiconductor device, first gate electrodes contributing to transistor operations and second gate electrodes not contributing to the transistor operations each have the same gate length, share the common gate length direction, and are arranged in the same pitch. The first gate electrodes and the second gate electrodes are all made to extend, in the gate width direction, beyond the longest active region width. With such a configuration, it is possible to provide a semiconductor device having a pattern structure that will not cause performance degradation of transistors when designing a semiconductor integrated circuit within a semiconductor device.