Abstract: The invention provides a modified liquid diene polymer that allows a rubber composition to give a crosslinked product which contains a filler in a dispersed state ideal for attaining enhanced properties and which also exhibits excellent properties such as wet grip and abrasion resistance. The invention also provides a rubber composition including the modified liquid diene polymer, a crosslinked product thereof, and a tire which includes a portion including the composition or the crosslinked product. The modified liquid diene polymer is a product of modification, with a specific silane compound, of a liquid diene block copolymer including a polymer block (b?1) or (b?1) containing butadiene units and a polymer block (b?2) or (b?2). The modified liquid diene polymer has a functional group derived from the silane compound, and satisfies specific conditions.

Abstract: A method of producing a raw material solution for a film-forming according to a Mist CVD method including a temperature at which a solute containing a metallic element is mixed with a solvent and stirred is 30° C. or higher, and a method of film-forming according to the Mist CVD method using a raw material solution produced by the method of producing the raw material solution.

Abstract: Provided is a hollow organ model unit. The hollow organ model unit includes a base that includes a recessed part, a hollow organ model that is placed in the recessed part, a filler that is filled in the recessed part, and a sensor that performs a measurement on the hollow organ model.

Abstract: A first region is a circular region located at the centermost position. A first refractive power is uniformly added to the first region regardless of the distance from an axis of a lens part. A second region is a ring-like region located outside and adjacent to the first region. In the second region, a refractive power is increased or decreased from the first refractive power as the distance from the axis becomes larger. An outer region is a ring-like region located outside the second region. A reference refractive power for focusing on a far point is added to the outer region. An MTF curve at spatial frequency of 50 lp/mm relating to light passing through a region having a radius of 1.5 mm around the axis has one maximal value and no minimal value in a range of a defocusing value of ?0.5 D to 0.5 D.

Abstract: A semiconductor device includes a semiconductor element and resin. The semiconductor element includes a semiconductor part, first and second electrodes. The semiconductor part includes a back surface, a front surface at a side opposite to the back surface, and a side surface linking the back front surfaces. The semiconductor part includes a groove in the side surface. The groove surrounds the semiconductor part. The first electrode is provided on the back surface of the semiconductor part. The second electrode is provided on the front surface of the semiconductor part. The resin hermetically seals the semiconductor element. The resin includes a portion embedded in the groove.

Abstract: There is provided a gallium nitride laminated substrate including: an n-type gallium nitride layer containing an n-type impurity; a p-type gallium nitride layer provided on the n-type gallium nitride layer, containing a p-type impurity, forming a pn-junction at an interface with the n-type gallium nitride layer, and having a p-type impurity concentration and a thickness such that, when a reverse bias voltage is applied to the pn-junction, a breakdown occurs due to a punchthrough phenomenon before occurrence of a breakdown due to an avalanche phenomenon; and an intermediate level layer provided on the p-type gallium nitride layer, containing a p-type gallium nitride which contains the p-type impurity at a higher concentration than the p-type gallium nitride layer, having at least one or more intermediate levels between a valence band and a conduction band, and configured to suppress an overcurrent resulting from a breakdown due to the punchthrough phenomenon in the p-type gallium nitride layer.

Abstract: A semiconductor device includes a semiconductor part between first and second electrodes, first and second control electrodes between the semiconductor part and the second electrode. The semiconductor part includes a first region and a second region around the first region. The semiconductor part includes first and third layers of a first conductivity type and second layers of a second conductivity type. The second layers are provided between the first layer and the second electrode. A second layer faces the first control electrode in the second region. Another second layer faces the second control electrode in the second region. A third layer is provided between the second layer and the second electrode. Another third layer is provided between another second layer and the second electrode. The second layer includes a second conductivity type impurity with a concentration lower than that of a second conductivity type impurity in another second layer.

Abstract: A semiconductor device includes a semiconductor part between first and second electrodes, first and second control electrodes between the semiconductor part and the second electrode. The semiconductor part includes a first region and a second region around the first region. The semiconductor part includes first and third layers of a first conductivity type and second layers of a second conductivity type. The second layers are provided between the first layer and the second electrode. A second layer faces the first control electrode in the second region. Another second layer faces the second control electrode in the second region. A third layer is provided between the second layer and the second electrode. Another third layer is provided between another second layer and the second electrode. The second layer includes a second conductivity type impurity with a concentration lower than that of a second conductivity type impurity in another second layer.

Abstract: The present invention provides a method for expanding PGC/PGCLC, including culturing PGC/PGCLC in the presence of a phosphodiesterase 4 (PDE4) inhibitor and/or cyclosporine A, further in the presence of forskolin, and a method for inducing oocytes from PGC/PGCLC, including culturing PGC/PGCLC in the presence of bone forming protein (BMP) and retinoic acid (RA).

Abstract: A semiconductor device includes a die pad; a semiconductor chip mounted on a front surface of the die pad; a bonding layer placed between the die pad and the semiconductor chip; a first resin member being positioned between the bonding layer and the semiconductor chip; and a second resin member covering the semiconductor chip and the front surface of the die pad. The first resin member is provided along a periphery of the semiconductor chip. The bonding layer includes a first portion and a second portion. The first portion is positioned between the semiconductor chip and the die pad, and contacts the semiconductor chip. The second portion is positioned between the first resin member and the die pad.

Abstract: According to one embodiment, a semiconductor device includes first and second electrodes, first, second, third, fourth, fifth, sixth and seventh semiconductor regions, and a gate electrode. The first semiconductor region is provided on the first electrode. The second semiconductor region is provided on a portion of the first semiconductor region. The third semiconductor region is provided on another portion of the first semiconductor region. The fourth semiconductor region is provided in at least a portion between the first and third semiconductor regions. The fifth semiconductor region is provided between the first and fourth semiconductor regions. The sixth semiconductor region is provided on the third semiconductor region. The seventh semiconductor region is provided selectively on the sixth semiconductor region. The gate electrode opposes the second, sixth, and seventh semiconductor regions. The second electrode is provided on the sixth and seventh semiconductor regions.

Abstract: A semiconductor device includes a semiconductor body, first and second electrodes, and a control electrode. The semiconductor body includes first to fourth semiconductor layers. The first electrode is provided on a front surface of the semiconductor body. The second electrode is provided on a back surface of the semiconductor body. The control electrode is provided between the semiconductor body and the first electrode. The second semiconductor layer is positioned between a portion and other portion of the first semiconductor layer in a first direction directed along the front surface. The third semiconductor layer contacts the portion of first semiconductor layer and the second semiconductor layer. The third semiconductor layer includes a first end portion positioned in the portion of the first semiconductor layer and a second end portion positioned in the second semiconductor layer. The fourth semiconductor layer is selectively provided in the second end portion.

Abstract: Provided is an air compressor which exhibits improved reliability by resolving problems relating to drainage discharge defects, and exhibits improved energy efficiency. The air compressor comprises: a compressor body which compresses air; a compressed air flow path through which the compressed air from the compressor body flows; a heat exchanger which is provided to the compressor flow path so as to cool the compressed air from the compressor body; and a drainage pipe (62) which branches from the compressed air flow path so as to connect to the exterior, and through which drainage condensed from the compressed air cooled in the heat exchanger flows. A strainer (65) which removes foreign matter contaminating the drainage is provided to the drainage pipe (62). An on-off valve (66) at the downstream side of the strainer (65), and a pressure sensor (41) at the upstream side thereof, said sensor detecting pressure inside the drainage pipe (62), are each provided so as to resolve drainage discharge defects.

Abstract: A semiconductor device includes a semiconductor member having a mesa structure in which a first semiconductor layer and a second semiconductor layer are laminated on each other and having a pn junction; an insulating film disposed on a side surface of the mesa structure and on an outside upper surface of the mesa structure; a first electrode connected to the second semiconductor layer on the upper surface of the mesa structure, and extends on the side surface of the mesa structure and on the outside upper surface of the mesa structure on the insulating film; and a second electrode connected to the first semiconductor layer on a lower surface of the first semiconductor layer, and having a capacitance of the insulating film when a reverse bias voltage is applied between the first electrode and the second electrode, so that a first voltage applied to the insulating film between a corner position (a first position) where the side surface of the insulating film disposed on the side surface of the mesa structure an

Abstract: A semiconductor device of an embodiment includes a semiconductor layer having first and second plane, a first semiconductor region of a first conductivity type, second semiconductor regions of a second conductivity type between the first semiconductor region and the first plane, third semiconductor regions of a first conductivity type provided between the first semiconductor region and the first plane and provided between the second semiconductor regions, a fourth semiconductor region provided between the second semiconductor regions and the first plane, and having a higher second conductivity-type impurity concentration than the second semiconductor regions, a fifth semiconductor region of a first conductivity type between the fourth semiconductor region and the first plane, a sixth semiconductor region provided between the second semiconductor regions and the fourth semiconductor region, and having a higher electric resistance per unit depth than the second semiconductor regions, a gate electrode, and a gat

Abstract: According to one embodiment, a semiconductor device includes first and second electrodes, first, second, third, fourth, fifth, sixth and seventh semiconductor regions, and a gate electrode. The first semiconductor region is provided on the first electrode. The second semiconductor region is provided on a portion of the first semiconductor region. The third semiconductor region is provided on another portion of the first semiconductor region. The fourth semiconductor region is provided in at least a portion between the first and third semiconductor regions. The fifth semiconductor region is provided between the first and fourth semiconductor regions. The sixth semiconductor region is provided on the third semiconductor region. The seventh semiconductor region is provided selectively on the sixth semiconductor region. The gate electrode opposes the second, sixth, and seventh semiconductor regions. The second electrode is provided on the sixth and seventh semiconductor regions.

Abstract: A semiconductor device includes a semiconductor body including a first semiconductor layer of a first conductivity type and a second semiconductor layer of a second conductivity type. The first and second semiconductor layers are alternately arranged in a first direction along a front surface of the semiconductor body, and each include multiple portions arranged in a second direction directed from a back surface toward the front surface of the semiconductor body. The first and second semiconductor layers are configured such that, in an active region, a large/small relationship between amounts of the first conductivity type impurity and the second conductivity type impurity in the portions positioned at the same level in the second direction reverses at a center in the second direction of the second semiconductor layer, and in the terminal region, the large/small relationship reverses alternately in the portions arranged in the second direction.

Abstract: Typical liquid-cooled compressors use the effective means of reducing no-load power by repeatedly starting and stopping an electric motor according to the amount of required air, but sufficient consideration has not been given to the fact that frequent starting and stopping of large-output electric motors leads to a decline in motor reliability. In order to solve this problem, a liquid-cooled compressor for circulating a liquid inside a compressor body using a pressure difference, and equipped with a cooling channel for circulating said liquid for cooling, configured so as to have an intake valve for adjusting the air intake of the compressor body, to change the amount of air taken in through the intake valve, and as a result, to perform a low-pressure operation during no-load operation at two levels of reduced operating pressure consisting of a value no less than a minimum circulation oil supply pressure and a low value.

Abstract: A semiconductor device includes a semiconductor body, first and second electrodes, and a control electrode. The semiconductor body includes first to fourth semiconductor layers. The first electrode is provided on a front surface of the semiconductor body. The second electrode is provided on a back surface of the semiconductor body. The control electrode is provided between the semiconductor body and the first electrode. The second semiconductor layer is positioned between a portion and other portion of the first semiconductor layer in a first direction directed along the front surface. The third semiconductor layer contacts the portion of first semiconductor layer and the second semiconductor layer. The third semiconductor layer includes a first end portion positioned in the portion of the first semiconductor layer and a second end portion positioned in the second semiconductor layer. The fourth semiconductor layer is selectively provided in the second end portion.

Abstract: There is provided a semiconductor device, including: a semiconductor member having a mesa structure in which a second semiconductor layer having one of a p-type conductivity type and an n-type conductivity type is laminated on a first semiconductor layer having the other one of the p-type conductivity type and the n-type conductivity type, so that the second semiconductor layer is exposed on an upper surface of the mesa structure, a pn junction interface is exposed on a side surface of the mesa structure, and the first semiconductor layer is exposed on an outside upper surface of the mesa structure; an insulating film disposed on a side surface of the mesa structure and on an outside upper surface of the mesa structure; a first electrode electrically connected to the second semiconductor layer on the upper surface of the mesa structure, and extends on the side surface of the mesa structure and on the outside upper surface of the mesa structure on the insulating film; and a second electrode electrically connec