Patents by Inventor Hiroshi Okazaki

Hiroshi Okazaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120044026
    Abstract: A multiband matching circuit of the present invention includes an inductive element having one end connected to an input terminal, a first switch having one end connected to the other end of the inductive element and the other end grounded, a capacitive element having one end connected to the input terminal, a second switch having one end connected to the other end of the capacitive element and the other end grounded, a first-band matching circuit that is connected between the other end of the inductive element and a first output terminal and performs impedance matching in a first frequency band, and a second-band matching circuit that is connected between the other end of the capacitive element and a second output terminal and performs impedance matching in a second frequency band higher than the first frequency band.
    Type: Application
    Filed: August 16, 2011
    Publication date: February 23, 2012
    Applicant: NTT DOCOMO, INC.
    Inventors: Atsushi FUKUDA, Hiroshi Okazaki, Shoichi Narahashi
  • Publication number: 20120032751
    Abstract: A variable impedance matching circuit includes a series or parallel connection of a fixed inductive element and a first variable capacitive element and a second variable capacitive element connected in series with the serial or parallel connection. The susceptance of the circuit can be changed by changing the capacitances of the variable capacitive elements.
    Type: Application
    Filed: August 5, 2011
    Publication date: February 9, 2012
    Applicant: NTT DOCOMO, INC.
    Inventors: Atsushi Fukuda, Hiroshi Okazaki, Shoichi Narahashi
  • Patent number: 8106727
    Abstract: A variable resonator that comprises a loop line (902) to which two or more switches (903) are connected and N variable reactance means (102) (N?3), in which switches (903) are severally connected to different positions on the loop line (902), the other ends of the switches are severally connected to a ground conductor, and the switches are capable of switching electrical connection/non-connection between the ground conductor and the loop line (902), the variable reactance blocks (102) are severally settable to the same reactance value, and the variable reactance blocks (102) are electrically connected to the loop line (902) as branching circuits along the circumference direction of the loop line (902) at equal electrical length intervals.
    Type: Grant
    Filed: February 21, 2008
    Date of Patent: January 31, 2012
    Assignee: NTT DoCoMo, Inc.
    Inventors: Kunihiro Kawai, Hiroshi Okazaki, Shoichi Narahashi
  • Patent number: 8098114
    Abstract: A matching circuit including a main matching block 51 inserted in a signal path and a series matching block 522, one end of which is connected to the main matching block 51, in which one end of a series connection of a switch 542 and a parallel matching block 532 is connected to the signal path at the other end of the series matching block 522 and impedance matching between input/output is performed at any one of two frequencies by setting the switch to ON/OFF.
    Type: Grant
    Filed: March 15, 2004
    Date of Patent: January 17, 2012
    Assignee: NTT DoCoMo, Inc.
    Inventors: Atsushi Fukuda, Hiroshi Okazaki, Yasushi Yamao, Tetsuo Hirota
  • Patent number: 8086191
    Abstract: A circulator extracts a transmission signal sent from a transmitter to antenna via the circulator and a duplexer, reflected by an antenna, and returned via the duplexer to the transmitter side. The amplitude and phase of the extracted signal are adjusted by an amplitude-and-phase adjuster to generate an offset signal having the same amplitude and the opposite phase with respect to a leaking transmission signal included in a signal output from a third terminal of the duplexer when combined by a combiner. The offset signal is combined in the combiner with the leaking transmission signal included in the signal output from the third terminal of the duplexer to suppress the leaking transmission signal.
    Type: Grant
    Filed: May 2, 2008
    Date of Patent: December 27, 2011
    Assignee: NTT DoCoMo, Inc.
    Inventors: Atsushi Fukuda, Hiroshi Okazaki, Shoichi Narahashi
  • Patent number: 8073407
    Abstract: A radio communication device in which the output transmission signal of a high-frequency power amplifying part is sent out to an antenna via a circulator, a high-frequency signal reflected from the antenna is transferred via the circulator to a rectifying part to obtain a direct current power, and the direct current power is supplied to a power amplifying part or another constituent part in the radio communication device as an aid to the power supply from a power supply unit.
    Type: Grant
    Filed: April 23, 2008
    Date of Patent: December 6, 2011
    Assignee: NTT DoCoMo, Inc.
    Inventors: Atsushi Fukuda, Hiroshi Okazaki, Shoichi Narahashi
  • Publication number: 20110215886
    Abstract: A variable resonator includes a first transmission line 101, a second transmission line 102 and a plurality of switch circuits 150. The electrical length of the first transmission line 101 is equal to the electrical length of the second transmission line 102. The characteristic impedance for the even mode of the first transmission line 101 is equal to the characteristic impedance for the even mode of the second transmission line 102. The characteristic impedance for the odd mode of the first transmission line 101 is equal to the characteristic impedance for the odd mode of the second transmission line 102. Each switch circuit 150 is connected to any of the first transmission line 101 and the second transmission line 102, and one of the switch circuits 150 is turned on.
    Type: Application
    Filed: March 4, 2011
    Publication date: September 8, 2011
    Applicant: NTT DOCOMO, INC.
    Inventors: Kunihiro KAWAI, Hiroshi OKAZAKI, Shoichi NARAHASHI
  • Patent number: 7978018
    Abstract: A non-reciprocal circuit device comprising a magnetic plate F1; center conductors L1, L2, and L3 that are mutually insulated and disposed so as to intersect on magnetic plate F1; a plane conductor P1 that is disposed facing the center conductors with magnetic plate F1 placed therebetween, the plane conductor being connected to first ends of all the center conductors; matching capacitors C1 to C3 that have first ends grounded electrically and second ends connected to second ends of the center conductors; first matching circuits that have first ends connected to the second ends of the center conductors and second ends that are input/output ports; and a second matching circuit that has a first end connected to or integrated with the plane conductor and a second end grounded electrically.
    Type: Grant
    Filed: February 17, 2009
    Date of Patent: July 12, 2011
    Assignee: NTT DoCoMo, Inc.
    Inventors: Takayuki Furuta, Hiroshi Okazaki, Shoichi Narahashi
  • Publication number: 20110115574
    Abstract: A switch is replaced with a parallel resonant circuit 4. More specifically, a variable resonator includes a line part 1 that includes one or more lines and has an annular shape, at least two parallel resonant circuits 4 capable of changing a characteristic, and at least three variable reactance blocks 2 capable of changing a reactance value, in which the parallel resonant circuits 4 are electrically connected to the line part 1 at one end thereof at different positions on the line part 1, and the variable reactance blocks 2 are electrically connected to the line part 1 at predetermined intervals based on an electrical length at a resonance frequency.
    Type: Application
    Filed: November 12, 2010
    Publication date: May 19, 2011
    Applicant: NTT DOCOMO, INC.
    Inventors: Kunihiro KAWAI, Hiroshi Okazaki, Shoichi Narahashi
  • Publication number: 20110080230
    Abstract: A bias circuit includes: a bias supply terminal 800; a parallel capacitor 3 connected at one end thereof to the bias supply terminal 800 and grounded at the other end thereof; and a parallel circuit 3L connected in parallel with the parallel capacitor 3 and connected at one end thereof to the bias supply terminal 800. Let 2?N. The parallel circuit 3L includes: a direct-current power supply connection terminal 600; N parallel inductors 21 to 2N connected in series with each other between the bias supply terminal 800 and the direct-current power supply connection terminal 600; and N?1 series resonators 91 to 9N?1. Each series resonator 91 to 9N?1 includes: a resonant capacitor 71 to 7N?1 connected at one end thereof to a connecting point between adjacent parallel inductors; and a resonant inductor 81 to 8N?1 connected at one end thereof to the other end of the resonant capacitor 71 to 7N?1 and grounded at the other end thereof.
    Type: Application
    Filed: October 5, 2010
    Publication date: April 7, 2011
    Applicant: NTT DOCOMO, INC.
    Inventors: Atsushi FUKUDA, Hiroshi Okazaki, Shoichi Narahashi
  • Patent number: 7825754
    Abstract: A variable resonator has a dielectric substrate 2, an input/output line 3 formed on the dielectric substrate 2, a first resonator 4 that has one end connected to the input/output line 3 and the other end grounded, and a second resonator that has one end connected to the input/output line 3 at the point of connection of the one end of the first resonator 4 and the other end grounded via a terminal switch 7. When the terminal switch 7 is turned off, resonance occurs at a frequency at which the sum of the line lengths of the first resonator 4 and the second resonator 6 equals to a quarter of the wavelength. When the terminal switch 7 is turned on, resonance occurs at a frequency at which a half of the sum of the line lengths equals to a quarter of the wavelength.
    Type: Grant
    Filed: November 1, 2006
    Date of Patent: November 2, 2010
    Assignee: NTT DoCoMo, Inc.
    Inventors: Kunihiro Kawai, Atsushi Fukuda, Hiroshi Okazaki, Shoichi Narahashi
  • Patent number: 7821351
    Abstract: An irreversible circuit element is configured by including a magnetic substance, a plurality of central conductors L1 to L3, one ends of which are connected to different input/output ports, arranged on the magnetic substance so as to intersect each other while being insulated from each other, a first conductor P1 connected to the other ends of all the central conductors L1 to L3, a second conductor, a plurality of matching capacitors (each configured by C1 to C3) connecting the one end of the central conductors L1 to L3 and the second conductor and a variable matching mechanism V1, one end of which is connected or integrated with the second conductor, capable of changing reactance between the one end and the other end thereof.
    Type: Grant
    Filed: August 29, 2007
    Date of Patent: October 26, 2010
    Assignee: NTT DoCoMo, Inc.
    Inventors: Takayuki Furuta, Atsushi Fukuda, Hiroshi Okazaki, Shoichi Narahashi
  • Patent number: 7776427
    Abstract: The invention provides a multi-layered transfer belt for image forming apparatus including a base layer, an elastic layer (intermediate layer) and a surface layer, having a high surface resistivity, an excellent toner releasing property and an excellent non-contaminating property. The transfer belt for image forming apparatus is characterized in including, on the base layer, an elastic layer containing an elastomer and a surface layer formed by a fluorine-containing polymer, and preferably further characterized in that the elastic layer is formed by an elastomer rendered ionic conductive, or in that a binder layer is included between the elastic layer and the surface layer, and that the binder layer is formed by a material having a melting point equal to or lower than a thermal decomposition point of the material constituting the elastic layer and a thermal decomposition point equal to or higher than a melting point of the material constituting the surface layer.
    Type: Grant
    Filed: August 3, 2005
    Date of Patent: August 17, 2010
    Assignee: Sumitomo Electric Fine Polymer, Inc.
    Inventors: Kazuaki Ikeda, Hiroshi Okazaki, Masahiro Habuka
  • Publication number: 20100194491
    Abstract: A multiband matching circuit includes a first matching unit, a second matching unit, and a third matching unit, with all units being connected in series in a signal path. Matching with target impedance is established at a first frequency by appropriately designing the first matching unit and at a second frequency by appropriately designing the second and third matching units. The second matching unit and the third matching unit are designed to make the conversion ratio of the impedance viewed from the connection point between the second matching unit and the third matching unit to a circuit element to the target impedance smaller than the conversion ratio of the impedance viewed from the connection point between the first matching unit and the second matching unit to the circuit element to the target impedance, at the second frequency.
    Type: Application
    Filed: January 26, 2010
    Publication date: August 5, 2010
    Applicant: NTT DoCoMo, Inc.
    Inventors: Atsushi FUKUDA, Hiroshi Okazaki, Shoichi Narahashi
  • Publication number: 20100194487
    Abstract: A multiband matching circuit includes a first matching unit for converting an impedance in a signal path to Z0 in a first frequency band, and a second matching unit formed of a series matching section connected at one end in series with the first matching unit in the signal path, which is a transmission line whose characteristic impedance is equal to the matching impedance Z0 or a circuit equivalent to the transmission line at least in the first frequency band, and a parallel matching section connected at one end to the signal path at the other end of the series matching section and grounded at the other end. The parallel matching section is configured to open in impedance the connection point to the signal path in the first frequency band. The series matching section and the parallel matching section are designed to match an impedance in a second frequency band with Z0.
    Type: Application
    Filed: January 28, 2010
    Publication date: August 5, 2010
    Applicant: NTT DoCoMo, Inc.
    Inventors: Atsushi FUKUDA, Hiroshi Okazaki, Shoichi Narahashi
  • Patent number: 7750756
    Abstract: The present invention has for its object to provide a matching circuit with multiband capability which can be reduced in size, even if the number of handled frequency bands rises. The matching circuit of the present invention comprises a load having frequency-dependent characteristics, a first matching block connected with one end to the load with frequency-dependent characteristics, and a second matching block formed by lumped elements connected in series to the first matching block. And then, when a certain frequency band is used, matching is obtained with the series impedance of the first matching block and the second matching block. When a separate frequency band is used, a ?-type circuit is constituted by connecting auxiliary matching blocks to both sides of the second matching block. Next, at the same frequency, by taking the combined impedance of this ?-type circuit and a load whose characteristics do not depend on the frequency to be Z0, the influence of the second matching block is removed.
    Type: Grant
    Filed: March 3, 2009
    Date of Patent: July 6, 2010
    Assignee: NTT DoCoMo, Inc.
    Inventors: Atsushi Fukuda, Hiroshi Okazaki, Shoichi Narahashi
  • Patent number: 7750757
    Abstract: The present invention has for its object to provide a matching circuit with multiband capability which can be reduced in size, even if the number of handled frequency bands rises. The matching circuit of the present invention comprises a load having frequency-dependent characteristics, a first matching block connected with one end to the load with frequency-dependent characteristics, and a second matching block formed by lumped elements connected in series to the first matching block. And then, when a certain frequency band is used, matching is obtained with the series impedance of the first matching block and the second matching block. When a separate frequency band is used, a ?-type circuit is constituted by connecting auxiliary matching blocks to both sides of the second matching block. Next, at the same frequency, by taking the combined impedance of this ?-type circuit and a load whose characteristics do not depend on the frequency to be Z0, the influence of the second matching block is removed.
    Type: Grant
    Filed: March 17, 2009
    Date of Patent: July 6, 2010
    Assignee: NTT DoCoMo, Inc.
    Inventors: Atsushi Fukuda, Hiroshi Okazaki, Shoichi Narahashi
  • Patent number: 7710217
    Abstract: There is provided a matching circuit, in which a main-matching block and a sub-matching block are connected in series. The sub-matching block includes: a series matching block of which one end is connected to the main-matching block; and a parallel matching network connected to the other end of the series matching block. At a first frequency f1, the connection point of the series matching block and a first parallel matching block is caused to be in an open state for a radio-frequency signal, and the connection point of the first parallel matching block and the second parallel matching block is caused to be in a short state for the radio-frequency signal. Impedance matching is performed by the main-matching block and the series matching block at the first frequency f1, and is performed by the main-matching block and the sub-matching block at the second frequency f2.
    Type: Grant
    Filed: December 19, 2007
    Date of Patent: May 4, 2010
    Assignee: NTT DoCoMo, Inc.
    Inventors: Atsushi Fukuda, Hiroshi Okazaki, Shoichi Narahashi
  • Publication number: 20100105785
    Abstract: A process for preparing a blocked derivatized poly(4-hydroxystryrene)-DPHS having a novolak type structure which comprises the steps of (i) supplying a solution of methanol containing 4-hydroxyphenylmethylcarbinol, (ii) subjecting said solution to an acid catalyzed displacement reaction for a sufficient period of time and under suitable conditions of temperature and pressure to convert substantially all of said carbinol to 4-hydroxyphenylmethylcarbinol methyl ether in solution, (iii) polymerizing said ether containing solution in the presence of a suitable acid catalyst for a sufficient period of time and under suitable conditions of temperature and pressure to form a novolak type polymer; and (iv) reacting said polymer with a vinyl ether, a dialkyl dicarbonate, or a mixture of vinyl ether and a dialkyl dicarbonate to form the blocked DPHS.
    Type: Application
    Filed: December 23, 2009
    Publication date: April 29, 2010
    Inventors: Michael T. Sheehan, Edward G. Zey, Hiroshi Okazaki
  • Patent number: 7662538
    Abstract: A process for preparing a blocked derivatized poly(4-hydroxystryrene)-DPHS having a novolak type structure which comprises the steps of (i) supplying a solution of methanol containing 4-hydroxyphenylmethylcarbinol, (ii) subjecting said solution to an acid catalyzed displacement reaction for a sufficient period of time and under suitable conditions of temperature and pressure to convert substantially all of said carbinol to 4-hydroxyphenylmethylcarbinol methyl ether in solution, (iii) polymerizing said ether containing solution in the presence of a suitable acid catalyst for a sufficient period of time and under suitable conditions of temperature and pressure to form a novolak type polymer; and (iv) reacting said polymer with a vinyl ether, a dialkyl dicarbonate, or a mixture of vinyl ether and a dialkyl dicarbonate to form the blocked DPHS.
    Type: Grant
    Filed: October 13, 2005
    Date of Patent: February 16, 2010
    Assignee: Du Pont Electronic Polymers L.P.
    Inventors: Michael T. Sheehan, Edward G. Zey, Hiroshi Okazaki