Patents by Inventor Hiroshi Shimomura

Hiroshi Shimomura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9906659
    Abstract: According to an embodiment, a printer includes a display device and a controller device. The display device displays one of product information received from an external device and product information recorded in a memory device, as product-information-to-be-printed. When the printer is incapable of receiving the product information from the external device, the controller device controls the display device to display the product information recorded in the memory device, in a display mode indicating that the product-information-to-be-printed is the product information recorded in the memory device.
    Type: Grant
    Filed: January 20, 2017
    Date of Patent: February 27, 2018
    Assignee: TOSHIBA TEC KABUSHIKI KAISHA
    Inventor: Hiroshi Shimomura
  • Patent number: 9834690
    Abstract: A solvent type curable ink for ink-jet printing obtained by dissolving or dispersing, in a volatile organic solvent, polyesterpolyol having a molecular weight of not more than 8000, a hydroxyl value (KOH mg/g) of 17 to 50 and a glass transition point (Tg) of not higher than 70° C., and blocked polyisocyanate. The ink is capable of forming ink-jet-printed image on the surfaces of various kinds of formed articles without burring and maintaining close adhesion upon being heated at a low temperature for a short period of time.
    Type: Grant
    Filed: April 16, 2014
    Date of Patent: December 5, 2017
    Assignee: NIPPON CLOSURES CO., LTD.
    Inventors: Hiroshi Shimomura, Sei Nakagawa, Hiroaki Kikuchi, Katsumi Hashimoto
  • Patent number: 9815995
    Abstract: An ink for ink-jet printing used for ink-jet printing images onto the ink non-absorptive surfaces of cylindrical containers, and comprising at least a water-soluble solvent, a coloring material, a surfactant, a thickener and/or a binder resin, the coloring material being contained in an amount of 5 to 20% by weight, the surfactant in an amount of 0.1 to 5% by weight, the thickener in an amount of not more than 10% by weight, and the binder resin being contained in an amount of not more than 30% by weight. Owing to its ink-jet printability, the ink for ink-jet printing of the invention can be favorably used for printing images on the non-absorptive cylindrical containers such as seamless cans that are used for containing beverages and foods.
    Type: Grant
    Filed: January 31, 2013
    Date of Patent: November 14, 2017
    Assignees: TOYO SEIKAN GROUP HOLDINGS, LTD., TOKAN MATERIAL TECHNOLOGY CO., LTD.
    Inventors: Koji Yamada, Kenji Hayashi, Yukiko Saito, Hiroshi Shimomura
  • Publication number: 20170251112
    Abstract: According to an embodiment, a printer includes a display device and a controller device. The display device displays one of product information received from an external device and product information recorded in a memory device, as product-information-to-be-printed. When the printer is incapable of receiving the product information from the external device, the controller device controls the display device to display the product information recorded in the memory device, in a display mode indicating that the product-information-to-be-printed is the product information recorded in the memory device.
    Type: Application
    Filed: January 20, 2017
    Publication date: August 31, 2017
    Inventor: Hiroshi SHIMOMURA
  • Publication number: 20160289459
    Abstract: A curable resin composition including a curable resin in which ultrafine metal particles modified with a fatty acid are dispersed. The ultrafine metal particles are fatty acid-modified ultrafine metal particles having a fatty acid coordinated on the surfaces of the ultrafine metal particles and a glyceride coordinated around the fatty acid or on the surfaces of the ultrafine metal particles.
    Type: Application
    Filed: November 21, 2014
    Publication date: October 6, 2016
    Applicant: TOYO SEIKAN GROUP HOLDINGS, LTD.
    Inventors: Kazuaki OHASHI, Yasuhiro KOSAKA, Akiko OGATA, Hiroshi SHIMOMURA, Akira ISHIKO
  • Publication number: 20160255841
    Abstract: A dispersion solution containing ultrafine metal particles, comprising a low-boiling solvent and, contained therein, ultrafine metal particles of any one of Ag, Cu or Zn having a fatty acid and a glyceride coordinated on the surfaces thereof. The dispersion solution contains, dispersed therein, ultrafine metal particles that have excellent antibacterial power at a high concentration without being aggregated. The dispersion solution maintains excellent dispersion property even after the passage of long periods of time and also exhibits very high degree of transparency even when it is mixed into a resin composition.
    Type: Application
    Filed: October 30, 2014
    Publication date: September 8, 2016
    Applicant: TOYO SEIKAN GROUP HOLDINGS, LTD.
    Inventors: Kazuaki OHASHI, Yasuhiro KOSAKA, Akiko OGATA, Hiroshi SHIMOMURA, Akira ISHIKO
  • Patent number: 9379272
    Abstract: A light receiving element includes: a semiconductor layer; an insulating layer; an interconnect layer; and a film. The semiconductor layer includes a light receiving unit configured to convert a signal light incident on the light receiving unit into an electrical signal. The insulating layer is provided on the semiconductor layer. The interconnect layer is provided on the insulating layer. The film is provided on the insulating layer to cover the light receiving unit and be connected to the interconnect layer, the film being made of a metal or a metal nitride.
    Type: Grant
    Filed: March 10, 2014
    Date of Patent: June 28, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Miki Hidaka, Osamu Takata, Masahito Nishigoori, Yukiko Takiba, Hiroshi Suzunaga, Hiroshi Shimomura
  • Publication number: 20160083595
    Abstract: A solvent type curable ink for ink-jet printing obtained by dissolving or dispersing, in a volatile organic solvent, polyesterpolyol having a molecular weight of not more than 8000, a hydroxyl value (KOH mg/g) of 17 to 50 and a glass transition point (Tg) of not higher than 70° C., and blocked polyisocyanate. The ink is capable of forming ink-jet-printed image on the surfaces of various kinds of formed articles without burring and maintaining close adhesion upon being heated at a low temperature for a short period of time.
    Type: Application
    Filed: April 16, 2014
    Publication date: March 24, 2016
    Applicant: NIPPON CLOSURES CO., LTD.
    Inventors: Hiroshi SHIMOMURA, Sei NAKAGAWA, Hiroaki KIKUCHI, Katsumi HASHIMOTO
  • Publication number: 20150380594
    Abstract: A light receiving element includes: a semiconductor layer; an insulating layer; an interconnect layer; and a film. The semiconductor layer includes a light receiving unit configured to convert a signal light incident on the light receiving unit into an electrical signal. The insulating layer is provided on the semiconductor layer. The interconnect layer is provided on the insulating layer. The film is provided on the insulating layer to cover the light receiving unit and be connected to the interconnect layer, the film being made of a metal or a metal nitride.
    Type: Application
    Filed: September 11, 2015
    Publication date: December 31, 2015
    Inventors: Miki Hidaka, Osamu Takata, Masahito Nishigoori, Yukiko Takiba, Hiroshi Suzunaga, Hiroshi Shimomura
  • Patent number: 9166069
    Abstract: According to an embodiment, a light-receiving circuit includes a MOSFET, a first light-receiving element and a second light-receiving element. The first light-receiving element controls a state of the MOSFET between ON state and OFF state by applying a voltage induced by a light signal between a gate of the MOSFET and a source of the MOSFET; and a second light-receiving element controls a threshold voltage of the MOSFET.
    Type: Grant
    Filed: August 31, 2012
    Date of Patent: October 20, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masayuki Sugizaki, Shigeyuki Sakura, Miki Hidaka, Hiroshi Shimomura
  • Publication number: 20150076526
    Abstract: A light receiving element includes: a semiconductor layer; an insulating layer; an interconnect layer; and a film. The semiconductor layer includes a light receiving unit configured to convert a signal light incident on the light receiving unit into an electrical signal. The insulating layer is provided on the semiconductor layer. The interconnect layer is provided on the insulating layer. The film is provided on the insulating layer to cover the light receiving unit and be connected to the interconnect layer, the film being made of a metal or a metal nitride.
    Type: Application
    Filed: March 10, 2014
    Publication date: March 19, 2015
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Miki Hidaka, Osamu Takata, Masahito Nishigoori, Yukiko Takiba, Hiroshi Suzunaga, Hiroshi Shimomura
  • Publication number: 20150010722
    Abstract: An ink for ink-jet printing used for ink-jet printing images onto the ink non-absorptive surfaces of cylindrical containers, and comprising at least a water-soluble solvent, a coloring material, a surfactant, a thickener and/or a binder resin, the coloring material being contained in an amount of 5 to 20% by weight, the surfactant in an amount of 0.1 to 5% by weight, the thickener in an amount of not more than 10% by weight, and the binder resin being contained in an amount of not more than 30% by weight . Owing to its ink-jet printability, the ink for ink-jet printing of the invention can be favorably used for printing images on the non-absorptive cylindrical containers such as seamless cans that are used for containing beverages and foods.
    Type: Application
    Filed: January 31, 2013
    Publication date: January 8, 2015
    Applicants: TOKAN MATERIAL TECHNOLOGY CO., LTD., TOYO SEIKAN GROUP HOLDINGS, LTD.
    Inventors: Koji Yamada, Kenji Hayashi, Yukiko Saito, Hiroshi Shimomura
  • Patent number: 8582260
    Abstract: According to one embodiment, an integrated circuit includes a first external terminal, a second external terminal, a third external terminal grounded, an output transistor connected to the second and third external terminals, an ESD protection circuit connected between the second external terminal and the third external terminal, a diode connected between the first and second external terminals, a power supply circuit connected between the first and third external terminals, an internal circuit connected between the power supply circuit and the third external terminal, a current source circuit, and a drive circuit having a first and second input terminals and an output terminal connected to the control electrode of the output transistor. When a voltage larger than a maximum rating voltage is applied to the second external terminal, the drive circuit turns off the output transistor and the ESD protection circuit operates.
    Type: Grant
    Filed: February 21, 2012
    Date of Patent: November 12, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hiroshi Shimomura, Masaru Numano
  • Patent number: 8547670
    Abstract: According to one embodiment, an integrated circuit includes a power supply terminal, an output terminal, a high side output transistor including a first electrode connected to the power supply terminal, a second electrode connected to the output terminal, and a control electrode, a transistor which is connected between the control electrode and the second electrode of the high side output transistor and which short-circuits the control electrode and the second electrode in an on state, a trigger circuit connected between the power supply terminal and the control electrode of the transistor, and an Electro Static Discharge (ESD) protection circuit connected between the power supply terminal and the output terminal. When a voltage larger than a maximum rating voltage is applied to the power supply terminal, the trigger circuit operates, the transistor turns on, the high side output transistor turns off, and the ESD protection circuit operates.
    Type: Grant
    Filed: February 16, 2012
    Date of Patent: October 1, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hiroshi Shimomura, Masaru Numano
  • Publication number: 20130193495
    Abstract: According to an embodiment, a light-receiving circuit includes a MOSFET, a first light-receiving element and a second light-receiving element. The first light-receiving element controls a state of the MOSFET between ON state and OFF state by applying a voltage induced by a light signal between a gate of the MOSFET and a source of the MOSFET; and a second light-receiving element controls a threshold voltage of the MOSFET.
    Type: Application
    Filed: August 31, 2012
    Publication date: August 1, 2013
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Masayuki Sugizaki, Shigeyuki Sakura, Miki Hidaka, Hiroshi Shimomura
  • Patent number: 8427798
    Abstract: In one embodiment, a semiconductor integrated circuit includes a power source circuit connected to a terminal of a first high potential side power source and outputs a voltage of a second high potential side power source, and an output transistor outputting an output signal to an output terminal. A cathode of a first diode is connected to the terminal of the first high potential side power source and an anode thereof is connected to the output terminal. A current source and a capacitor are connected between a terminal of the second high potential side power source and the terminal of a low potential side power source. A signal from a connection node of the current source and the capacitor and a control signal are inputted to a logic circuit, and the logic circuit outputs a signal obtained by a logic operation to the control terminal of the output transistor.
    Type: Grant
    Filed: February 24, 2011
    Date of Patent: April 23, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hiroshi Shimomura, Masaru Numano
  • Publication number: 20120212869
    Abstract: According to one embodiment, an integrated circuit includes a first external terminal, a second external terminal, a third external terminal grounded, an output transistor connected to the second and third external terminals, an ESD protection circuit connected between the second external terminal and the third external terminal, a diode connected between the first and second external terminals, a power supply circuit connected between the first and third external terminals, an internal circuit connected between the power supply circuit and the third external terminal, a current source circuit, and a drive circuit having a first and second input terminals and an output terminal connected to the control electrode of the output transistor. When a voltage larger than a maximum rating voltage is applied to the second external terminal, the drive circuit turns off the output transistor and the ESD protection circuit operates.
    Type: Application
    Filed: February 21, 2012
    Publication date: August 23, 2012
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Hiroshi SHIMOMURA, Masaru Numano
  • Publication number: 20120212868
    Abstract: According to one embodiment, an integrated circuit includes a power supply terminal, an output terminal, a high side output transistor including a first electrode connected to the power supply terminal, a second electrode connected to the output terminal, and a control electrode, a transistor which is connected between the control electrode and the second electrode of the high side output transistor and which short-circuits the control electrode and the second electrode in an on state, a trigger circuit connected between the power supply terminal and the control electrode of the transistor, and an Electro Static Discharge (ESD) protection circuit connected between the power supply terminal and the output terminal. When a voltage larger than a maximum rating voltage is applied to the power supply terminal, the trigger circuit operates, the transistor turns on, the high side output transistor turns off, and the ESD protection circuit operates.
    Type: Application
    Filed: February 16, 2012
    Publication date: August 23, 2012
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Hiroshi SHIMOMURA, Masaru Numano
  • Patent number: 8146693
    Abstract: According to some embodiments, a motorcycle includes a vehicle body frame 20, an engine 3 mounted on the vehicle body frame, a fuel tank 4 disposed above the engine, a radiator 5 disposed in front of the engine, and an intake device 6 connected to the engine. The intake device 6 has an intake opening 30d, and an intake passage 31 which connects the intake opening in fluid communication with a front portion of the engine. The intake passage 31 is disposed between the fuel tank 4 and the radiator 5 as viewed from a side of the motorcycle.
    Type: Grant
    Filed: February 24, 2009
    Date of Patent: April 3, 2012
    Assignee: Yamaha Hatsudoki Kabushiki Kaisha
    Inventors: Satoshi Oohashi, Shidehiko Miyashiro, Hiroshi Shimomura, Satoshi Terumichi
  • Patent number: 8058694
    Abstract: In a semiconductor device, such as a MOSFET or the like, which is a high-frequency LSI achieving a low noise figure and a high maximum oscillation frequency and which has unit cells with a ring-shaped gate electrode arranged in an array, gate drawing wires connecting together the gate electrode and gate contact pad portions are arranged on a region excluding a drain region and a source region, that is, on an isolation region. Bending portions of the ring-shaped gate electrode are all formed on the isolation region. This therefore permits an improvement in high frequency characteristics such as noise, the maximum oscillation frequency, and the like while eliminating unnecessary gate capacity addition, and also permits small characteristic variation even if a machining shape of the bending portions of the gate electrode is unstable.
    Type: Grant
    Filed: June 18, 2007
    Date of Patent: November 15, 2011
    Assignee: Panasonic Corporation
    Inventor: Hiroshi Shimomura